[INFO] fetching crate array3d 0.1.0... [INFO] checking array3d-0.1.0 against try#f6d7c613ae2d161ff37dbc63cc5abd809c878597 for pr-83850 [INFO] extracting crate array3d 0.1.0 into /workspace/builds/worker-1/source [INFO] validating manifest of crates.io crate array3d 0.1.0 on toolchain f6d7c613ae2d161ff37dbc63cc5abd809c878597 [INFO] running `Command { std: "/workspace/cargo-home/bin/cargo" "+f6d7c613ae2d161ff37dbc63cc5abd809c878597" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }` [INFO] started tweaking crates.io crate array3d 0.1.0 [INFO] finished tweaking crates.io crate array3d 0.1.0 [INFO] tweaked toml for crates.io crate array3d 0.1.0 written to /workspace/builds/worker-1/source/Cargo.toml [INFO] running `Command { std: "/workspace/cargo-home/bin/cargo" "+f6d7c613ae2d161ff37dbc63cc5abd809c878597" "generate-lockfile" "--manifest-path" "Cargo.toml" "-Zno-index-update", kill_on_drop: false }` [INFO] running `Command { std: "/workspace/cargo-home/bin/cargo" "+f6d7c613ae2d161ff37dbc63cc5abd809c878597" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }` [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:ac0d0aa6ec8ed129e241004a6179c99fa0d2616f50ba759c5b60bd26d0fafa02" "/opt/rustwide/cargo-home/bin/cargo" "+f6d7c613ae2d161ff37dbc63cc5abd809c878597" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }` [INFO] [stdout] 25a88183380f757d8f8afd5350b0f103f109d6969574c967e8add7d3caa50d7b [INFO] running `Command { std: "docker" "start" "-a" "25a88183380f757d8f8afd5350b0f103f109d6969574c967e8add7d3caa50d7b", kill_on_drop: false }` [INFO] running `Command { std: "docker" "inspect" "25a88183380f757d8f8afd5350b0f103f109d6969574c967e8add7d3caa50d7b", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "25a88183380f757d8f8afd5350b0f103f109d6969574c967e8add7d3caa50d7b", kill_on_drop: false }` [INFO] [stdout] 25a88183380f757d8f8afd5350b0f103f109d6969574c967e8add7d3caa50d7b [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:ac0d0aa6ec8ed129e241004a6179c99fa0d2616f50ba759c5b60bd26d0fafa02" "/opt/rustwide/cargo-home/bin/cargo" "+f6d7c613ae2d161ff37dbc63cc5abd809c878597" "check" "--frozen" "--all" "--all-targets" "--message-format=json", kill_on_drop: false }` [INFO] [stdout] 00af593aec2c01385e59ce8a010bfe84a5ddfcb47a9e8569ee99efa5feae7022 [INFO] running `Command { std: "docker" "start" "-a" "00af593aec2c01385e59ce8a010bfe84a5ddfcb47a9e8569ee99efa5feae7022", kill_on_drop: false }` [INFO] [stderr] Checking lininterp v0.1.3 [INFO] [stderr] Checking array3d v0.1.0 (/opt/rustwide/workdir) [INFO] [stdout] warning: unused imports: `BitAnd`, `BitOr`, `BitXor` [INFO] [stdout] --> src/lib.rs:12:36 [INFO] [stdout] | [INFO] [stdout] 12 | use std::ops::{Add,Sub,Mul,Div,Rem,BitOr,BitAnd,BitXor,Index,IndexMut}; [INFO] [stdout] | ^^^^^ ^^^^^^ ^^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(unused_imports)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: type `Axis_t` should have an upper camel case name [INFO] [stdout] --> src/lib.rs:27:6 [INFO] [stdout] | [INFO] [stdout] 27 | type Axis_t=i32; [INFO] [stdout] | ^^^^^^ help: convert the identifier to upper camel case: `AxisT` [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(non_camel_case_types)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unused imports: `BitAnd`, `BitOr`, `BitXor` [INFO] [stdout] --> src/lib.rs:12:36 [INFO] [stdout] | [INFO] [stdout] 12 | use std::ops::{Add,Sub,Mul,Div,Rem,BitOr,BitAnd,BitXor,Index,IndexMut}; [INFO] [stdout] | ^^^^^ ^^^^^^ ^^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(unused_imports)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: type `Axis_t` should have an upper camel case name [INFO] [stdout] --> src/lib.rs:27:6 [INFO] [stdout] | [INFO] [stdout] 27 | type Axis_t=i32; [INFO] [stdout] | ^^^^^^ help: convert the identifier to upper camel case: `AxisT` [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(non_camel_case_types)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:476:7 [INFO] [stdout] | [INFO] [stdout] 476 | &avr(&cell[0][0][0],&cell[1][0][0]), [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:476:7 [INFO] [stdout] | [INFO] [stdout] 476 | &avr(&cell[0][0][0],&cell[1][0][0]), [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:475:6 [INFO] [stdout] | [INFO] [stdout] 475 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:475:6 [INFO] [stdout] | [INFO] [stdout] 475 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:477:7 [INFO] [stdout] | [INFO] [stdout] 477 | &avr(&cell[0][1][0],&cell[1][1][0])), [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:477:7 [INFO] [stdout] | [INFO] [stdout] 477 | &avr(&cell[0][1][0],&cell[1][1][0])), [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:479:7 [INFO] [stdout] | [INFO] [stdout] 479 | &avr(&cell[0][0][1],&cell[1][0][1]), [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:479:7 [INFO] [stdout] | [INFO] [stdout] 479 | &avr(&cell[0][0][1],&cell[1][0][1]), [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:476:7 [INFO] [stdout] | [INFO] [stdout] 476 | &avr(&cell[0][0][0],&cell[1][0][0]), [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:476:7 [INFO] [stdout] | [INFO] [stdout] 476 | &avr(&cell[0][0][0],&cell[1][0][0]), [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:475:6 [INFO] [stdout] | [INFO] [stdout] 475 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:478:6 [INFO] [stdout] | [INFO] [stdout] 478 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:475:6 [INFO] [stdout] | [INFO] [stdout] 475 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:477:7 [INFO] [stdout] | [INFO] [stdout] 477 | &avr(&cell[0][1][0],&cell[1][1][0])), [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:478:6 [INFO] [stdout] | [INFO] [stdout] 478 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:477:7 [INFO] [stdout] | [INFO] [stdout] 477 | &avr(&cell[0][1][0],&cell[1][1][0])), [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:480:7 [INFO] [stdout] | [INFO] [stdout] 480 | &avr(&cell[0][1][1],&cell[1][1][1]) [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:479:7 [INFO] [stdout] | [INFO] [stdout] 479 | &avr(&cell[0][0][1],&cell[1][0][1]), [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:480:7 [INFO] [stdout] | [INFO] [stdout] 480 | &avr(&cell[0][1][1],&cell[1][1][1]) [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:479:7 [INFO] [stdout] | [INFO] [stdout] 479 | &avr(&cell[0][0][1],&cell[1][0][1]), [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:478:6 [INFO] [stdout] | [INFO] [stdout] 478 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error: aborting due to 12 previous errors; 2 warnings emitted [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] For more information about this error, try `rustc --explain E0277`. [INFO] [stdout] [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:478:6 [INFO] [stdout] | [INFO] [stdout] 478 | &avr( [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] error: could not compile `array3d` due to 13 previous errors; 2 warnings emitted [INFO] [stdout] error[E0277]: cannot subtract `&'v &T` from `&'u &T` [INFO] [stdout] --> src/lib.rs:480:7 [INFO] [stdout] | [INFO] [stdout] 480 | &avr(&cell[0][1][1],&cell[1][1][1]) [INFO] [stdout] | ^^^ no implementation for `&'u &T - &'v &T` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Sub<&'v &T>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] warning: build failed, waiting for other jobs to finish... [INFO] [stdout] error[E0277]: cannot add `&'v f32` to `&'u &T` [INFO] [stdout] --> src/lib.rs:480:7 [INFO] [stdout] | [INFO] [stdout] 480 | &avr(&cell[0][1][1],&cell[1][1][1]) [INFO] [stdout] | ^^^ no implementation for `&'u &T + &'v f32` [INFO] [stdout] | [INFO] [stdout] = help: the trait `for<'u, 'v> Add<&'v f32>` is not implemented for `&'u &T` [INFO] [stdout] = help: the trait `Lerp` is implemented for `T` [INFO] [stdout] = note: required because of the requirements on the impl of `Lerp` for `&T` [INFO] [stdout] note: required by a bound in `avr` [INFO] [stdout] --> /opt/rustwide/cargo-home/registry/src/github.com-1ecc6299db9ec823/lininterp-0.1.3/src/lib.rs:111:14 [INFO] [stdout] | [INFO] [stdout] 111 | pub fn avr(a:&T,b:&T)->T{ a.lerp(b,0.5f32) } [INFO] [stdout] | ^^^^ required by this bound in `avr` [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error: aborting due to 12 previous errors; 2 warnings emitted [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] For more information about this error, try `rustc --explain E0277`. [INFO] [stdout] [INFO] [stderr] error: could not compile `array3d` due to 13 previous errors; 2 warnings emitted [INFO] running `Command { std: "docker" "inspect" "00af593aec2c01385e59ce8a010bfe84a5ddfcb47a9e8569ee99efa5feae7022", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "00af593aec2c01385e59ce8a010bfe84a5ddfcb47a9e8569ee99efa5feae7022", kill_on_drop: false }` [INFO] [stdout] 00af593aec2c01385e59ce8a010bfe84a5ddfcb47a9e8569ee99efa5feae7022