[INFO] cloning repository https://github.com/nosferatu500/Aurora_ARM7TDMI
[INFO] running `"git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/nosferatu500/Aurora_ARM7TDMI" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fnosferatu500%2FAurora_ARM7TDMI"`
[INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fnosferatu500%2FAurora_ARM7TDMI'...
[INFO] running `"git" "rev-parse" "HEAD"`
[INFO] [stdout] 5bee526174cd166bba27e978258021d90dbc4c9a
[INFO] checking nosferatu500/Aurora_ARM7TDMI against try#e4dba30b9b475d8750370c4dfb49b6541990904d for pr-71393
[INFO] running `"git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fnosferatu500%2FAurora_ARM7TDMI" "/workspace/builds/worker-5/source"`
[INFO] [stderr] Cloning into '/workspace/builds/worker-5/source'...
[INFO] [stderr] done.
[INFO] validating manifest of git repo https://github.com/nosferatu500/Aurora_ARM7TDMI on toolchain e4dba30b9b475d8750370c4dfb49b6541990904d
[INFO] running `"/workspace/cargo-home/bin/cargo" "+e4dba30b9b475d8750370c4dfb49b6541990904d" "read-manifest" "--manifest-path" "Cargo.toml"`
[INFO] started tweaking git repo https://github.com/nosferatu500/Aurora_ARM7TDMI
[INFO] finished tweaking git repo https://github.com/nosferatu500/Aurora_ARM7TDMI
[INFO] tweaked toml for git repo https://github.com/nosferatu500/Aurora_ARM7TDMI written to /workspace/builds/worker-5/source/Cargo.toml
[INFO] crate git repo https://github.com/nosferatu500/Aurora_ARM7TDMI already has a lockfile, it will not be regenerated
[INFO] running `"/workspace/cargo-home/bin/cargo" "+e4dba30b9b475d8750370c4dfb49b6541990904d" "fetch" "--locked" "--manifest-path" "Cargo.toml"`
[INFO] running `"docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-5/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-5/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=0" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+e4dba30b9b475d8750370c4dfb49b6541990904d" "check" "--frozen" "--all" "--all-targets"`
[INFO] [stderr] WARNING: Your kernel does not support swap limit capabilities or the cgroup is not mounted. Memory limited without swap.
[INFO] [stdout] 0a447934c6e51b3a5593d3099af903eab78e246b40ec82a844fdb3151d5e2ee7
[INFO] running `"docker" "start" "-a" "0a447934c6e51b3a5593d3099af903eab78e246b40ec82a844fdb3151d5e2ee7"`
[INFO] [stderr]     Checking GBA v0.1.0 (/opt/rustwide/workdir)
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/bios.rs:11:24
[INFO] [stderr]    |
[INFO] [stderr] 11 |         let mut file = try!(File::open(&path));
[INFO] [stderr]    |                        ^^^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(deprecated)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/bios.rs:15:9
[INFO] [stderr]    |
[INFO] [stderr] 15 |         try!(file.read_to_end(&mut data));
[INFO] [stderr]    |         ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/rom.rs:11:24
[INFO] [stderr]    |
[INFO] [stderr] 11 |         let mut file = try!(File::open(&path));
[INFO] [stderr]    |                        ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/rom.rs:15:9
[INFO] [stderr]    |
[INFO] [stderr] 15 |         try!(file.read_to_end(&mut data));
[INFO] [stderr]    |         ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/bios.rs:11:24
[INFO] [stderr]    |
[INFO] [stderr] 11 |         let mut file = try!(File::open(&path));
[INFO] [stderr]    |                        ^^^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(deprecated)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/bios.rs:15:9
[INFO] [stderr]    |
[INFO] [stderr] 15 |         try!(file.read_to_end(&mut data));
[INFO] [stderr]    |         ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/rom.rs:11:24
[INFO] [stderr]    |
[INFO] [stderr] 11 |         let mut file = try!(File::open(&path));
[INFO] [stderr]    |                        ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: use of deprecated item 'try': use the `?` operator instead
[INFO] [stderr]   --> src/rom.rs:15:9
[INFO] [stderr]    |
[INFO] [stderr] 15 |         try!(file.read_to_end(&mut data));
[INFO] [stderr]    |         ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable expression
[INFO] [stderr]    --> src/cpu/mod.rs:342:9
[INFO] [stderr]     |
[INFO] [stderr] 342 |         return unreachable!();
[INFO] [stderr]     |         ^^^^^^^--------------
[INFO] [stderr]     |         |      |
[INFO] [stderr]     |         |      any code following this expression is unreachable
[INFO] [stderr]     |         unreachable expression
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(unreachable_code)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable expression
[INFO] [stderr]    --> src/cpu/mod.rs:662:9
[INFO] [stderr]     |
[INFO] [stderr] 662 |         return unreachable!();
[INFO] [stderr]     |         ^^^^^^^--------------
[INFO] [stderr]     |         |      |
[INFO] [stderr]     |         |      any code following this expression is unreachable
[INFO] [stderr]     |         unreachable expression
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable pattern
[INFO] [stderr]    --> src/cpu/mod.rs:165:13
[INFO] [stderr]     |
[INFO] [stderr] 165 |             _ => unreachable!(),
[INFO] [stderr]     |             ^
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(unreachable_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable pattern
[INFO] [stderr]    --> src/cpu/mod.rs:261:13
[INFO] [stderr]     |
[INFO] [stderr] 261 |             _ => unreachable!(),
[INFO] [stderr]     |             ^
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:430:34
[INFO] [stderr]     |
[INFO] [stderr] 430 |     fn alu_operations(&mut self, instruction: u16) {
[INFO] [stderr]     |                                  ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(unused_variables)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:434:58
[INFO] [stderr]     |
[INFO] [stderr] 434 |     fn hi_register_operations_branch_exchange(&mut self, instruction: u16) {
[INFO] [stderr]     |                                                          ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:438:36
[INFO] [stderr]     |
[INFO] [stderr] 438 |     fn pc_relative_load(&mut self, instruction: u16) {
[INFO] [stderr]     |                                    ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:516:46
[INFO] [stderr]     |
[INFO] [stderr] 516 |     fn load_store_with_imm_offset(&mut self, instruction: u16) {
[INFO] [stderr]     |                                              ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:520:39
[INFO] [stderr]     |
[INFO] [stderr] 520 |     fn load_store_halfword(&mut self, instruction: u16) {
[INFO] [stderr]     |                                       ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:564:47
[INFO] [stderr]     |
[INFO] [stderr] 564 |     fn add_offset_to_stack_pointer(&mut self, instruction: u16) {
[INFO] [stderr]     |                                               ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:568:38
[INFO] [stderr]     |
[INFO] [stderr] 568 |     fn push_pop_registers(&mut self, instruction: u16) {
[INFO] [stderr]     |                                      ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:572:39
[INFO] [stderr]     |
[INFO] [stderr] 572 |     fn multiply_load_store(&mut self, instruction: u16) {
[INFO] [stderr]     |                                       ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:576:38
[INFO] [stderr]     |
[INFO] [stderr] 576 |     fn conditional_branch(&mut self, instruction: u16) {
[INFO] [stderr]     |                                      ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:580:38
[INFO] [stderr]     |
[INFO] [stderr] 580 |     fn software_interrupt(&mut self, instruction: u16) {
[INFO] [stderr]     |                                      ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:591:41
[INFO] [stderr]     |
[INFO] [stderr] 591 |     fn long_branch_with_link(&mut self, instruction: u16) {
[INFO] [stderr]     |                                         ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `s`
[INFO] [stderr]    --> src/cpu/mod.rs:669:13
[INFO] [stderr]     |
[INFO] [stderr] 669 |         let s = instruction >> 21 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_s`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:710:28
[INFO] [stderr]     |
[INFO] [stderr] 710 |     fn multiply(&mut self, instruction: u32) {
[INFO] [stderr]     |                            ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:714:33
[INFO] [stderr]     |
[INFO] [stderr] 714 |     fn multiply_long(&mut self, instruction: u32) {
[INFO] [stderr]     |                                 ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:718:36
[INFO] [stderr]     |
[INFO] [stderr] 718 |     fn single_data_swap(&mut self, instruction: u32) {
[INFO] [stderr]     |                                    ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:733:51
[INFO] [stderr]     |
[INFO] [stderr] 733 |     fn halfword_data_transfer_register(&mut self, instruction: u32) {
[INFO] [stderr]     |                                                   ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:737:46
[INFO] [stderr]     |
[INFO] [stderr] 737 |     fn halfword_data_transfer_imm(&mut self, instruction: u32) {
[INFO] [stderr]     |                                              ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:741:40
[INFO] [stderr]     |
[INFO] [stderr] 741 |     fn single_data_transfer(&mut self, instruction: u32) {
[INFO] [stderr]     |                                        ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:745:29
[INFO] [stderr]     |
[INFO] [stderr] 745 |     fn undefined(&mut self, instruction: u32) {
[INFO] [stderr]     |                             ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rlist`
[INFO] [stderr]    --> src/cpu/mod.rs:750:13
[INFO] [stderr]     |
[INFO] [stderr] 750 |         let rlist = instruction & 0b111111111111111;
[INFO] [stderr]     |             ^^^^^ help: if this is intentional, prefix it with an underscore: `_rlist`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rn`
[INFO] [stderr]    --> src/cpu/mod.rs:751:13
[INFO] [stderr]     |
[INFO] [stderr] 751 |         let rn = instruction >> 16 & 0xf;
[INFO] [stderr]     |             ^^ help: if this is intentional, prefix it with an underscore: `_rn`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `l`
[INFO] [stderr]    --> src/cpu/mod.rs:752:13
[INFO] [stderr]     |
[INFO] [stderr] 752 |         let l = instruction >> 20 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_l`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `w`
[INFO] [stderr]    --> src/cpu/mod.rs:753:13
[INFO] [stderr]     |
[INFO] [stderr] 753 |         let w = instruction >> 21 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_w`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `s`
[INFO] [stderr]    --> src/cpu/mod.rs:754:13
[INFO] [stderr]     |
[INFO] [stderr] 754 |         let s = instruction >> 22 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_s`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `u`
[INFO] [stderr]    --> src/cpu/mod.rs:755:13
[INFO] [stderr]     |
[INFO] [stderr] 755 |         let u = instruction >> 23 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_u`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `p`
[INFO] [stderr]    --> src/cpu/mod.rs:756:13
[INFO] [stderr]     |
[INFO] [stderr] 756 |         let p = instruction >> 24 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_p`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:774:45
[INFO] [stderr]     |
[INFO] [stderr] 774 |     fn coprocessor_data_transfer(&mut self, instruction: u32) {
[INFO] [stderr]     |                                             ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:778:46
[INFO] [stderr]     |
[INFO] [stderr] 778 |     fn coprocessor_data_operation(&mut self, instruction: u32) {
[INFO] [stderr]     |                                              ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:782:49
[INFO] [stderr]     |
[INFO] [stderr] 782 |     fn coprocessor_register_transfer(&mut self, instruction: u32) {
[INFO] [stderr]     |                                                 ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:786:37
[INFO] [stderr]     |
[INFO] [stderr] 786 |     fn software_interupt(&mut self, instruction: u32) {
[INFO] [stderr]     |                                     ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rb`
[INFO] [stderr]    --> src/cpu/mod.rs:896:17
[INFO] [stderr]     |
[INFO] [stderr] 896 |             let rb = instruction >> 8 & 0b111;
[INFO] [stderr]     |                 ^^ help: if this is intentional, prefix it with an underscore: `_rb`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rlist`
[INFO] [stderr]    --> src/cpu/mod.rs:898:17
[INFO] [stderr]     |
[INFO] [stderr] 898 |             let rlist = instruction & 0xff;
[INFO] [stderr]     |                 ^^^^^ help: if this is intentional, prefix it with an underscore: `_rlist`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `opcode`
[INFO] [stderr]    --> src/cpu/mod.rs:991:17
[INFO] [stderr]     |
[INFO] [stderr] 991 |             let opcode = instruction >> 11 & 0x1f;
[INFO] [stderr]     |                 ^^^^^^ help: if this is intentional, prefix it with an underscore: `_opcode`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `nn`
[INFO] [stderr]    --> src/cpu/mod.rs:993:17
[INFO] [stderr]     |
[INFO] [stderr] 993 |             let nn = instruction & 0x7ff;
[INFO] [stderr]     |                 ^^ help: if this is intentional, prefix it with an underscore: `_nn`
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable expression
[INFO] [stderr]    --> src/cpu/mod.rs:342:9
[INFO] [stderr]     |
[INFO] [stderr] 342 |         return unreachable!();
[INFO] [stderr]     |         ^^^^^^^--------------
[INFO] [stderr]     |         |      |
[INFO] [stderr]     |         |      any code following this expression is unreachable
[INFO] [stderr]     |         unreachable expression
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(unreachable_code)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable expression
[INFO] [stderr]    --> src/cpu/mod.rs:662:9
[INFO] [stderr]     |
[INFO] [stderr] 662 |         return unreachable!();
[INFO] [stderr]     |         ^^^^^^^--------------
[INFO] [stderr]     |         |      |
[INFO] [stderr]     |         |      any code following this expression is unreachable
[INFO] [stderr]     |         unreachable expression
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `User`
[INFO] [stderr]   --> src/cpu/arm.rs:19:5
[INFO] [stderr]    |
[INFO] [stderr] 19 |     User = 0b10000,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(dead_code)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Fiq`
[INFO] [stderr]   --> src/cpu/arm.rs:20:5
[INFO] [stderr]    |
[INFO] [stderr] 20 |     Fiq = 0b10001,
[INFO] [stderr]    |     ^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Irq`
[INFO] [stderr]   --> src/cpu/arm.rs:21:5
[INFO] [stderr]    |
[INFO] [stderr] 21 |     Irq = 0b10010,
[INFO] [stderr]    |     ^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Supervisor`
[INFO] [stderr]   --> src/cpu/arm.rs:22:5
[INFO] [stderr]    |
[INFO] [stderr] 22 |     Supervisor = 0b10011,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Abort`
[INFO] [stderr]   --> src/cpu/arm.rs:23:5
[INFO] [stderr]    |
[INFO] [stderr] 23 |     Abort = 0b10111,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Undefined`
[INFO] [stderr]   --> src/cpu/arm.rs:24:5
[INFO] [stderr]    |
[INFO] [stderr] 24 |     Undefined = 0b11011,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: enum is never used: `Exception`
[INFO] [stderr]   --> src/cpu/arm.rs:28:10
[INFO] [stderr]    |
[INFO] [stderr] 28 | pub enum Exception {
[INFO] [stderr]    |          ^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `priority`
[INFO] [stderr]   --> src/cpu/arm.rs:40:5
[INFO] [stderr]    |
[INFO] [stderr] 40 |     pub fn priority(self) -> u8 {
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `mode_on_entry`
[INFO] [stderr]   --> src/cpu/arm.rs:53:5
[INFO] [stderr]    |
[INFO] [stderr] 53 |     pub fn mode_on_entry(self) -> PrivilegeMode {
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `EQ`
[INFO] [stderr]  --> src/cpu/arm_instruction.rs:5:5
[INFO] [stderr]   |
[INFO] [stderr] 5 |     EQ = 0b0000,
[INFO] [stderr]   |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `NE`
[INFO] [stderr]  --> src/cpu/arm_instruction.rs:7:5
[INFO] [stderr]   |
[INFO] [stderr] 7 |     NE = 0b0001,
[INFO] [stderr]   |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `HS`
[INFO] [stderr]  --> src/cpu/arm_instruction.rs:9:5
[INFO] [stderr]   |
[INFO] [stderr] 9 |     HS = 0b0010,
[INFO] [stderr]   |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LO`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:11:5
[INFO] [stderr]    |
[INFO] [stderr] 11 |     LO = 0b0011,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `MI`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:13:5
[INFO] [stderr]    |
[INFO] [stderr] 13 |     MI = 0b0100,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `PL`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:15:5
[INFO] [stderr]    |
[INFO] [stderr] 15 |     PL = 0b0101,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `VS`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:17:5
[INFO] [stderr]    |
[INFO] [stderr] 17 |     VS = 0b0110,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `VC`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:19:5
[INFO] [stderr]    |
[INFO] [stderr] 19 |     VC = 0b0111,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `HI`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:21:5
[INFO] [stderr]    |
[INFO] [stderr] 21 |     HI = 0b1000,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LS`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:23:5
[INFO] [stderr]    |
[INFO] [stderr] 23 |     LS = 0b1001,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `GE`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:25:5
[INFO] [stderr]    |
[INFO] [stderr] 25 |     GE = 0b1010,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LT`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:27:5
[INFO] [stderr]    |
[INFO] [stderr] 27 |     LT = 0b1011,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `GT`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:29:5
[INFO] [stderr]    |
[INFO] [stderr] 29 |     GT = 0b1100,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LE`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:31:5
[INFO] [stderr]    |
[INFO] [stderr] 31 |     LE = 0b1101,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `NV`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:35:5
[INFO] [stderr]    |
[INFO] [stderr] 35 |     NV = 0b1111,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: enum is never used: `ArmOpcode`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:44:10
[INFO] [stderr]    |
[INFO] [stderr] 44 | pub enum ArmOpcode {
[INFO] [stderr]    |          ^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `cycles_to_event`
[INFO] [stderr]   --> src/cpu/mod.rs:17:5
[INFO] [stderr]    |
[INFO] [stderr] 17 |     cycles_to_event: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `shifter_operand`
[INFO] [stderr]   --> src/cpu/mod.rs:19:5
[INFO] [stderr]    |
[INFO] [stderr] 19 |     shifter_operand: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `shifter_carry_out`
[INFO] [stderr]   --> src/cpu/mod.rs:21:5
[INFO] [stderr]    |
[INFO] [stderr] 21 |     shifter_carry_out: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `offset`
[INFO] [stderr]   --> src/cpu/mod.rs:32:5
[INFO] [stderr]    |
[INFO] [stderr] 32 |     offset: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr`
[INFO] [stderr]   --> src/cpu/mod.rs:35:5
[INFO] [stderr]    |
[INFO] [stderr] 35 |     spsr: [ProgramStatusRegister; 7],
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r8_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:37:5
[INFO] [stderr]    |
[INFO] [stderr] 37 |     r8_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r9_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:38:5
[INFO] [stderr]    |
[INFO] [stderr] 38 |     r9_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r10_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:39:5
[INFO] [stderr]    |
[INFO] [stderr] 39 |     r10_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r11_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:40:5
[INFO] [stderr]    |
[INFO] [stderr] 40 |     r11_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r12_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:41:5
[INFO] [stderr]    |
[INFO] [stderr] 41 |     r12_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:43:5
[INFO] [stderr]    |
[INFO] [stderr] 43 |     sp_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:44:5
[INFO] [stderr]    |
[INFO] [stderr] 44 |     lr_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:45:5
[INFO] [stderr]    |
[INFO] [stderr] 45 |     spsr_fiq: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_svc`
[INFO] [stderr]   --> src/cpu/mod.rs:47:5
[INFO] [stderr]    |
[INFO] [stderr] 47 |     sp_svc: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_abt`
[INFO] [stderr]   --> src/cpu/mod.rs:51:5
[INFO] [stderr]    |
[INFO] [stderr] 51 |     sp_abt: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_abt`
[INFO] [stderr]   --> src/cpu/mod.rs:52:5
[INFO] [stderr]    |
[INFO] [stderr] 52 |     lr_abt: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_abt`
[INFO] [stderr]   --> src/cpu/mod.rs:53:5
[INFO] [stderr]    |
[INFO] [stderr] 53 |     spsr_abt: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_irq`
[INFO] [stderr]   --> src/cpu/mod.rs:55:5
[INFO] [stderr]    |
[INFO] [stderr] 55 |     sp_irq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_irq`
[INFO] [stderr]   --> src/cpu/mod.rs:56:5
[INFO] [stderr]    |
[INFO] [stderr] 56 |     lr_irq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_irq`
[INFO] [stderr]   --> src/cpu/mod.rs:57:5
[INFO] [stderr]    |
[INFO] [stderr] 57 |     spsr_irq: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_und`
[INFO] [stderr]   --> src/cpu/mod.rs:59:5
[INFO] [stderr]    |
[INFO] [stderr] 59 |     sp_und: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_und`
[INFO] [stderr]   --> src/cpu/mod.rs:60:5
[INFO] [stderr]    |
[INFO] [stderr] 60 |     lr_und: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_und`
[INFO] [stderr]   --> src/cpu/mod.rs:61:5
[INFO] [stderr]    |
[INFO] [stderr] 61 |     spsr_und: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `cycle`
[INFO] [stderr]    --> src/cpu/mod.rs:145:5
[INFO] [stderr]     |
[INFO] [stderr] 145 |     fn cycle(&mut self) {
[INFO] [stderr]     |     ^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `has_spsr`
[INFO] [stderr]    --> src/cpu/mod.rs:169:5
[INFO] [stderr]     |
[INFO] [stderr] 169 |     fn has_spsr(&mut self, mode: PrivilegeMode) -> bool {
[INFO] [stderr]     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: crate `GBA` should have a snake case name
[INFO] [stderr]   |
[INFO] [stderr]   = note: `#[warn(non_snake_case)]` on by default
[INFO] [stderr]   = help: convert the identifier to snake case: `gba`
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable pattern
[INFO] [stderr]    --> src/cpu/mod.rs:165:13
[INFO] [stderr]     |
[INFO] [stderr] 165 |             _ => unreachable!(),
[INFO] [stderr]     |             ^
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(unreachable_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable pattern
[INFO] [stderr]    --> src/cpu/mod.rs:261:13
[INFO] [stderr]     |
[INFO] [stderr] 261 |             _ => unreachable!(),
[INFO] [stderr]     |             ^
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:430:34
[INFO] [stderr]     |
[INFO] [stderr] 430 |     fn alu_operations(&mut self, instruction: u16) {
[INFO] [stderr]     |                                  ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(unused_variables)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:434:58
[INFO] [stderr]     |
[INFO] [stderr] 434 |     fn hi_register_operations_branch_exchange(&mut self, instruction: u16) {
[INFO] [stderr]     |                                                          ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:438:36
[INFO] [stderr]     |
[INFO] [stderr] 438 |     fn pc_relative_load(&mut self, instruction: u16) {
[INFO] [stderr]     |                                    ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:516:46
[INFO] [stderr]     |
[INFO] [stderr] 516 |     fn load_store_with_imm_offset(&mut self, instruction: u16) {
[INFO] [stderr]     |                                              ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:520:39
[INFO] [stderr]     |
[INFO] [stderr] 520 |     fn load_store_halfword(&mut self, instruction: u16) {
[INFO] [stderr]     |                                       ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:564:47
[INFO] [stderr]     |
[INFO] [stderr] 564 |     fn add_offset_to_stack_pointer(&mut self, instruction: u16) {
[INFO] [stderr]     |                                               ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:568:38
[INFO] [stderr]     |
[INFO] [stderr] 568 |     fn push_pop_registers(&mut self, instruction: u16) {
[INFO] [stderr]     |                                      ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:572:39
[INFO] [stderr]     |
[INFO] [stderr] 572 |     fn multiply_load_store(&mut self, instruction: u16) {
[INFO] [stderr]     |                                       ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:576:38
[INFO] [stderr]     |
[INFO] [stderr] 576 |     fn conditional_branch(&mut self, instruction: u16) {
[INFO] [stderr]     |                                      ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:580:38
[INFO] [stderr]     |
[INFO] [stderr] 580 |     fn software_interrupt(&mut self, instruction: u16) {
[INFO] [stderr]     |                                      ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:591:41
[INFO] [stderr]     |
[INFO] [stderr] 591 |     fn long_branch_with_link(&mut self, instruction: u16) {
[INFO] [stderr]     |                                         ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `s`
[INFO] [stderr]    --> src/cpu/mod.rs:669:13
[INFO] [stderr]     |
[INFO] [stderr] 669 |         let s = instruction >> 21 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_s`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:710:28
[INFO] [stderr]     |
[INFO] [stderr] 710 |     fn multiply(&mut self, instruction: u32) {
[INFO] [stderr]     |                            ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:714:33
[INFO] [stderr]     |
[INFO] [stderr] 714 |     fn multiply_long(&mut self, instruction: u32) {
[INFO] [stderr]     |                                 ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:718:36
[INFO] [stderr]     |
[INFO] [stderr] 718 |     fn single_data_swap(&mut self, instruction: u32) {
[INFO] [stderr]     |                                    ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:733:51
[INFO] [stderr]     |
[INFO] [stderr] 733 |     fn halfword_data_transfer_register(&mut self, instruction: u32) {
[INFO] [stderr]     |                                                   ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:737:46
[INFO] [stderr]     |
[INFO] [stderr] 737 |     fn halfword_data_transfer_imm(&mut self, instruction: u32) {
[INFO] [stderr]     |                                              ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:741:40
[INFO] [stderr]     |
[INFO] [stderr] 741 |     fn single_data_transfer(&mut self, instruction: u32) {
[INFO] [stderr]     |                                        ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:745:29
[INFO] [stderr]     |
[INFO] [stderr] 745 |     fn undefined(&mut self, instruction: u32) {
[INFO] [stderr]     |                             ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rlist`
[INFO] [stderr]    --> src/cpu/mod.rs:750:13
[INFO] [stderr]     |
[INFO] [stderr] 750 |         let rlist = instruction & 0b111111111111111;
[INFO] [stderr]     |             ^^^^^ help: if this is intentional, prefix it with an underscore: `_rlist`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rn`
[INFO] [stderr]    --> src/cpu/mod.rs:751:13
[INFO] [stderr]     |
[INFO] [stderr] 751 |         let rn = instruction >> 16 & 0xf;
[INFO] [stderr]     |             ^^ help: if this is intentional, prefix it with an underscore: `_rn`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `l`
[INFO] [stderr]    --> src/cpu/mod.rs:752:13
[INFO] [stderr]     |
[INFO] [stderr] 752 |         let l = instruction >> 20 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_l`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `w`
[INFO] [stderr]    --> src/cpu/mod.rs:753:13
[INFO] [stderr]     |
[INFO] [stderr] 753 |         let w = instruction >> 21 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_w`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `s`
[INFO] [stderr]    --> src/cpu/mod.rs:754:13
[INFO] [stderr]     |
[INFO] [stderr] 754 |         let s = instruction >> 22 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_s`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `u`
[INFO] [stderr]    --> src/cpu/mod.rs:755:13
[INFO] [stderr]     |
[INFO] [stderr] 755 |         let u = instruction >> 23 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_u`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `p`
[INFO] [stderr]    --> src/cpu/mod.rs:756:13
[INFO] [stderr]     |
[INFO] [stderr] 756 |         let p = instruction >> 24 & 0b1;
[INFO] [stderr]     |             ^ help: if this is intentional, prefix it with an underscore: `_p`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:774:45
[INFO] [stderr]     |
[INFO] [stderr] 774 |     fn coprocessor_data_transfer(&mut self, instruction: u32) {
[INFO] [stderr]     |                                             ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:778:46
[INFO] [stderr]     |
[INFO] [stderr] 778 |     fn coprocessor_data_operation(&mut self, instruction: u32) {
[INFO] [stderr]     |                                              ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:782:49
[INFO] [stderr]     |
[INFO] [stderr] 782 |     fn coprocessor_register_transfer(&mut self, instruction: u32) {
[INFO] [stderr]     |                                                 ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `instruction`
[INFO] [stderr]    --> src/cpu/mod.rs:786:37
[INFO] [stderr]     |
[INFO] [stderr] 786 |     fn software_interupt(&mut self, instruction: u32) {
[INFO] [stderr]     |                                     ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_instruction`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rb`
[INFO] [stderr]    --> src/cpu/mod.rs:896:17
[INFO] [stderr]     |
[INFO] [stderr] 896 |             let rb = instruction >> 8 & 0b111;
[INFO] [stderr]     |                 ^^ help: if this is intentional, prefix it with an underscore: `_rb`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rlist`
[INFO] [stderr]    --> src/cpu/mod.rs:898:17
[INFO] [stderr]     |
[INFO] [stderr] 898 |             let rlist = instruction & 0xff;
[INFO] [stderr]     |                 ^^^^^ help: if this is intentional, prefix it with an underscore: `_rlist`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `opcode`
[INFO] [stderr]    --> src/cpu/mod.rs:991:17
[INFO] [stderr]     |
[INFO] [stderr] 991 |             let opcode = instruction >> 11 & 0x1f;
[INFO] [stderr]     |                 ^^^^^^ help: if this is intentional, prefix it with an underscore: `_opcode`
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `nn`
[INFO] [stderr]    --> src/cpu/mod.rs:993:17
[INFO] [stderr]     |
[INFO] [stderr] 993 |             let nn = instruction & 0x7ff;
[INFO] [stderr]     |                 ^^ help: if this is intentional, prefix it with an underscore: `_nn`
[INFO] [stderr] 
[INFO] [stderr] warning: 93 warnings emitted
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `User`
[INFO] [stderr]   --> src/cpu/arm.rs:19:5
[INFO] [stderr]    |
[INFO] [stderr] 19 |     User = 0b10000,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(dead_code)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Fiq`
[INFO] [stderr]   --> src/cpu/arm.rs:20:5
[INFO] [stderr]    |
[INFO] [stderr] 20 |     Fiq = 0b10001,
[INFO] [stderr]    |     ^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Irq`
[INFO] [stderr]   --> src/cpu/arm.rs:21:5
[INFO] [stderr]    |
[INFO] [stderr] 21 |     Irq = 0b10010,
[INFO] [stderr]    |     ^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Supervisor`
[INFO] [stderr]   --> src/cpu/arm.rs:22:5
[INFO] [stderr]    |
[INFO] [stderr] 22 |     Supervisor = 0b10011,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Abort`
[INFO] [stderr]   --> src/cpu/arm.rs:23:5
[INFO] [stderr]    |
[INFO] [stderr] 23 |     Abort = 0b10111,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Undefined`
[INFO] [stderr]   --> src/cpu/arm.rs:24:5
[INFO] [stderr]    |
[INFO] [stderr] 24 |     Undefined = 0b11011,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: enum is never used: `Exception`
[INFO] [stderr]   --> src/cpu/arm.rs:28:10
[INFO] [stderr]    |
[INFO] [stderr] 28 | pub enum Exception {
[INFO] [stderr]    |          ^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `priority`
[INFO] [stderr]   --> src/cpu/arm.rs:40:5
[INFO] [stderr]    |
[INFO] [stderr] 40 |     pub fn priority(self) -> u8 {
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `mode_on_entry`
[INFO] [stderr]   --> src/cpu/arm.rs:53:5
[INFO] [stderr]    |
[INFO] [stderr] 53 |     pub fn mode_on_entry(self) -> PrivilegeMode {
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `EQ`
[INFO] [stderr]  --> src/cpu/arm_instruction.rs:5:5
[INFO] [stderr]   |
[INFO] [stderr] 5 |     EQ = 0b0000,
[INFO] [stderr]   |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `NE`
[INFO] [stderr]  --> src/cpu/arm_instruction.rs:7:5
[INFO] [stderr]   |
[INFO] [stderr] 7 |     NE = 0b0001,
[INFO] [stderr]   |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `HS`
[INFO] [stderr]  --> src/cpu/arm_instruction.rs:9:5
[INFO] [stderr]   |
[INFO] [stderr] 9 |     HS = 0b0010,
[INFO] [stderr]   |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LO`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:11:5
[INFO] [stderr]    |
[INFO] [stderr] 11 |     LO = 0b0011,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `MI`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:13:5
[INFO] [stderr]    |
[INFO] [stderr] 13 |     MI = 0b0100,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `PL`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:15:5
[INFO] [stderr]    |
[INFO] [stderr] 15 |     PL = 0b0101,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `VS`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:17:5
[INFO] [stderr]    |
[INFO] [stderr] 17 |     VS = 0b0110,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `VC`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:19:5
[INFO] [stderr]    |
[INFO] [stderr] 19 |     VC = 0b0111,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `HI`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:21:5
[INFO] [stderr]    |
[INFO] [stderr] 21 |     HI = 0b1000,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LS`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:23:5
[INFO] [stderr]    |
[INFO] [stderr] 23 |     LS = 0b1001,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `GE`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:25:5
[INFO] [stderr]    |
[INFO] [stderr] 25 |     GE = 0b1010,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LT`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:27:5
[INFO] [stderr]    |
[INFO] [stderr] 27 |     LT = 0b1011,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `GT`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:29:5
[INFO] [stderr]    |
[INFO] [stderr] 29 |     GT = 0b1100,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `LE`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:31:5
[INFO] [stderr]    |
[INFO] [stderr] 31 |     LE = 0b1101,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `NV`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:35:5
[INFO] [stderr]    |
[INFO] [stderr] 35 |     NV = 0b1111,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: enum is never used: `ArmOpcode`
[INFO] [stderr]   --> src/cpu/arm_instruction.rs:44:10
[INFO] [stderr]    |
[INFO] [stderr] 44 | pub enum ArmOpcode {
[INFO] [stderr]    |          ^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `cycles_to_event`
[INFO] [stderr]   --> src/cpu/mod.rs:17:5
[INFO] [stderr]    |
[INFO] [stderr] 17 |     cycles_to_event: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `shifter_operand`
[INFO] [stderr]   --> src/cpu/mod.rs:19:5
[INFO] [stderr]    |
[INFO] [stderr] 19 |     shifter_operand: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `shifter_carry_out`
[INFO] [stderr]   --> src/cpu/mod.rs:21:5
[INFO] [stderr]    |
[INFO] [stderr] 21 |     shifter_carry_out: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `offset`
[INFO] [stderr]   --> src/cpu/mod.rs:32:5
[INFO] [stderr]    |
[INFO] [stderr] 32 |     offset: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr`
[INFO] [stderr]   --> src/cpu/mod.rs:35:5
[INFO] [stderr]    |
[INFO] [stderr] 35 |     spsr: [ProgramStatusRegister; 7],
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r8_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:37:5
[INFO] [stderr]    |
[INFO] [stderr] 37 |     r8_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r9_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:38:5
[INFO] [stderr]    |
[INFO] [stderr] 38 |     r9_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r10_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:39:5
[INFO] [stderr]    |
[INFO] [stderr] 39 |     r10_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r11_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:40:5
[INFO] [stderr]    |
[INFO] [stderr] 40 |     r11_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `r12_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:41:5
[INFO] [stderr]    |
[INFO] [stderr] 41 |     r12_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:43:5
[INFO] [stderr]    |
[INFO] [stderr] 43 |     sp_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:44:5
[INFO] [stderr]    |
[INFO] [stderr] 44 |     lr_fiq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_fiq`
[INFO] [stderr]   --> src/cpu/mod.rs:45:5
[INFO] [stderr]    |
[INFO] [stderr] 45 |     spsr_fiq: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_svc`
[INFO] [stderr]   --> src/cpu/mod.rs:47:5
[INFO] [stderr]    |
[INFO] [stderr] 47 |     sp_svc: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_abt`
[INFO] [stderr]   --> src/cpu/mod.rs:51:5
[INFO] [stderr]    |
[INFO] [stderr] 51 |     sp_abt: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_abt`
[INFO] [stderr]   --> src/cpu/mod.rs:52:5
[INFO] [stderr]    |
[INFO] [stderr] 52 |     lr_abt: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_abt`
[INFO] [stderr]   --> src/cpu/mod.rs:53:5
[INFO] [stderr]    |
[INFO] [stderr] 53 |     spsr_abt: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_irq`
[INFO] [stderr]   --> src/cpu/mod.rs:55:5
[INFO] [stderr]    |
[INFO] [stderr] 55 |     sp_irq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_irq`
[INFO] [stderr]   --> src/cpu/mod.rs:56:5
[INFO] [stderr]    |
[INFO] [stderr] 56 |     lr_irq: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_irq`
[INFO] [stderr]   --> src/cpu/mod.rs:57:5
[INFO] [stderr]    |
[INFO] [stderr] 57 |     spsr_irq: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `sp_und`
[INFO] [stderr]   --> src/cpu/mod.rs:59:5
[INFO] [stderr]    |
[INFO] [stderr] 59 |     sp_und: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `lr_und`
[INFO] [stderr]   --> src/cpu/mod.rs:60:5
[INFO] [stderr]    |
[INFO] [stderr] 60 |     lr_und: u32,
[INFO] [stderr]    |     ^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: field is never read: `spsr_und`
[INFO] [stderr]   --> src/cpu/mod.rs:61:5
[INFO] [stderr]    |
[INFO] [stderr] 61 |     spsr_und: ProgramStatusRegister,
[INFO] [stderr]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `cycle`
[INFO] [stderr]    --> src/cpu/mod.rs:145:5
[INFO] [stderr]     |
[INFO] [stderr] 145 |     fn cycle(&mut self) {
[INFO] [stderr]     |     ^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `has_spsr`
[INFO] [stderr]    --> src/cpu/mod.rs:169:5
[INFO] [stderr]     |
[INFO] [stderr] 169 |     fn has_spsr(&mut self, mode: PrivilegeMode) -> bool {
[INFO] [stderr]     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: crate `GBA` should have a snake case name
[INFO] [stderr]   |
[INFO] [stderr]   = note: `#[warn(non_snake_case)]` on by default
[INFO] [stderr]   = help: convert the identifier to snake case: `gba`
[INFO] [stderr] 
[INFO] [stderr] warning: 93 warnings emitted
[INFO] [stderr] 
[INFO] [stderr]     Finished dev [unoptimized + debuginfo] target(s) in 0.78s
[INFO] running `"docker" "inspect" "0a447934c6e51b3a5593d3099af903eab78e246b40ec82a844fdb3151d5e2ee7"`
[INFO] running `"docker" "rm" "-f" "0a447934c6e51b3a5593d3099af903eab78e246b40ec82a844fdb3151d5e2ee7"`
[INFO] [stdout] 0a447934c6e51b3a5593d3099af903eab78e246b40ec82a844fdb3151d5e2ee7