[INFO] updating cached repository wwared/rgb [INFO] running `"git" "fetch" "--all"` [INFO] [stdout] Fetching origin [INFO] [stderr] From git://github.com/wwared/rgb [INFO] [stderr] * branch HEAD -> FETCH_HEAD [INFO] running `"git" "clone" "work/cache/sources/gh/wwared/rgb" "work/ex/pr-63376/sources/master#60960a260f7b5c695fd0717311d72ce62dd4eb43/gh/wwared/rgb"` [INFO] [stderr] Cloning into 'work/ex/pr-63376/sources/master#60960a260f7b5c695fd0717311d72ce62dd4eb43/gh/wwared/rgb'... [INFO] [stderr] done. [INFO] running `"git" "clone" "work/cache/sources/gh/wwared/rgb" "work/ex/pr-63376/sources/try#266783e4e09e4e9d5307c1c8e695659c58bbcac7/gh/wwared/rgb"` [INFO] [stderr] Cloning into 'work/ex/pr-63376/sources/try#266783e4e09e4e9d5307c1c8e695659c58bbcac7/gh/wwared/rgb'... [INFO] [stderr] done. [INFO] running `"git" "rev-parse" "HEAD"` [INFO] [stdout] d63ec1874cb333fadf6067622487425f53512930 [INFO] sha for GitHub repo wwared/rgb: d63ec1874cb333fadf6067622487425f53512930 [INFO] validating manifest of wwared/rgb on toolchain master#60960a260f7b5c695fd0717311d72ce62dd4eb43 [INFO] running `"/mnt/big/crater/work/local/cargo-home/bin/cargo" "+60960a260f7b5c695fd0717311d72ce62dd4eb43-alt" "read-manifest" "--manifest-path" "Cargo.toml"` [INFO] validating manifest of wwared/rgb on toolchain try#266783e4e09e4e9d5307c1c8e695659c58bbcac7 [INFO] running `"/mnt/big/crater/work/local/cargo-home/bin/cargo" "+266783e4e09e4e9d5307c1c8e695659c58bbcac7-alt" "read-manifest" "--manifest-path" "Cargo.toml"` [INFO] started frobbing wwared/rgb [INFO] finished frobbing wwared/rgb [INFO] frobbed toml for wwared/rgb written to work/ex/pr-63376/sources/master#60960a260f7b5c695fd0717311d72ce62dd4eb43/gh/wwared/rgb/Cargo.toml [INFO] started frobbing wwared/rgb [INFO] finished frobbing wwared/rgb [INFO] frobbed toml for wwared/rgb written to work/ex/pr-63376/sources/try#266783e4e09e4e9d5307c1c8e695659c58bbcac7/gh/wwared/rgb/Cargo.toml [INFO] crate wwared/rgb already has a lockfile, it will not be regenerated [INFO] running `"/mnt/big/crater/work/local/cargo-home/bin/cargo" "+60960a260f7b5c695fd0717311d72ce62dd4eb43-alt" "fetch" "--locked" "--manifest-path" "Cargo.toml"` [INFO] running `"/mnt/big/crater/work/local/cargo-home/bin/cargo" "+266783e4e09e4e9d5307c1c8e695659c58bbcac7-alt" "fetch" "--locked" "--manifest-path" "Cargo.toml"` [INFO] checking wwared/rgb against try#266783e4e09e4e9d5307c1c8e695659c58bbcac7 for pr-63376 [INFO] running `"docker" "create" "-v" "/mnt/big/crater/work/local/target-dirs/pr-63376/worker-7/try#266783e4e09e4e9d5307c1c8e695659c58bbcac7:/opt/crater/target:rw,Z" "-v" "/mnt/big/crater/work/ex/pr-63376/sources/try#266783e4e09e4e9d5307c1c8e695659c58bbcac7/gh/wwared/rgb:/opt/crater/workdir:ro,Z" "-v" "/mnt/big/crater/work/local/cargo-home:/opt/crater/cargo-home:ro,Z" "-v" "/mnt/big/crater/work/local/rustup-home:/opt/crater/rustup-home:ro,Z" "-e" "USER_ID=1000" "-e" "SOURCE_DIR=/opt/crater/workdir" "-e" "MAP_USER_ID=1000" "-e" "CARGO_TARGET_DIR=/opt/crater/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/crater/cargo-home" "-e" "RUSTUP_HOME=/opt/crater/rustup-home" "-w" "/opt/crater/workdir" "-m" "1536M" "--network" "none" "rustops/crates-build-env" "/opt/crater/cargo-home/bin/cargo" "+266783e4e09e4e9d5307c1c8e695659c58bbcac7-alt" "check" "--frozen" "--all" "--all-targets"` [INFO] [stdout] 0076cb6dd12f3b6f1d7639d199617281ad2403e7f62009720d180faeea74e9a3 [INFO] running `"docker" "start" "-a" "0076cb6dd12f3b6f1d7639d199617281ad2403e7f62009720d180faeea74e9a3"` [INFO] [stderr] Checking rgb v0.1.0 (/opt/crater/workdir) [INFO] [stderr] warning: unused import: `mem::ROM` [INFO] [stderr] --> src/cpu.rs:6:5 [INFO] [stderr] | [INFO] [stderr] 6 | use mem::ROM; [INFO] [stderr] | ^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_imports)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:407:12 [INFO] [stderr] | [INFO] [stderr] 407 | 0x80 ... 0x87 => AddReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(ellipsis_inclusive_range_patterns)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:408:12 [INFO] [stderr] | [INFO] [stderr] 408 | 0x88 ... 0x8F => AddCarryReg8(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:409:12 [INFO] [stderr] | [INFO] [stderr] 409 | 0x90 ... 0x97 => SubReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:410:12 [INFO] [stderr] | [INFO] [stderr] 410 | 0x98 ... 0x9F => SubCarryReg8(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:411:12 [INFO] [stderr] | [INFO] [stderr] 411 | 0xA0 ... 0xA7 => AndReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:412:12 [INFO] [stderr] | [INFO] [stderr] 412 | 0xA8 ... 0xAF => XorReg8(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:413:12 [INFO] [stderr] | [INFO] [stderr] 413 | 0xB0 ... 0xB7 => OrReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:414:12 [INFO] [stderr] | [INFO] [stderr] 414 | 0xB8 ... 0xBF => Compare(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:443:12 [INFO] [stderr] | [INFO] [stderr] 443 | 0x40 ... 0x47 => LoadReg8(Reg8::B, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:444:12 [INFO] [stderr] | [INFO] [stderr] 444 | 0x48 ... 0x4F => LoadReg8(Reg8::C, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:445:12 [INFO] [stderr] | [INFO] [stderr] 445 | 0x50 ... 0x57 => LoadReg8(Reg8::D, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:446:12 [INFO] [stderr] | [INFO] [stderr] 446 | 0x58 ... 0x5F => LoadReg8(Reg8::E, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:447:12 [INFO] [stderr] | [INFO] [stderr] 447 | 0x60 ... 0x67 => LoadReg8(Reg8::H, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:448:12 [INFO] [stderr] | [INFO] [stderr] 448 | 0x68 ... 0x6F => LoadReg8(Reg8::L, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:449:12 [INFO] [stderr] | [INFO] [stderr] 449 | 0x70 ... 0x75 | 0x77 => LoadReg8(Reg8::MemHL, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:450:12 [INFO] [stderr] | [INFO] [stderr] 450 | 0x78 ... 0x7F => LoadReg8(Reg8::A, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:491:16 [INFO] [stderr] | [INFO] [stderr] 491 | 0x00 ... 0x07 => Rlc(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:492:16 [INFO] [stderr] | [INFO] [stderr] 492 | 0x08 ... 0x0F => Rrc(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:494:16 [INFO] [stderr] | [INFO] [stderr] 494 | 0x10 ... 0x17 => Rl(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:495:16 [INFO] [stderr] | [INFO] [stderr] 495 | 0x18 ... 0x1F => Rr(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:497:16 [INFO] [stderr] | [INFO] [stderr] 497 | 0x20 ... 0x27 => Sla(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:498:16 [INFO] [stderr] | [INFO] [stderr] 498 | 0x28 ... 0x2F => Sra(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:500:16 [INFO] [stderr] | [INFO] [stderr] 500 | 0x30 ... 0x37 => Swap(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:501:16 [INFO] [stderr] | [INFO] [stderr] 501 | 0x38 ... 0x3F => Srl(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:503:16 [INFO] [stderr] | [INFO] [stderr] 503 | 0x40 ... 0x47 => TestBit(0, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:504:16 [INFO] [stderr] | [INFO] [stderr] 504 | 0x48 ... 0x4F => TestBit(1, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:505:16 [INFO] [stderr] | [INFO] [stderr] 505 | 0x50 ... 0x57 => TestBit(2, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:506:16 [INFO] [stderr] | [INFO] [stderr] 506 | 0x58 ... 0x5F => TestBit(3, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:507:16 [INFO] [stderr] | [INFO] [stderr] 507 | 0x60 ... 0x67 => TestBit(4, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:508:16 [INFO] [stderr] | [INFO] [stderr] 508 | 0x68 ... 0x6F => TestBit(5, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:509:16 [INFO] [stderr] | [INFO] [stderr] 509 | 0x70 ... 0x77 => TestBit(6, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:510:16 [INFO] [stderr] | [INFO] [stderr] 510 | 0x78 ... 0x7F => TestBit(7, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:512:16 [INFO] [stderr] | [INFO] [stderr] 512 | 0x80 ... 0x87 => SetBit(0, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:513:16 [INFO] [stderr] | [INFO] [stderr] 513 | 0x88 ... 0x8F => SetBit(1, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:514:16 [INFO] [stderr] | [INFO] [stderr] 514 | 0x90 ... 0x97 => SetBit(2, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:515:16 [INFO] [stderr] | [INFO] [stderr] 515 | 0x98 ... 0x9F => SetBit(3, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:516:16 [INFO] [stderr] | [INFO] [stderr] 516 | 0xA0 ... 0xA7 => SetBit(4, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:517:16 [INFO] [stderr] | [INFO] [stderr] 517 | 0xA8 ... 0xAF => SetBit(5, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:518:16 [INFO] [stderr] | [INFO] [stderr] 518 | 0xB0 ... 0xB7 => SetBit(6, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:519:16 [INFO] [stderr] | [INFO] [stderr] 519 | 0xB8 ... 0xBF => SetBit(7, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:521:16 [INFO] [stderr] | [INFO] [stderr] 521 | 0xC0 ... 0xC7 => SetBit(0, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:522:16 [INFO] [stderr] | [INFO] [stderr] 522 | 0xC8 ... 0xCF => SetBit(1, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:523:16 [INFO] [stderr] | [INFO] [stderr] 523 | 0xD0 ... 0xD7 => SetBit(2, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:524:16 [INFO] [stderr] | [INFO] [stderr] 524 | 0xD8 ... 0xDF => SetBit(3, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:525:16 [INFO] [stderr] | [INFO] [stderr] 525 | 0xE0 ... 0xE7 => SetBit(4, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:526:16 [INFO] [stderr] | [INFO] [stderr] 526 | 0xE8 ... 0xEF => SetBit(5, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:527:16 [INFO] [stderr] | [INFO] [stderr] 527 | 0xF0 ... 0xF7 => SetBit(6, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:528:16 [INFO] [stderr] | [INFO] [stderr] 528 | 0xF8 ... 0xFF => SetBit(7, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: unused import: `mem::ROM` [INFO] [stderr] --> src/cpu.rs:6:5 [INFO] [stderr] | [INFO] [stderr] 6 | use mem::ROM; [INFO] [stderr] | ^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_imports)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:407:12 [INFO] [stderr] | [INFO] [stderr] 407 | 0x80 ... 0x87 => AddReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(ellipsis_inclusive_range_patterns)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:408:12 [INFO] [stderr] | [INFO] [stderr] 408 | 0x88 ... 0x8F => AddCarryReg8(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:409:12 [INFO] [stderr] | [INFO] [stderr] 409 | 0x90 ... 0x97 => SubReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:410:12 [INFO] [stderr] | [INFO] [stderr] 410 | 0x98 ... 0x9F => SubCarryReg8(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:411:12 [INFO] [stderr] | [INFO] [stderr] 411 | 0xA0 ... 0xA7 => AndReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:412:12 [INFO] [stderr] | [INFO] [stderr] 412 | 0xA8 ... 0xAF => XorReg8(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:413:12 [INFO] [stderr] | [INFO] [stderr] 413 | 0xB0 ... 0xB7 => OrReg8(reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:414:12 [INFO] [stderr] | [INFO] [stderr] 414 | 0xB8 ... 0xBF => Compare(reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:443:12 [INFO] [stderr] | [INFO] [stderr] 443 | 0x40 ... 0x47 => LoadReg8(Reg8::B, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:444:12 [INFO] [stderr] | [INFO] [stderr] 444 | 0x48 ... 0x4F => LoadReg8(Reg8::C, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:445:12 [INFO] [stderr] | [INFO] [stderr] 445 | 0x50 ... 0x57 => LoadReg8(Reg8::D, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:446:12 [INFO] [stderr] | [INFO] [stderr] 446 | 0x58 ... 0x5F => LoadReg8(Reg8::E, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:447:12 [INFO] [stderr] | [INFO] [stderr] 447 | 0x60 ... 0x67 => LoadReg8(Reg8::H, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:448:12 [INFO] [stderr] | [INFO] [stderr] 448 | 0x68 ... 0x6F => LoadReg8(Reg8::L, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:449:12 [INFO] [stderr] | [INFO] [stderr] 449 | 0x70 ... 0x75 | 0x77 => LoadReg8(Reg8::MemHL, reg8[(opcode & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:450:12 [INFO] [stderr] | [INFO] [stderr] 450 | 0x78 ... 0x7F => LoadReg8(Reg8::A, reg8[(opcode & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:491:16 [INFO] [stderr] | [INFO] [stderr] 491 | 0x00 ... 0x07 => Rlc(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:492:16 [INFO] [stderr] | [INFO] [stderr] 492 | 0x08 ... 0x0F => Rrc(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:494:16 [INFO] [stderr] | [INFO] [stderr] 494 | 0x10 ... 0x17 => Rl(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:495:16 [INFO] [stderr] | [INFO] [stderr] 495 | 0x18 ... 0x1F => Rr(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:497:16 [INFO] [stderr] | [INFO] [stderr] 497 | 0x20 ... 0x27 => Sla(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:498:16 [INFO] [stderr] | [INFO] [stderr] 498 | 0x28 ... 0x2F => Sra(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:500:16 [INFO] [stderr] | [INFO] [stderr] 500 | 0x30 ... 0x37 => Swap(reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:501:16 [INFO] [stderr] | [INFO] [stderr] 501 | 0x38 ... 0x3F => Srl(reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:503:16 [INFO] [stderr] | [INFO] [stderr] 503 | 0x40 ... 0x47 => TestBit(0, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:504:16 [INFO] [stderr] | [INFO] [stderr] 504 | 0x48 ... 0x4F => TestBit(1, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:505:16 [INFO] [stderr] | [INFO] [stderr] 505 | 0x50 ... 0x57 => TestBit(2, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:506:16 [INFO] [stderr] | [INFO] [stderr] 506 | 0x58 ... 0x5F => TestBit(3, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:507:16 [INFO] [stderr] | [INFO] [stderr] 507 | 0x60 ... 0x67 => TestBit(4, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:508:16 [INFO] [stderr] | [INFO] [stderr] 508 | 0x68 ... 0x6F => TestBit(5, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:509:16 [INFO] [stderr] | [INFO] [stderr] 509 | 0x70 ... 0x77 => TestBit(6, reg8[(opcode2 & 0x0f) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:510:16 [INFO] [stderr] | [INFO] [stderr] 510 | 0x78 ... 0x7F => TestBit(7, reg8[(opcode2 & 0x0f - 8) as usize]), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:512:16 [INFO] [stderr] | [INFO] [stderr] 512 | 0x80 ... 0x87 => SetBit(0, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:513:16 [INFO] [stderr] | [INFO] [stderr] 513 | 0x88 ... 0x8F => SetBit(1, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:514:16 [INFO] [stderr] | [INFO] [stderr] 514 | 0x90 ... 0x97 => SetBit(2, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:515:16 [INFO] [stderr] | [INFO] [stderr] 515 | 0x98 ... 0x9F => SetBit(3, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:516:16 [INFO] [stderr] | [INFO] [stderr] 516 | 0xA0 ... 0xA7 => SetBit(4, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:517:16 [INFO] [stderr] | [INFO] [stderr] 517 | 0xA8 ... 0xAF => SetBit(5, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:518:16 [INFO] [stderr] | [INFO] [stderr] 518 | 0xB0 ... 0xB7 => SetBit(6, reg8[(opcode2 & 0x0f) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:519:16 [INFO] [stderr] | [INFO] [stderr] 519 | 0xB8 ... 0xBF => SetBit(7, reg8[(opcode2 & 0x0f - 8) as usize], false), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:521:16 [INFO] [stderr] | [INFO] [stderr] 521 | 0xC0 ... 0xC7 => SetBit(0, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:522:16 [INFO] [stderr] | [INFO] [stderr] 522 | 0xC8 ... 0xCF => SetBit(1, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:523:16 [INFO] [stderr] | [INFO] [stderr] 523 | 0xD0 ... 0xD7 => SetBit(2, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:524:16 [INFO] [stderr] | [INFO] [stderr] 524 | 0xD8 ... 0xDF => SetBit(3, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:525:16 [INFO] [stderr] | [INFO] [stderr] 525 | 0xE0 ... 0xE7 => SetBit(4, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:526:16 [INFO] [stderr] | [INFO] [stderr] 526 | 0xE8 ... 0xEF => SetBit(5, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:527:16 [INFO] [stderr] | [INFO] [stderr] 527 | 0xF0 ... 0xF7 => SetBit(6, reg8[(opcode2 & 0x0f) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/cpu.rs:528:16 [INFO] [stderr] | [INFO] [stderr] 528 | 0xF8 ... 0xFF => SetBit(7, reg8[(opcode2 & 0x0f - 8) as usize], true), [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] [INFO] [stderr] warning: unreachable pattern [INFO] [stderr] --> src/cpu.rs:530:11 [INFO] [stderr] | [INFO] [stderr] 530 | _ => { [INFO] [stderr] | ^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unreachable_patterns)]` on by default [INFO] [stderr] [INFO] [stderr] warning: unused variable: `cycles` [INFO] [stderr] --> src/cpu.rs:340:9 [INFO] [stderr] | [INFO] [stderr] 340 | let cycles = self.run(next); [INFO] [stderr] | ^^^^^^ help: consider prefixing with an underscore: `_cycles` [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_variables)]` on by default [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:642:15 [INFO] [stderr] | [INFO] [stderr] 642 | AddReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:643:20 [INFO] [stderr] | [INFO] [stderr] 643 | AddCarryReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:644:15 [INFO] [stderr] | [INFO] [stderr] 644 | AddImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:645:20 [INFO] [stderr] | [INFO] [stderr] 645 | AddCarryImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:646:15 [INFO] [stderr] | [INFO] [stderr] 646 | IncReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:647:16 [INFO] [stderr] | [INFO] [stderr] 647 | IncReg16(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:648:15 [INFO] [stderr] | [INFO] [stderr] 648 | SubReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:649:20 [INFO] [stderr] | [INFO] [stderr] 649 | SubCarryReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:650:15 [INFO] [stderr] | [INFO] [stderr] 650 | SubImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:651:20 [INFO] [stderr] | [INFO] [stderr] 651 | SubCarryImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:652:15 [INFO] [stderr] | [INFO] [stderr] 652 | Compare(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:653:19 [INFO] [stderr] | [INFO] [stderr] 653 | CompareImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:654:15 [INFO] [stderr] | [INFO] [stderr] 654 | DecReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:655:16 [INFO] [stderr] | [INFO] [stderr] 655 | DecReg16(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:656:15 [INFO] [stderr] | [INFO] [stderr] 656 | AndReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:657:15 [INFO] [stderr] | [INFO] [stderr] 657 | AndImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:658:15 [INFO] [stderr] | [INFO] [stderr] 658 | XorReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:659:15 [INFO] [stderr] | [INFO] [stderr] 659 | XorImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:660:14 [INFO] [stderr] | [INFO] [stderr] 660 | OrReg8(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:661:14 [INFO] [stderr] | [INFO] [stderr] 661 | OrImm8(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `f` [INFO] [stderr] --> src/cpu.rs:673:17 [INFO] [stderr] | [INFO] [stderr] 673 | WriteA(r, f) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_f` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:673:14 [INFO] [stderr] | [INFO] [stderr] 673 | WriteA(r, f) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:674:19 [INFO] [stderr] | [INFO] [stderr] 674 | WriteAImm16(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `f` [INFO] [stderr] --> src/cpu.rs:675:16 [INFO] [stderr] | [INFO] [stderr] 675 | ReadA(r, f) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_f` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:675:13 [INFO] [stderr] | [INFO] [stderr] 675 | ReadA(r, f) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `n` [INFO] [stderr] --> src/cpu.rs:676:18 [INFO] [stderr] | [INFO] [stderr] 676 | ReadAImm16(n) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_n` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `val` [INFO] [stderr] --> src/cpu.rs:744:13 [INFO] [stderr] | [INFO] [stderr] 744 | let val = self.get_flag(Flag::Carry); [INFO] [stderr] | ^^^ help: consider prefixing with an underscore: `_val` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `val` [INFO] [stderr] --> src/cpu.rs:751:13 [INFO] [stderr] | [INFO] [stderr] 751 | let val = self.get_flag(Flag::Carry); [INFO] [stderr] | ^^^ help: consider prefixing with an underscore: `_val` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:757:11 [INFO] [stderr] | [INFO] [stderr] 757 | Rlc(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:758:11 [INFO] [stderr] | [INFO] [stderr] 758 | Rrc(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:759:10 [INFO] [stderr] | [INFO] [stderr] 759 | Rl(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:760:10 [INFO] [stderr] | [INFO] [stderr] 760 | Rr(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:761:11 [INFO] [stderr] | [INFO] [stderr] 761 | Sla(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:762:11 [INFO] [stderr] | [INFO] [stderr] 762 | Sra(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:763:11 [INFO] [stderr] | [INFO] [stderr] 763 | Srl(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] warning: unused variable: `r` [INFO] [stderr] --> src/cpu.rs:764:12 [INFO] [stderr] | [INFO] [stderr] 764 | Swap(r) => { /* TODO */ }, [INFO] [stderr] | ^ help: consider prefixing with an underscore: `_r` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:820:19 [INFO] [stderr] | [INFO] [stderr] 820 | cpu.regs.pc = 0; [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:822:22 [INFO] [stderr] | [INFO] [stderr] 822 | cpu.mem.write8(cpu.regs.pc, opcode as u8); [INFO] [stderr] | ^^^^^^^^^^^ expected u16, found struct `std::num::Wrapping` [INFO] [stderr] | [INFO] [stderr] = note: expected type `u16` [INFO] [stderr] found type `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0277]: cannot add-assign `{integer}` to `std::num::Wrapping` [INFO] [stderr] --> src/cpu.rs:823:19 [INFO] [stderr] | [INFO] [stderr] 823 | cpu.regs.pc += 1; [INFO] [stderr] | ^^ no implementation for `std::num::Wrapping += {integer}` [INFO] [stderr] | [INFO] [stderr] = help: the trait `std::ops::AddAssign<{integer}>` is not implemented for `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:825:19 [INFO] [stderr] | [INFO] [stderr] 825 | cpu.regs.pc = 0; [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:768:13 [INFO] [stderr] | [INFO] [stderr] 768 | let mut val = self.get_reg8(r); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_mut)]` on by default [INFO] [stderr] [INFO] [stderr] error[E0277]: cannot add-assign `{integer}` to `std::num::Wrapping` [INFO] [stderr] --> src/cpu.rs:831:19 [INFO] [stderr] | [INFO] [stderr] 831 | cpu.regs.pc += 1; [INFO] [stderr] | ^^ no implementation for `std::num::Wrapping += {integer}` [INFO] [stderr] | [INFO] [stderr] = help: the trait `std::ops::AddAssign<{integer}>` is not implemented for `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] warning: constant item is never used: `MEM_TOP` [INFO] [stderr] --> src/mem.rs:1:1 [INFO] [stderr] | [INFO] [stderr] 1 | pub const MEM_TOP: usize = 0x10000; [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(dead_code)]` on by default [INFO] [stderr] [INFO] [stderr] warning: struct is never constructed: `RAM` [INFO] [stderr] --> src/mem.rs:13:1 [INFO] [stderr] | [INFO] [stderr] 13 | pub struct RAM { [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: struct is never constructed: `ROM` [INFO] [stderr] --> src/mem.rs:28:1 [INFO] [stderr] | [INFO] [stderr] 28 | pub struct ROM { [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: struct is never constructed: `Registers` [INFO] [stderr] --> src/cpu.rs:8:1 [INFO] [stderr] | [INFO] [stderr] 8 | pub struct Registers { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: struct is never constructed: `CPU` [INFO] [stderr] --> src/cpu.rs:21:1 [INFO] [stderr] | [INFO] [stderr] 21 | pub struct CPU { [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `A` [INFO] [stderr] --> src/cpu.rs:29:3 [INFO] [stderr] | [INFO] [stderr] 29 | A = 0, [INFO] [stderr] | ^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `B` [INFO] [stderr] --> src/cpu.rs:30:3 [INFO] [stderr] | [INFO] [stderr] 30 | B, [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `C` [INFO] [stderr] --> src/cpu.rs:31:3 [INFO] [stderr] | [INFO] [stderr] 31 | C, [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `D` [INFO] [stderr] --> src/cpu.rs:32:3 [INFO] [stderr] | [INFO] [stderr] 32 | D, [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `E` [INFO] [stderr] --> src/cpu.rs:33:3 [INFO] [stderr] | [INFO] [stderr] 33 | E, [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `H` [INFO] [stderr] --> src/cpu.rs:34:3 [INFO] [stderr] | [INFO] [stderr] 34 | H, [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `L` [INFO] [stderr] --> src/cpu.rs:35:3 [INFO] [stderr] | [INFO] [stderr] 35 | L, [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `F` [INFO] [stderr] --> src/cpu.rs:36:3 [INFO] [stderr] | [INFO] [stderr] 36 | F, [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `MemHL` [INFO] [stderr] --> src/cpu.rs:37:3 [INFO] [stderr] | [INFO] [stderr] 37 | MemHL, [INFO] [stderr] | ^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AF` [INFO] [stderr] --> src/cpu.rs:42:3 [INFO] [stderr] | [INFO] [stderr] 42 | AF = 0, [INFO] [stderr] | ^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `BC` [INFO] [stderr] --> src/cpu.rs:43:3 [INFO] [stderr] | [INFO] [stderr] 43 | BC, [INFO] [stderr] | ^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `DE` [INFO] [stderr] --> src/cpu.rs:44:3 [INFO] [stderr] | [INFO] [stderr] 44 | DE, [INFO] [stderr] | ^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `HL` [INFO] [stderr] --> src/cpu.rs:45:3 [INFO] [stderr] | [INFO] [stderr] 45 | HL, [INFO] [stderr] | ^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SP` [INFO] [stderr] --> src/cpu.rs:46:3 [INFO] [stderr] | [INFO] [stderr] 46 | SP, [INFO] [stderr] | ^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `PC` [INFO] [stderr] --> src/cpu.rs:47:3 [INFO] [stderr] | [INFO] [stderr] 47 | PC, [INFO] [stderr] | ^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Carry` [INFO] [stderr] --> src/cpu.rs:52:3 [INFO] [stderr] | [INFO] [stderr] 52 | Carry = 1 << 4, [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `H` [INFO] [stderr] --> src/cpu.rs:53:3 [INFO] [stderr] | [INFO] [stderr] 53 | H = 1 << 5, // BCD flags [INFO] [stderr] | ^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `N` [INFO] [stderr] --> src/cpu.rs:54:3 [INFO] [stderr] | [INFO] [stderr] 54 | N = 1 << 6, [INFO] [stderr] | ^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Zero` [INFO] [stderr] --> src/cpu.rs:55:3 [INFO] [stderr] | [INFO] [stderr] 55 | Zero = 1 << 7, [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `None` [INFO] [stderr] --> src/cpu.rs:61:3 [INFO] [stderr] | [INFO] [stderr] 61 | None = 0, [INFO] [stderr] | ^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Dec` [INFO] [stderr] --> src/cpu.rs:62:3 [INFO] [stderr] | [INFO] [stderr] 62 | Dec, [INFO] [stderr] | ^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Inc` [INFO] [stderr] --> src/cpu.rs:63:3 [INFO] [stderr] | [INFO] [stderr] 63 | Inc, [INFO] [stderr] | ^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Nop` [INFO] [stderr] --> src/cpu.rs:68:3 [INFO] [stderr] | [INFO] [stderr] 68 | Nop(), [INFO] [stderr] | ^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Stop` [INFO] [stderr] --> src/cpu.rs:69:3 [INFO] [stderr] | [INFO] [stderr] 69 | Stop(), [INFO] [stderr] | ^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Halt` [INFO] [stderr] --> src/cpu.rs:70:3 [INFO] [stderr] | [INFO] [stderr] 70 | Halt(), [INFO] [stderr] | ^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `DisableInterrupts` [INFO] [stderr] --> src/cpu.rs:71:3 [INFO] [stderr] | [INFO] [stderr] 71 | DisableInterrupts(), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `EnableInterrupts` [INFO] [stderr] --> src/cpu.rs:72:3 [INFO] [stderr] | [INFO] [stderr] 72 | EnableInterrupts(), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Jr` [INFO] [stderr] --> src/cpu.rs:74:3 [INFO] [stderr] | [INFO] [stderr] 74 | Jr(W), [INFO] [stderr] | ^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `JrFlag` [INFO] [stderr] --> src/cpu.rs:75:3 [INFO] [stderr] | [INFO] [stderr] 75 | JrFlag(W, Flag, bool), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Jp` [INFO] [stderr] --> src/cpu.rs:76:3 [INFO] [stderr] | [INFO] [stderr] 76 | Jp(W), [INFO] [stderr] | ^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `JpHL` [INFO] [stderr] --> src/cpu.rs:77:3 [INFO] [stderr] | [INFO] [stderr] 77 | JpHL(), [INFO] [stderr] | ^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `JpFlag` [INFO] [stderr] --> src/cpu.rs:78:3 [INFO] [stderr] | [INFO] [stderr] 78 | JpFlag(W, Flag, bool), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Call` [INFO] [stderr] --> src/cpu.rs:79:3 [INFO] [stderr] | [INFO] [stderr] 79 | Call(W), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `CallFlag` [INFO] [stderr] --> src/cpu.rs:80:3 [INFO] [stderr] | [INFO] [stderr] 80 | CallFlag(W, Flag, bool), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Ret` [INFO] [stderr] --> src/cpu.rs:81:3 [INFO] [stderr] | [INFO] [stderr] 81 | Ret(), [INFO] [stderr] | ^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `RetInterrupt` [INFO] [stderr] --> src/cpu.rs:82:3 [INFO] [stderr] | [INFO] [stderr] 82 | RetInterrupt(), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `RetFlag` [INFO] [stderr] --> src/cpu.rs:83:3 [INFO] [stderr] | [INFO] [stderr] 83 | RetFlag(Flag, bool), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AddReg8` [INFO] [stderr] --> src/cpu.rs:85:3 [INFO] [stderr] | [INFO] [stderr] 85 | AddReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AddCarryReg8` [INFO] [stderr] --> src/cpu.rs:86:3 [INFO] [stderr] | [INFO] [stderr] 86 | AddCarryReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AddImm8` [INFO] [stderr] --> src/cpu.rs:87:3 [INFO] [stderr] | [INFO] [stderr] 87 | AddImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AddCarryImm8` [INFO] [stderr] --> src/cpu.rs:88:3 [INFO] [stderr] | [INFO] [stderr] 88 | AddCarryImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `IncReg8` [INFO] [stderr] --> src/cpu.rs:89:3 [INFO] [stderr] | [INFO] [stderr] 89 | IncReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `IncReg16` [INFO] [stderr] --> src/cpu.rs:90:3 [INFO] [stderr] | [INFO] [stderr] 90 | IncReg16(Reg16), [INFO] [stderr] | ^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SubReg8` [INFO] [stderr] --> src/cpu.rs:91:3 [INFO] [stderr] | [INFO] [stderr] 91 | SubReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SubCarryReg8` [INFO] [stderr] --> src/cpu.rs:92:3 [INFO] [stderr] | [INFO] [stderr] 92 | SubCarryReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SubImm8` [INFO] [stderr] --> src/cpu.rs:93:3 [INFO] [stderr] | [INFO] [stderr] 93 | SubImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SubCarryImm8` [INFO] [stderr] --> src/cpu.rs:94:3 [INFO] [stderr] | [INFO] [stderr] 94 | SubCarryImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Compare` [INFO] [stderr] --> src/cpu.rs:95:3 [INFO] [stderr] | [INFO] [stderr] 95 | Compare(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `CompareImm8` [INFO] [stderr] --> src/cpu.rs:96:3 [INFO] [stderr] | [INFO] [stderr] 96 | CompareImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `DecReg8` [INFO] [stderr] --> src/cpu.rs:97:3 [INFO] [stderr] | [INFO] [stderr] 97 | DecReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `DecReg16` [INFO] [stderr] --> src/cpu.rs:98:3 [INFO] [stderr] | [INFO] [stderr] 98 | DecReg16(Reg16), [INFO] [stderr] | ^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AndReg8` [INFO] [stderr] --> src/cpu.rs:99:3 [INFO] [stderr] | [INFO] [stderr] 99 | AndReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AndImm8` [INFO] [stderr] --> src/cpu.rs:100:3 [INFO] [stderr] | [INFO] [stderr] 100 | AndImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `XorReg8` [INFO] [stderr] --> src/cpu.rs:101:3 [INFO] [stderr] | [INFO] [stderr] 101 | XorReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `XorImm8` [INFO] [stderr] --> src/cpu.rs:102:3 [INFO] [stderr] | [INFO] [stderr] 102 | XorImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `OrReg8` [INFO] [stderr] --> src/cpu.rs:103:3 [INFO] [stderr] | [INFO] [stderr] 103 | OrReg8(Reg8), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `OrImm8` [INFO] [stderr] --> src/cpu.rs:104:3 [INFO] [stderr] | [INFO] [stderr] 104 | OrImm8(W), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `LoadReg8` [INFO] [stderr] --> src/cpu.rs:106:3 [INFO] [stderr] | [INFO] [stderr] 106 | LoadReg8(Reg8, Reg8), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `LoadImm8` [INFO] [stderr] --> src/cpu.rs:107:3 [INFO] [stderr] | [INFO] [stderr] 107 | LoadImm8(Reg8, W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `LoadImm16` [INFO] [stderr] --> src/cpu.rs:108:3 [INFO] [stderr] | [INFO] [stderr] 108 | LoadImm16(Reg16, W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `WriteA` [INFO] [stderr] --> src/cpu.rs:109:3 [INFO] [stderr] | [INFO] [stderr] 109 | WriteA(Reg16, InstrFlag), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `WriteAImm16` [INFO] [stderr] --> src/cpu.rs:110:3 [INFO] [stderr] | [INFO] [stderr] 110 | WriteAImm16(W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `ReadA` [INFO] [stderr] --> src/cpu.rs:111:3 [INFO] [stderr] | [INFO] [stderr] 111 | ReadA(Reg16, InstrFlag), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `ReadAImm16` [INFO] [stderr] --> src/cpu.rs:112:3 [INFO] [stderr] | [INFO] [stderr] 112 | ReadAImm16(W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `WriteMemSP` [INFO] [stderr] --> src/cpu.rs:113:3 [INFO] [stderr] | [INFO] [stderr] 113 | WriteMemSP(W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `HiLoad` [INFO] [stderr] --> src/cpu.rs:114:3 [INFO] [stderr] | [INFO] [stderr] 114 | HiLoad(W), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `HiLoadReg` [INFO] [stderr] --> src/cpu.rs:115:3 [INFO] [stderr] | [INFO] [stderr] 115 | HiLoadReg(), [INFO] [stderr] | ^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `HiWrite` [INFO] [stderr] --> src/cpu.rs:116:3 [INFO] [stderr] | [INFO] [stderr] 116 | HiWrite(W), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `HiWriteReg` [INFO] [stderr] --> src/cpu.rs:117:3 [INFO] [stderr] | [INFO] [stderr] 117 | HiWriteReg(), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AddHL` [INFO] [stderr] --> src/cpu.rs:119:3 [INFO] [stderr] | [INFO] [stderr] 119 | AddHL(Reg16), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `LoadSPOffset` [INFO] [stderr] --> src/cpu.rs:120:3 [INFO] [stderr] | [INFO] [stderr] 120 | LoadSPOffset(W), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SwapSPHL` [INFO] [stderr] --> src/cpu.rs:121:3 [INFO] [stderr] | [INFO] [stderr] 121 | SwapSPHL(), [INFO] [stderr] | ^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Pop` [INFO] [stderr] --> src/cpu.rs:123:3 [INFO] [stderr] | [INFO] [stderr] 123 | Pop(Reg16), [INFO] [stderr] | ^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Push` [INFO] [stderr] --> src/cpu.rs:124:3 [INFO] [stderr] | [INFO] [stderr] 124 | Push(Reg16), [INFO] [stderr] | ^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `AddSP` [INFO] [stderr] --> src/cpu.rs:125:3 [INFO] [stderr] | [INFO] [stderr] 125 | AddSP(W), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rlca` [INFO] [stderr] --> src/cpu.rs:127:3 [INFO] [stderr] | [INFO] [stderr] 127 | Rlca(), [INFO] [stderr] | ^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rla` [INFO] [stderr] --> src/cpu.rs:128:3 [INFO] [stderr] | [INFO] [stderr] 128 | Rla(), [INFO] [stderr] | ^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rrca` [INFO] [stderr] --> src/cpu.rs:129:3 [INFO] [stderr] | [INFO] [stderr] 129 | Rrca(), [INFO] [stderr] | ^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rra` [INFO] [stderr] --> src/cpu.rs:130:3 [INFO] [stderr] | [INFO] [stderr] 130 | Rra(), [INFO] [stderr] | ^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rlc` [INFO] [stderr] --> src/cpu.rs:131:3 [INFO] [stderr] | [INFO] [stderr] 131 | Rlc(Reg8), [INFO] [stderr] | ^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rrc` [INFO] [stderr] --> src/cpu.rs:132:3 [INFO] [stderr] | [INFO] [stderr] 132 | Rrc(Reg8), [INFO] [stderr] | ^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rl` [INFO] [stderr] --> src/cpu.rs:133:3 [INFO] [stderr] | [INFO] [stderr] 133 | Rl(Reg8), [INFO] [stderr] | ^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Rr` [INFO] [stderr] --> src/cpu.rs:134:3 [INFO] [stderr] | [INFO] [stderr] 134 | Rr(Reg8), [INFO] [stderr] | ^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Sla` [INFO] [stderr] --> src/cpu.rs:135:3 [INFO] [stderr] | [INFO] [stderr] 135 | Sla(Reg8), [INFO] [stderr] | ^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Sra` [INFO] [stderr] --> src/cpu.rs:136:3 [INFO] [stderr] | [INFO] [stderr] 136 | Sra(Reg8), [INFO] [stderr] | ^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Swap` [INFO] [stderr] --> src/cpu.rs:137:3 [INFO] [stderr] | [INFO] [stderr] 137 | Swap(Reg8), [INFO] [stderr] | ^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Srl` [INFO] [stderr] --> src/cpu.rs:138:3 [INFO] [stderr] | [INFO] [stderr] 138 | Srl(Reg8), [INFO] [stderr] | ^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TestBit` [INFO] [stderr] --> src/cpu.rs:139:3 [INFO] [stderr] | [INFO] [stderr] 139 | TestBit(u8, Reg8), // note: 0-7 only [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SetBit` [INFO] [stderr] --> src/cpu.rs:140:3 [INFO] [stderr] | [INFO] [stderr] 140 | SetBit(u8, Reg8, bool), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Complement` [INFO] [stderr] --> src/cpu.rs:142:3 [INFO] [stderr] | [INFO] [stderr] 142 | Complement(), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `ComplementCarry` [INFO] [stderr] --> src/cpu.rs:143:3 [INFO] [stderr] | [INFO] [stderr] 143 | ComplementCarry(), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Daa` [INFO] [stderr] --> src/cpu.rs:145:3 [INFO] [stderr] | [INFO] [stderr] 145 | Daa(), [INFO] [stderr] | ^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SetCarryFlag` [INFO] [stderr] --> src/cpu.rs:146:3 [INFO] [stderr] | [INFO] [stderr] 146 | SetCarryFlag(), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Restart` [INFO] [stderr] --> src/cpu.rs:148:3 [INFO] [stderr] | [INFO] [stderr] 148 | Restart(W), [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `UnknownOpcode` [INFO] [stderr] --> src/cpu.rs:150:3 [INFO] [stderr] | [INFO] [stderr] 150 | UnknownOpcode(), [INFO] [stderr] | ^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `size` [INFO] [stderr] --> src/cpu.rs:156:3 [INFO] [stderr] | [INFO] [stderr] 156 | fn size(&self) -> u16 { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `concat_u8` [INFO] [stderr] --> src/cpu.rs:175:1 [INFO] [stderr] | [INFO] [stderr] 175 | fn concat_u8(h: W, l: W) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `break_u16` [INFO] [stderr] --> src/cpu.rs:179:1 [INFO] [stderr] | [INFO] [stderr] 179 | fn break_u16(val: W) -> (W, W) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `signed_add` [INFO] [stderr] --> src/cpu.rs:185:1 [INFO] [stderr] | [INFO] [stderr] 185 | fn signed_add(a: W, b: W) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `extend_u8` [INFO] [stderr] --> src/cpu.rs:193:1 [INFO] [stderr] | [INFO] [stderr] 193 | fn extend_u8(n: W) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `bit` [INFO] [stderr] --> src/cpu.rs:197:1 [INFO] [stderr] | [INFO] [stderr] 197 | fn bit(x: W, n: u8) -> bool { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `new` [INFO] [stderr] --> src/cpu.rs:203:3 [INFO] [stderr] | [INFO] [stderr] 203 | pub fn new() -> CPU { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `get_reg8` [INFO] [stderr] --> src/cpu.rs:224:3 [INFO] [stderr] | [INFO] [stderr] 224 | fn get_reg8(&self, r: Reg8) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `set_reg8` [INFO] [stderr] --> src/cpu.rs:238:3 [INFO] [stderr] | [INFO] [stderr] 238 | fn set_reg8(&mut self, r: Reg8, val: W) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `get_reg16` [INFO] [stderr] --> src/cpu.rs:255:3 [INFO] [stderr] | [INFO] [stderr] 255 | fn get_reg16(&self, r: Reg16) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `set_reg16` [INFO] [stderr] --> src/cpu.rs:266:3 [INFO] [stderr] | [INFO] [stderr] 266 | fn set_reg16(&mut self, r: Reg16, val: W) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `read8` [INFO] [stderr] --> src/cpu.rs:290:3 [INFO] [stderr] | [INFO] [stderr] 290 | fn read8(&self, pos: W) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `write8` [INFO] [stderr] --> src/cpu.rs:294:3 [INFO] [stderr] | [INFO] [stderr] 294 | fn write8(&mut self, pos: W, val: W) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `read16` [INFO] [stderr] --> src/cpu.rs:298:3 [INFO] [stderr] | [INFO] [stderr] 298 | fn read16(&self, pos: W) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `write16` [INFO] [stderr] --> src/cpu.rs:304:3 [INFO] [stderr] | [INFO] [stderr] 304 | fn write16(&mut self, pos: W, val: W) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `get_flag` [INFO] [stderr] --> src/cpu.rs:311:3 [INFO] [stderr] | [INFO] [stderr] 311 | fn get_flag(&self, flag: Flag) -> bool { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `set_flag` [INFO] [stderr] --> src/cpu.rs:316:3 [INFO] [stderr] | [INFO] [stderr] 316 | fn set_flag(&mut self, flag: Flag, value: bool) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `zero_flags` [INFO] [stderr] --> src/cpu.rs:322:3 [INFO] [stderr] | [INFO] [stderr] 322 | fn zero_flags(&mut self) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `push` [INFO] [stderr] --> src/cpu.rs:326:3 [INFO] [stderr] | [INFO] [stderr] 326 | fn push(&mut self, val: W) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `pop` [INFO] [stderr] --> src/cpu.rs:332:3 [INFO] [stderr] | [INFO] [stderr] 332 | fn pop(&mut self) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `step` [INFO] [stderr] --> src/cpu.rs:338:3 [INFO] [stderr] | [INFO] [stderr] 338 | fn step(&mut self) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `opcode_u8` [INFO] [stderr] --> src/cpu.rs:343:3 [INFO] [stderr] | [INFO] [stderr] 343 | fn opcode_u8(&self) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `opcode_i8` [INFO] [stderr] --> src/cpu.rs:347:3 [INFO] [stderr] | [INFO] [stderr] 347 | fn opcode_i8(&self) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `opcode_u16` [INFO] [stderr] --> src/cpu.rs:351:3 [INFO] [stderr] | [INFO] [stderr] 351 | fn opcode_u16(&self) -> W { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `decode_next` [INFO] [stderr] --> src/cpu.rs:355:3 [INFO] [stderr] | [INFO] [stderr] 355 | pub fn decode_next(&mut self) -> Instruction { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `duration` [INFO] [stderr] --> src/cpu.rs:544:3 [INFO] [stderr] | [INFO] [stderr] 544 | pub fn duration(&self, instr: Instruction, jumped: bool) -> usize { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: method is never used: `run` [INFO] [stderr] --> src/cpu.rs:579:3 [INFO] [stderr] | [INFO] [stderr] 579 | fn run(&mut self, instr: Instruction) -> usize { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:842:19 [INFO] [stderr] | [INFO] [stderr] 842 | cpu.regs.pc = 0; [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:844:22 [INFO] [stderr] | [INFO] [stderr] 844 | cpu.mem.write8(cpu.regs.pc, 0xCB as u8); [INFO] [stderr] | ^^^^^^^^^^^ expected u16, found struct `std::num::Wrapping` [INFO] [stderr] | [INFO] [stderr] = note: expected type `u16` [INFO] [stderr] found type `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0277]: cannot add-assign `{integer}` to `std::num::Wrapping` [INFO] [stderr] --> src/cpu.rs:845:19 [INFO] [stderr] | [INFO] [stderr] 845 | cpu.regs.pc += 1; [INFO] [stderr] | ^^ no implementation for `std::num::Wrapping += {integer}` [INFO] [stderr] | [INFO] [stderr] = help: the trait `std::ops::AddAssign<{integer}>` is not implemented for `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:846:22 [INFO] [stderr] | [INFO] [stderr] 846 | cpu.mem.write8(cpu.regs.pc, opcode as u8); [INFO] [stderr] | ^^^^^^^^^^^ expected u16, found struct `std::num::Wrapping` [INFO] [stderr] | [INFO] [stderr] = note: expected type `u16` [INFO] [stderr] found type `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0277]: cannot add-assign `{integer}` to `std::num::Wrapping` [INFO] [stderr] --> src/cpu.rs:847:19 [INFO] [stderr] | [INFO] [stderr] 847 | cpu.regs.pc += 1; [INFO] [stderr] | ^^ no implementation for `std::num::Wrapping += {integer}` [INFO] [stderr] | [INFO] [stderr] = help: the trait `std::ops::AddAssign<{integer}>` is not implemented for `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:849:19 [INFO] [stderr] | [INFO] [stderr] 849 | cpu.regs.pc = 0; [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0277]: cannot add-assign `{integer}` to `std::num::Wrapping` [INFO] [stderr] --> src/cpu.rs:855:19 [INFO] [stderr] | [INFO] [stderr] 855 | cpu.regs.pc += 2; [INFO] [stderr] | ^^ no implementation for `std::num::Wrapping += {integer}` [INFO] [stderr] | [INFO] [stderr] = help: the trait `std::ops::AddAssign<{integer}>` is not implemented for `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:870:20 [INFO] [stderr] | [INFO] [stderr] 870 | cpu.mem.write8(cpu.regs.pc, 0); [INFO] [stderr] | ^^^^^^^^^^^ expected u16, found struct `std::num::Wrapping` [INFO] [stderr] | [INFO] [stderr] = note: expected type `u16` [INFO] [stderr] found type `std::num::Wrapping` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:902:26 [INFO] [stderr] | [INFO] [stderr] 902 | assert_eq!(concat_u8(0, 0), 0); [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:902:29 [INFO] [stderr] | [INFO] [stderr] 902 | assert_eq!(concat_u8(0, 0), 0); [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:902:5 [INFO] [stderr] | [INFO] [stderr] 902 | assert_eq!(concat_u8(0, 0), 0); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:903:26 [INFO] [stderr] | [INFO] [stderr] 903 | assert_eq!(concat_u8(0xFF, 0), 0xFF00); [INFO] [stderr] | ^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:903:32 [INFO] [stderr] | [INFO] [stderr] 903 | assert_eq!(concat_u8(0xFF, 0), 0xFF00); [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:903:5 [INFO] [stderr] | [INFO] [stderr] 903 | assert_eq!(concat_u8(0xFF, 0), 0xFF00); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:904:26 [INFO] [stderr] | [INFO] [stderr] 904 | assert_eq!(concat_u8(0, 0xFF), 0xFF); [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:904:29 [INFO] [stderr] | [INFO] [stderr] 904 | assert_eq!(concat_u8(0, 0xFF), 0xFF); [INFO] [stderr] | ^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:904:5 [INFO] [stderr] | [INFO] [stderr] 904 | assert_eq!(concat_u8(0, 0xFF), 0xFF); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:905:26 [INFO] [stderr] | [INFO] [stderr] 905 | assert_eq!(concat_u8(0xFF, 0xFF), 0xFFFF); [INFO] [stderr] | ^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:905:32 [INFO] [stderr] | [INFO] [stderr] 905 | assert_eq!(concat_u8(0xFF, 0xFF), 0xFFFF); [INFO] [stderr] | ^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:905:5 [INFO] [stderr] | [INFO] [stderr] 905 | assert_eq!(concat_u8(0xFF, 0xFF), 0xFFFF); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:906:26 [INFO] [stderr] | [INFO] [stderr] 906 | assert_eq!(concat_u8(0x12, 0x34), 0x1234); [INFO] [stderr] | ^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:906:32 [INFO] [stderr] | [INFO] [stderr] 906 | assert_eq!(concat_u8(0x12, 0x34), 0x1234); [INFO] [stderr] | ^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:906:5 [INFO] [stderr] | [INFO] [stderr] 906 | assert_eq!(concat_u8(0x12, 0x34), 0x1234); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:911:26 [INFO] [stderr] | [INFO] [stderr] 911 | assert_eq!(break_u16(0xFFFF), (0xFF, 0xFF)); [INFO] [stderr] | ^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:911:5 [INFO] [stderr] | [INFO] [stderr] 911 | assert_eq!(break_u16(0xFFFF), (0xFF, 0xFF)); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `(std::num::Wrapping, std::num::Wrapping)` [INFO] [stderr] found type `({integer}, {integer})` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:912:26 [INFO] [stderr] | [INFO] [stderr] 912 | assert_eq!(break_u16(0x1234), (0x12, 0x34)); [INFO] [stderr] | ^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:912:5 [INFO] [stderr] | [INFO] [stderr] 912 | assert_eq!(break_u16(0x1234), (0x12, 0x34)); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `(std::num::Wrapping, std::num::Wrapping)` [INFO] [stderr] found type `({integer}, {integer})` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:913:26 [INFO] [stderr] | [INFO] [stderr] 913 | assert_eq!(break_u16(0), (0, 0)); [INFO] [stderr] | ^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:913:5 [INFO] [stderr] | [INFO] [stderr] 913 | assert_eq!(break_u16(0), (0, 0)); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `(std::num::Wrapping, std::num::Wrapping)` [INFO] [stderr] found type `({integer}, {integer})` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:914:26 [INFO] [stderr] | [INFO] [stderr] 914 | assert_eq!(break_u16(0xFF), (0, 0xFF)); [INFO] [stderr] | ^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:914:5 [INFO] [stderr] | [INFO] [stderr] 914 | assert_eq!(break_u16(0xFF), (0, 0xFF)); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `(std::num::Wrapping, std::num::Wrapping)` [INFO] [stderr] found type `({integer}, {integer})` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:915:26 [INFO] [stderr] | [INFO] [stderr] 915 | assert_eq!(break_u16(0xFF00), (0xFF, 0)); [INFO] [stderr] | ^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `std::num::Wrapping` [INFO] [stderr] found type `{integer}` [INFO] [stderr] [INFO] [stderr] error[E0308]: mismatched types [INFO] [stderr] --> src/cpu.rs:915:5 [INFO] [stderr] | [INFO] [stderr] 915 | assert_eq!(break_u16(0xFF00), (0xFF, 0)); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected struct `std::num::Wrapping`, found integer [INFO] [stderr] | [INFO] [stderr] = note: expected type `(std::num::Wrapping, std::num::Wrapping)` [INFO] [stderr] found type `({integer}, {integer})` [INFO] [stderr] = note: this error originates in a macro outside of the current crate (in Nightly builds, run with -Z external-macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] error: aborting due to 38 previous errors [INFO] [stderr] [INFO] [stderr] Some errors have detailed explanations: E0277, E0308. [INFO] [stderr] For more information about an error, try `rustc --explain E0277`. [INFO] [stderr] error: Could not compile `rgb`. [INFO] [stderr] [INFO] [stderr] To learn more, run the command again with --verbose. [INFO] running `"docker" "inspect" "0076cb6dd12f3b6f1d7639d199617281ad2403e7f62009720d180faeea74e9a3"` [INFO] running `"docker" "rm" "-f" "0076cb6dd12f3b6f1d7639d199617281ad2403e7f62009720d180faeea74e9a3"` [INFO] [stdout] 0076cb6dd12f3b6f1d7639d199617281ad2403e7f62009720d180faeea74e9a3