Dec 15 09:17:56.895 INFO testing hagane-simd-0.1.0 against master#bd47d6825bf4090517549d33cfef10d3300b4a75 for pr-56550 Dec 15 09:17:56.895 INFO running `"docker" "create" "-v" "/mnt/big/crater/work/local/target-dirs/pr-56550/worker-5/master#bd47d6825bf4090517549d33cfef10d3300b4a75:/target:rw,Z" "-v" "/mnt/big/crater/work/local/test-source/worker-5/pr-56550/master#bd47d6825bf4090517549d33cfef10d3300b4a75:/source:ro,Z" "-v" "/mnt/big/crater/work/local/cargo-home:/cargo-home:ro,Z" "-v" "/mnt/big/crater/work/local/rustup-home:/rustup-home:ro,Z" "-e" "USER_ID=1000" "-e" "SOURCE_DIR=/source" "-e" "USER_ID=1000" "-e" "CMD=cargo +bd47d6825bf4090517549d33cfef10d3300b4a75-alt build --frozen" "-e" "CARGO_TARGET_DIR=/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/cargo-home" "-e" "RUSTUP_HOME=/rustup-home" "-m" "1536M" "--network" "none" "crater"` Dec 15 09:17:57.165 INFO [stdout] 41a93d7fda31bf3108bc99887eacf38a7db99686fefba2266006909232e97b61 Dec 15 09:17:57.168 INFO running `"docker" "start" "-a" "41a93d7fda31bf3108bc99887eacf38a7db99686fefba2266006909232e97b61"` Dec 15 09:17:57.701 INFO [stderr] usermod: no changes Dec 15 09:17:57.729 INFO [stderr] Compiling hagane-simd v0.1.0 (/source) Dec 15 09:17:58.792 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.792 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.792 INFO [stderr] | ^ Dec 15 09:17:58.792 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.792 INFO [stderr] | ^^^^ Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:17:58.792 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:17:58.792 INFO [stderr] | | Dec 15 09:17:58.792 INFO [stderr] | in this macro invocation Dec 15 09:17:58.792 INFO [stderr] | in this macro invocation Dec 15 09:17:58.792 INFO [stderr] Dec 15 09:17:58.792 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.792 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.792 INFO [stderr] | ^ Dec 15 09:17:58.792 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.792 INFO [stderr] | ^^^^ Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:17:58.792 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:17:58.792 INFO [stderr] | | Dec 15 09:17:58.792 INFO [stderr] | in this macro invocation Dec 15 09:17:58.792 INFO [stderr] | in this macro invocation Dec 15 09:17:58.792 INFO [stderr] Dec 15 09:17:58.792 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.792 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.792 INFO [stderr] | ^ Dec 15 09:17:58.792 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.792 INFO [stderr] | ^^^^ Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:17:58.792 INFO [stderr] | Dec 15 09:17:58.792 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:17:58.792 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:17:58.792 INFO [stderr] | | Dec 15 09:17:58.792 INFO [stderr] | in this macro invocation Dec 15 09:17:58.792 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] Dec 15 09:17:58.793 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.793 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.793 INFO [stderr] | ^ Dec 15 09:17:58.793 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.793 INFO [stderr] | ^^^^ Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:17:58.793 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:17:58.793 INFO [stderr] | | Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] Dec 15 09:17:58.793 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.793 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.793 INFO [stderr] | ^ Dec 15 09:17:58.793 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.793 INFO [stderr] | ^^^^ Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:17:58.793 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:17:58.793 INFO [stderr] | | Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] Dec 15 09:17:58.793 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.793 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.793 INFO [stderr] | ^ Dec 15 09:17:58.793 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.793 INFO [stderr] | ^^^^ Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:17:58.793 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:17:58.793 INFO [stderr] | | Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] Dec 15 09:17:58.793 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.793 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.793 INFO [stderr] | ^ Dec 15 09:17:58.793 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.793 INFO [stderr] | ^^^^ Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:17:58.793 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:17:58.793 INFO [stderr] | | Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] Dec 15 09:17:58.793 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.793 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.793 INFO [stderr] | ^ Dec 15 09:17:58.793 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.793 INFO [stderr] | ^^^^ Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.793 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:17:58.793 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:17:58.793 INFO [stderr] | | Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] | in this macro invocation Dec 15 09:17:58.793 INFO [stderr] Dec 15 09:17:58.793 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.793 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.793 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.794 INFO [stderr] | ^ Dec 15 09:17:58.794 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.794 INFO [stderr] | ^^^^ Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:17:58.794 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:17:58.794 INFO [stderr] | | Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] Dec 15 09:17:58.794 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.794 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.794 INFO [stderr] | ^ Dec 15 09:17:58.794 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.794 INFO [stderr] | ^^^^ Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:17:58.794 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:17:58.794 INFO [stderr] | | Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] Dec 15 09:17:58.794 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.794 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.794 INFO [stderr] | ^ Dec 15 09:17:58.794 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.794 INFO [stderr] | ^^^^ Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:17:58.794 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:17:58.794 INFO [stderr] | | Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] Dec 15 09:17:58.794 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.794 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.794 INFO [stderr] | ^ Dec 15 09:17:58.794 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.794 INFO [stderr] | ^^^^ Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:17:58.794 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:17:58.794 INFO [stderr] | | Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] Dec 15 09:17:58.794 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.794 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.794 INFO [stderr] | ^ Dec 15 09:17:58.794 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.794 INFO [stderr] | ^^^^ Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:17:58.794 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:17:58.794 INFO [stderr] | | Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] | in this macro invocation Dec 15 09:17:58.794 INFO [stderr] Dec 15 09:17:58.794 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.794 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.794 INFO [stderr] | Dec 15 09:17:58.794 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.794 INFO [stderr] | ^ Dec 15 09:17:58.794 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.794 INFO [stderr] | ^^^^ Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:17:58.795 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:17:58.795 INFO [stderr] | | Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] Dec 15 09:17:58.795 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.795 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.795 INFO [stderr] | ^ Dec 15 09:17:58.795 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.795 INFO [stderr] | ^^^^ Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:17:58.795 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:17:58.795 INFO [stderr] | | Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] Dec 15 09:17:58.795 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.795 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.795 INFO [stderr] | ^ Dec 15 09:17:58.795 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.795 INFO [stderr] | ^^^^ Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:17:58.795 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:17:58.795 INFO [stderr] | | Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] Dec 15 09:17:58.795 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.795 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.795 INFO [stderr] | ^ Dec 15 09:17:58.795 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.795 INFO [stderr] | ^^^^ Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:17:58.795 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:17:58.795 INFO [stderr] | | Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] Dec 15 09:17:58.795 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.795 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.795 INFO [stderr] | ^ Dec 15 09:17:58.795 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.795 INFO [stderr] | ^^^^ Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:17:58.795 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:17:58.795 INFO [stderr] | | Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] | in this macro invocation Dec 15 09:17:58.795 INFO [stderr] Dec 15 09:17:58.795 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.795 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.795 INFO [stderr] | ^ Dec 15 09:17:58.795 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.795 INFO [stderr] | ^^^^ Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:17:58.795 INFO [stderr] | Dec 15 09:17:58.795 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:17:58.796 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:17:58.796 INFO [stderr] | | Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] Dec 15 09:17:58.796 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.796 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.796 INFO [stderr] | ^ Dec 15 09:17:58.796 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.796 INFO [stderr] | ^^^^ Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:17:58.796 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:17:58.796 INFO [stderr] | | Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] Dec 15 09:17:58.796 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.796 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.796 INFO [stderr] | ^ Dec 15 09:17:58.796 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.796 INFO [stderr] | ^^^^ Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:17:58.796 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:17:58.796 INFO [stderr] | | Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] Dec 15 09:17:58.796 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.796 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.796 INFO [stderr] | ^ Dec 15 09:17:58.796 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.796 INFO [stderr] | ^^^^ Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:17:58.796 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:17:58.796 INFO [stderr] | | Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] Dec 15 09:17:58.796 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.796 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.796 INFO [stderr] | ^ Dec 15 09:17:58.796 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.796 INFO [stderr] | ^^^^ Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:17:58.796 INFO [stderr] | Dec 15 09:17:58.796 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:17:58.796 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:17:58.796 INFO [stderr] | | Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] | in this macro invocation Dec 15 09:17:58.796 INFO [stderr] Dec 15 09:17:58.796 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.796 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.797 INFO [stderr] | ^ Dec 15 09:17:58.797 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.797 INFO [stderr] | ^^^^ Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:17:58.797 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:17:58.797 INFO [stderr] | | Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] Dec 15 09:17:58.797 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.797 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.797 INFO [stderr] | ^ Dec 15 09:17:58.797 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.797 INFO [stderr] | ^^^^ Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:17:58.797 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:17:58.797 INFO [stderr] | | Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] Dec 15 09:17:58.797 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.797 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.797 INFO [stderr] | ^ Dec 15 09:17:58.797 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.797 INFO [stderr] | ^^^^ Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:17:58.797 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:17:58.797 INFO [stderr] | | Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] Dec 15 09:17:58.797 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.797 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.797 INFO [stderr] | ^ Dec 15 09:17:58.797 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.797 INFO [stderr] | ^^^^ Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:17:58.797 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:17:58.797 INFO [stderr] | | Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] Dec 15 09:17:58.797 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.797 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.797 INFO [stderr] | ^ Dec 15 09:17:58.797 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.797 INFO [stderr] | ^^^^ Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:17:58.797 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:17:58.797 INFO [stderr] | | Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] | in this macro invocation Dec 15 09:17:58.797 INFO [stderr] Dec 15 09:17:58.797 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.797 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.797 INFO [stderr] | Dec 15 09:17:58.797 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.797 INFO [stderr] | ^ Dec 15 09:17:58.797 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.798 INFO [stderr] | ^^^^ Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:17:58.798 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:17:58.798 INFO [stderr] | | Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] Dec 15 09:17:58.798 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.798 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.798 INFO [stderr] | ^ Dec 15 09:17:58.798 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.798 INFO [stderr] | ^^^^ Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:17:58.798 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:17:58.798 INFO [stderr] | | Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] Dec 15 09:17:58.798 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.798 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.798 INFO [stderr] | ^ Dec 15 09:17:58.798 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.798 INFO [stderr] | ^^^^ Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:17:58.798 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:17:58.798 INFO [stderr] | | Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] Dec 15 09:17:58.798 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.798 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.798 INFO [stderr] | ^ Dec 15 09:17:58.798 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.798 INFO [stderr] | ^^^^ Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:17:58.798 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:17:58.798 INFO [stderr] | | Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] Dec 15 09:17:58.798 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.798 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.798 INFO [stderr] | ^ Dec 15 09:17:58.798 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.798 INFO [stderr] | ^^^^ Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:17:58.798 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:17:58.798 INFO [stderr] | | Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] | in this macro invocation Dec 15 09:17:58.798 INFO [stderr] Dec 15 09:17:58.798 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.798 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.798 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.798 INFO [stderr] | ^ Dec 15 09:17:58.798 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.798 INFO [stderr] | ^^^^ Dec 15 09:17:58.798 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:17:58.799 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:17:58.799 INFO [stderr] | | Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] Dec 15 09:17:58.799 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.799 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.799 INFO [stderr] | ^ Dec 15 09:17:58.799 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.799 INFO [stderr] | ^^^^ Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:17:58.799 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:17:58.799 INFO [stderr] | | Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] Dec 15 09:17:58.799 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.799 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.799 INFO [stderr] | ^ Dec 15 09:17:58.799 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.799 INFO [stderr] | ^^^^ Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:17:58.799 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:17:58.799 INFO [stderr] | | Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] Dec 15 09:17:58.799 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.799 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.799 INFO [stderr] | ^ Dec 15 09:17:58.799 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.799 INFO [stderr] | ^^^^ Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:17:58.799 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:17:58.799 INFO [stderr] | | Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] Dec 15 09:17:58.799 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.799 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.799 INFO [stderr] | ^ Dec 15 09:17:58.799 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.799 INFO [stderr] | ^^^^ Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:17:58.799 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:17:58.799 INFO [stderr] | | Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.799 INFO [stderr] Dec 15 09:17:58.799 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.799 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.799 INFO [stderr] | ^ Dec 15 09:17:58.799 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.799 INFO [stderr] | ^^^^ Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:17:58.799 INFO [stderr] | Dec 15 09:17:58.799 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:17:58.799 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:17:58.799 INFO [stderr] | | Dec 15 09:17:58.799 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] Dec 15 09:17:58.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.800 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.800 INFO [stderr] | ^ Dec 15 09:17:58.800 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.800 INFO [stderr] | ^^^^ Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:17:58.800 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:17:58.800 INFO [stderr] | | Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] Dec 15 09:17:58.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.800 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.800 INFO [stderr] | ^ Dec 15 09:17:58.800 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.800 INFO [stderr] | ^^^^ Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:17:58.800 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:17:58.800 INFO [stderr] | | Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] Dec 15 09:17:58.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.800 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.800 INFO [stderr] | ^ Dec 15 09:17:58.800 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.800 INFO [stderr] | ^^^^ Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:17:58.800 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:17:58.800 INFO [stderr] | | Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] Dec 15 09:17:58.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.800 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.800 INFO [stderr] | ^ Dec 15 09:17:58.800 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.800 INFO [stderr] | ^^^^ Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:17:58.800 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:17:58.800 INFO [stderr] | | Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] Dec 15 09:17:58.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.800 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.800 INFO [stderr] | ^ Dec 15 09:17:58.800 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.800 INFO [stderr] | ^^^^ Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:17:58.800 INFO [stderr] | Dec 15 09:17:58.800 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:17:58.800 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:17:58.800 INFO [stderr] | | Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] | in this macro invocation Dec 15 09:17:58.800 INFO [stderr] Dec 15 09:17:58.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.800 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.801 INFO [stderr] | ^ Dec 15 09:17:58.801 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.801 INFO [stderr] | ^^^^ Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:17:58.801 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:17:58.801 INFO [stderr] | | Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] Dec 15 09:17:58.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.801 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 3 | #[repr(C)] Dec 15 09:17:58.801 INFO [stderr] | ^ Dec 15 09:17:58.801 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:17:58.801 INFO [stderr] | ^^^^ Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:17:58.801 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:17:58.801 INFO [stderr] | | Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] Dec 15 09:17:58.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.801 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 24 | #[repr(C)] Dec 15 09:17:58.801 INFO [stderr] | ^ Dec 15 09:17:58.801 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:17:58.801 INFO [stderr] | ^^^^ Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:17:58.801 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:17:58.801 INFO [stderr] | | Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] Dec 15 09:17:58.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.801 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 45 | #[repr(C)] Dec 15 09:17:58.801 INFO [stderr] | ^ Dec 15 09:17:58.801 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:17:58.801 INFO [stderr] | ^^^^ Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:17:58.801 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:17:58.801 INFO [stderr] | | Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] Dec 15 09:17:58.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.801 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 66 | #[repr(C)] Dec 15 09:17:58.801 INFO [stderr] | ^ Dec 15 09:17:58.801 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:17:58.801 INFO [stderr] | ^^^^ Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:17:58.801 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:17:58.801 INFO [stderr] | | Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] | in this macro invocation Dec 15 09:17:58.801 INFO [stderr] Dec 15 09:17:58.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:17:58.801 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.801 INFO [stderr] 87 | #[repr(C)] Dec 15 09:17:58.801 INFO [stderr] | ^ Dec 15 09:17:58.801 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:17:58.801 INFO [stderr] | ^^^^ Dec 15 09:17:58.801 INFO [stderr] | Dec 15 09:17:58.802 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:17:58.802 INFO [stderr] | Dec 15 09:17:58.802 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:17:58.802 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:17:58.802 INFO [stderr] | | Dec 15 09:17:58.802 INFO [stderr] | in this macro invocation Dec 15 09:17:58.802 INFO [stderr] | in this macro invocation Dec 15 09:17:58.802 INFO [stderr] Dec 15 09:18:01.987 INFO [stderr] warning: the feature `associated_consts` has been stable since 1.20.0 and no longer requires an attribute to enable Dec 15 09:18:01.987 INFO [stderr] --> src/lib.rs:1:12 Dec 15 09:18:01.987 INFO [stderr] | Dec 15 09:18:01.987 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 15 09:18:01.987 INFO [stderr] | ^^^^^^^^^^^^^^^^^ Dec 15 09:18:01.987 INFO [stderr] | Dec 15 09:18:01.987 INFO [stderr] = note: #[warn(stable_features)] on by default Dec 15 09:18:01.987 INFO [stderr] Dec 15 09:18:01.987 INFO [stderr] warning: the feature `cfg_target_feature` has been stable since 1.27.0 and no longer requires an attribute to enable Dec 15 09:18:01.987 INFO [stderr] --> src/lib.rs:1:31 Dec 15 09:18:01.987 INFO [stderr] | Dec 15 09:18:01.987 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 15 09:18:01.987 INFO [stderr] | ^^^^^^^^^^^^^^^^^^ Dec 15 09:18:01.987 INFO [stderr] Dec 15 09:18:02.379 INFO [stderr] Finished dev [unoptimized + debuginfo] target(s) in 4.66s Dec 15 09:18:02.382 INFO [stderr] su: No module specific data is present Dec 15 09:18:02.657 INFO running `"docker" "inspect" "41a93d7fda31bf3108bc99887eacf38a7db99686fefba2266006909232e97b61"` Dec 15 09:18:02.742 INFO running `"docker" "rm" "-f" "41a93d7fda31bf3108bc99887eacf38a7db99686fefba2266006909232e97b61"` Dec 15 09:18:02.848 INFO [stdout] 41a93d7fda31bf3108bc99887eacf38a7db99686fefba2266006909232e97b61 Dec 15 09:18:02.852 INFO running `"docker" "create" "-v" "/mnt/big/crater/work/local/target-dirs/pr-56550/worker-5/master#bd47d6825bf4090517549d33cfef10d3300b4a75:/target:rw,Z" "-v" "/mnt/big/crater/work/local/test-source/worker-5/pr-56550/master#bd47d6825bf4090517549d33cfef10d3300b4a75:/source:ro,Z" "-v" "/mnt/big/crater/work/local/cargo-home:/cargo-home:ro,Z" "-v" "/mnt/big/crater/work/local/rustup-home:/rustup-home:ro,Z" "-e" "USER_ID=1000" "-e" "SOURCE_DIR=/source" "-e" "USER_ID=1000" "-e" "CMD=cargo +bd47d6825bf4090517549d33cfef10d3300b4a75-alt test --frozen --no-run" "-e" "CARGO_TARGET_DIR=/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/cargo-home" "-e" "RUSTUP_HOME=/rustup-home" "-m" "1536M" "--network" "none" "crater"` Dec 15 09:18:03.056 INFO [stdout] 8d78201696a8b3fae0be35760cffdfff2d970cfe138cdab9c11187110ce3b278 Dec 15 09:18:03.060 INFO running `"docker" "start" "-a" "8d78201696a8b3fae0be35760cffdfff2d970cfe138cdab9c11187110ce3b278"` Dec 15 09:18:04.754 INFO [stderr] usermod: no changes Dec 15 09:18:04.823 INFO [stderr] Compiling hagane-simd v0.1.0 (/source) Dec 15 09:18:11.799 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.799 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.799 INFO [stderr] | Dec 15 09:18:11.799 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.799 INFO [stderr] | ^ Dec 15 09:18:11.799 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.799 INFO [stderr] | ^^^^ Dec 15 09:18:11.799 INFO [stderr] | Dec 15 09:18:11.799 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:18:11.799 INFO [stderr] | Dec 15 09:18:11.799 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:18:11.799 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:18:11.799 INFO [stderr] | | Dec 15 09:18:11.799 INFO [stderr] | in this macro invocation Dec 15 09:18:11.799 INFO [stderr] | in this macro invocation Dec 15 09:18:11.799 INFO [stderr] Dec 15 09:18:11.799 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.799 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.799 INFO [stderr] | Dec 15 09:18:11.799 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.799 INFO [stderr] | ^ Dec 15 09:18:11.799 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.799 INFO [stderr] | ^^^^ Dec 15 09:18:11.799 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:18:11.800 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:18:11.800 INFO [stderr] | | Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] Dec 15 09:18:11.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.800 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.800 INFO [stderr] | ^ Dec 15 09:18:11.800 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.800 INFO [stderr] | ^^^^ Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:18:11.800 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:18:11.800 INFO [stderr] | | Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] Dec 15 09:18:11.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.800 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.800 INFO [stderr] | ^ Dec 15 09:18:11.800 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.800 INFO [stderr] | ^^^^ Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:18:11.800 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:18:11.800 INFO [stderr] | | Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] Dec 15 09:18:11.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.800 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.800 INFO [stderr] | ^ Dec 15 09:18:11.800 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.800 INFO [stderr] | ^^^^ Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 15 09:18:11.800 INFO [stderr] | ---------------------------------------------------------------- Dec 15 09:18:11.800 INFO [stderr] | | Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] Dec 15 09:18:11.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.800 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.800 INFO [stderr] | ^ Dec 15 09:18:11.800 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.800 INFO [stderr] | ^^^^ Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:18:11.800 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:18:11.800 INFO [stderr] | | Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] Dec 15 09:18:11.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.800 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.800 INFO [stderr] | ^ Dec 15 09:18:11.800 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.800 INFO [stderr] | ^^^^ Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:18:11.800 INFO [stderr] | Dec 15 09:18:11.800 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:18:11.800 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:18:11.800 INFO [stderr] | | Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] | in this macro invocation Dec 15 09:18:11.800 INFO [stderr] Dec 15 09:18:11.800 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.801 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.801 INFO [stderr] | ^ Dec 15 09:18:11.801 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.801 INFO [stderr] | ^^^^ Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:18:11.801 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:18:11.801 INFO [stderr] | | Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] Dec 15 09:18:11.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.801 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.801 INFO [stderr] | ^ Dec 15 09:18:11.801 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.801 INFO [stderr] | ^^^^ Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:18:11.801 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:18:11.801 INFO [stderr] | | Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] Dec 15 09:18:11.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.801 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.801 INFO [stderr] | ^ Dec 15 09:18:11.801 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.801 INFO [stderr] | ^^^^ Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 15 09:18:11.801 INFO [stderr] | ---------------------------------------------------------------------- Dec 15 09:18:11.801 INFO [stderr] | | Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] Dec 15 09:18:11.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.801 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.801 INFO [stderr] | ^ Dec 15 09:18:11.801 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.801 INFO [stderr] | ^^^^ Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:18:11.801 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:18:11.801 INFO [stderr] | | Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.801 INFO [stderr] Dec 15 09:18:11.801 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.801 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.801 INFO [stderr] | ^ Dec 15 09:18:11.801 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.801 INFO [stderr] | ^^^^ Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:18:11.801 INFO [stderr] | Dec 15 09:18:11.801 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:18:11.801 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:18:11.801 INFO [stderr] | | Dec 15 09:18:11.801 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] Dec 15 09:18:11.802 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.802 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.802 INFO [stderr] | ^ Dec 15 09:18:11.802 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.802 INFO [stderr] | ^^^^ Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:18:11.802 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:18:11.802 INFO [stderr] | | Dec 15 09:18:11.802 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] Dec 15 09:18:11.802 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.802 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.802 INFO [stderr] | ^ Dec 15 09:18:11.802 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.802 INFO [stderr] | ^^^^ Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:18:11.802 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:18:11.802 INFO [stderr] | | Dec 15 09:18:11.802 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] Dec 15 09:18:11.802 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.802 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.802 INFO [stderr] | ^ Dec 15 09:18:11.802 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.802 INFO [stderr] | ^^^^ Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 15 09:18:11.802 INFO [stderr] | ------------------------------------------------------------ Dec 15 09:18:11.802 INFO [stderr] | | Dec 15 09:18:11.802 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] | in this macro invocation Dec 15 09:18:11.802 INFO [stderr] Dec 15 09:18:11.802 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.802 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.802 INFO [stderr] | Dec 15 09:18:11.802 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.802 INFO [stderr] | ^ Dec 15 09:18:11.803 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.803 INFO [stderr] | ^^^^ Dec 15 09:18:11.803 INFO [stderr] | Dec 15 09:18:11.803 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:18:11.803 INFO [stderr] | Dec 15 09:18:11.803 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:18:11.803 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:18:11.803 INFO [stderr] | | Dec 15 09:18:11.803 INFO [stderr] | in this macro invocation Dec 15 09:18:11.803 INFO [stderr] | in this macro invocation Dec 15 09:18:11.803 INFO [stderr] Dec 15 09:18:11.803 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.803 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.803 INFO [stderr] | Dec 15 09:18:11.803 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.803 INFO [stderr] | ^ Dec 15 09:18:11.803 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.803 INFO [stderr] | ^^^^ Dec 15 09:18:11.803 INFO [stderr] | Dec 15 09:18:11.803 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:18:11.803 INFO [stderr] | Dec 15 09:18:11.803 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:18:11.803 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:18:11.803 INFO [stderr] | | Dec 15 09:18:11.803 INFO [stderr] | in this macro invocation Dec 15 09:18:11.803 INFO [stderr] | in this macro invocation Dec 15 09:18:11.803 INFO [stderr] Dec 15 09:18:11.804 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.804 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.804 INFO [stderr] | ^ Dec 15 09:18:11.804 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.804 INFO [stderr] | ^^^^ Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:18:11.804 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:18:11.804 INFO [stderr] | | Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] Dec 15 09:18:11.804 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.804 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.804 INFO [stderr] | ^ Dec 15 09:18:11.804 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.804 INFO [stderr] | ^^^^ Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:18:11.804 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:18:11.804 INFO [stderr] | | Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] Dec 15 09:18:11.804 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.804 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.804 INFO [stderr] | ^ Dec 15 09:18:11.804 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.804 INFO [stderr] | ^^^^ Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 15 09:18:11.804 INFO [stderr] | ----------------------------------------------------------------- Dec 15 09:18:11.804 INFO [stderr] | | Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] Dec 15 09:18:11.804 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.804 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.804 INFO [stderr] | ^ Dec 15 09:18:11.804 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.804 INFO [stderr] | ^^^^ Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:18:11.804 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:18:11.804 INFO [stderr] | | Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] Dec 15 09:18:11.804 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.804 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.804 INFO [stderr] | ^ Dec 15 09:18:11.804 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.804 INFO [stderr] | ^^^^ Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:18:11.804 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:18:11.804 INFO [stderr] | | Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] | in this macro invocation Dec 15 09:18:11.804 INFO [stderr] Dec 15 09:18:11.804 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.804 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.804 INFO [stderr] | ^ Dec 15 09:18:11.804 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.804 INFO [stderr] | ^^^^ Dec 15 09:18:11.804 INFO [stderr] | Dec 15 09:18:11.804 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:18:11.805 INFO [stderr] | Dec 15 09:18:11.805 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:18:11.805 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:18:11.805 INFO [stderr] | | Dec 15 09:18:11.805 INFO [stderr] | in this macro invocation Dec 15 09:18:11.805 INFO [stderr] | in this macro invocation Dec 15 09:18:11.805 INFO [stderr] Dec 15 09:18:11.805 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.805 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.805 INFO [stderr] | Dec 15 09:18:11.805 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.805 INFO [stderr] | ^ Dec 15 09:18:11.805 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.805 INFO [stderr] | ^^^^ Dec 15 09:18:11.805 INFO [stderr] | Dec 15 09:18:11.805 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:18:11.805 INFO [stderr] | Dec 15 09:18:11.805 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:18:11.805 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:18:11.805 INFO [stderr] | | Dec 15 09:18:11.805 INFO [stderr] | in this macro invocation Dec 15 09:18:11.805 INFO [stderr] | in this macro invocation Dec 15 09:18:11.805 INFO [stderr] Dec 15 09:18:11.806 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.806 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.806 INFO [stderr] | ^ Dec 15 09:18:11.806 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.806 INFO [stderr] | ^^^^ Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 15 09:18:11.806 INFO [stderr] | ----------------------------------------------------------------------- Dec 15 09:18:11.806 INFO [stderr] | | Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] Dec 15 09:18:11.806 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.806 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.806 INFO [stderr] | ^ Dec 15 09:18:11.806 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.806 INFO [stderr] | ^^^^ Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:18:11.806 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:18:11.806 INFO [stderr] | | Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] Dec 15 09:18:11.806 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.806 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.806 INFO [stderr] | ^ Dec 15 09:18:11.806 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.806 INFO [stderr] | ^^^^ Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:18:11.806 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:18:11.806 INFO [stderr] | | Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] Dec 15 09:18:11.806 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.806 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.806 INFO [stderr] | ^ Dec 15 09:18:11.806 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.806 INFO [stderr] | ^^^^ Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:18:11.806 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:18:11.806 INFO [stderr] | | Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] Dec 15 09:18:11.806 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.806 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.806 INFO [stderr] | ^ Dec 15 09:18:11.806 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.806 INFO [stderr] | ^^^^ Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:18:11.806 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:18:11.806 INFO [stderr] | | Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] | in this macro invocation Dec 15 09:18:11.806 INFO [stderr] Dec 15 09:18:11.806 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.806 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.806 INFO [stderr] | Dec 15 09:18:11.806 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.806 INFO [stderr] | ^ Dec 15 09:18:11.806 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.807 INFO [stderr] | ^^^^ Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 15 09:18:11.807 INFO [stderr] | ----------------------------------------------------------------------------- Dec 15 09:18:11.807 INFO [stderr] | | Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] Dec 15 09:18:11.807 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.807 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.807 INFO [stderr] | ^ Dec 15 09:18:11.807 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.807 INFO [stderr] | ^^^^ Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:18:11.807 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:18:11.807 INFO [stderr] | | Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] Dec 15 09:18:11.807 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.807 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.807 INFO [stderr] | ^ Dec 15 09:18:11.807 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.807 INFO [stderr] | ^^^^ Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:18:11.807 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:18:11.807 INFO [stderr] | | Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] Dec 15 09:18:11.807 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.807 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.807 INFO [stderr] | ^ Dec 15 09:18:11.807 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.807 INFO [stderr] | ^^^^ Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:18:11.807 INFO [stderr] | Dec 15 09:18:11.807 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:18:11.807 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:18:11.807 INFO [stderr] | | Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] | in this macro invocation Dec 15 09:18:11.807 INFO [stderr] Dec 15 09:18:11.808 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.808 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.808 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.808 INFO [stderr] | ^ Dec 15 09:18:11.808 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.808 INFO [stderr] | ^^^^ Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.808 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.808 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:18:11.808 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:18:11.808 INFO [stderr] | | Dec 15 09:18:11.808 INFO [stderr] | in this macro invocation Dec 15 09:18:11.808 INFO [stderr] | in this macro invocation Dec 15 09:18:11.808 INFO [stderr] Dec 15 09:18:11.808 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.808 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.808 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.808 INFO [stderr] | ^ Dec 15 09:18:11.808 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.808 INFO [stderr] | ^^^^ Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.808 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.808 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 15 09:18:11.808 INFO [stderr] | ------------------------------------------------------------------- Dec 15 09:18:11.808 INFO [stderr] | | Dec 15 09:18:11.808 INFO [stderr] | in this macro invocation Dec 15 09:18:11.808 INFO [stderr] | in this macro invocation Dec 15 09:18:11.808 INFO [stderr] Dec 15 09:18:11.808 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.808 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.808 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.808 INFO [stderr] | ^ Dec 15 09:18:11.808 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.808 INFO [stderr] | ^^^^ Dec 15 09:18:11.808 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:18:11.809 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:18:11.809 INFO [stderr] | | Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] Dec 15 09:18:11.809 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.809 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.809 INFO [stderr] | ^ Dec 15 09:18:11.809 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.809 INFO [stderr] | ^^^^ Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:18:11.809 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:18:11.809 INFO [stderr] | | Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] Dec 15 09:18:11.809 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.809 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.809 INFO [stderr] | ^ Dec 15 09:18:11.809 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.809 INFO [stderr] | ^^^^ Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:18:11.809 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:18:11.809 INFO [stderr] | | Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] Dec 15 09:18:11.809 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.809 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.809 INFO [stderr] | ^ Dec 15 09:18:11.809 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.809 INFO [stderr] | ^^^^ Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:18:11.809 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:18:11.809 INFO [stderr] | | Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] Dec 15 09:18:11.809 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.809 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.809 INFO [stderr] | ^ Dec 15 09:18:11.809 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.809 INFO [stderr] | ^^^^ Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 15 09:18:11.809 INFO [stderr] | ------------------------------------------------------------------------ Dec 15 09:18:11.809 INFO [stderr] | | Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] Dec 15 09:18:11.809 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.809 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.809 INFO [stderr] | ^ Dec 15 09:18:11.809 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.809 INFO [stderr] | ^^^^ Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:18:11.809 INFO [stderr] | Dec 15 09:18:11.809 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:18:11.809 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:18:11.809 INFO [stderr] | | Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] | in this macro invocation Dec 15 09:18:11.809 INFO [stderr] Dec 15 09:18:11.809 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.809 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.810 INFO [stderr] | ^ Dec 15 09:18:11.810 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.810 INFO [stderr] | ^^^^ Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:18:11.810 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:18:11.810 INFO [stderr] | | Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] Dec 15 09:18:11.810 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.810 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.810 INFO [stderr] | ^ Dec 15 09:18:11.810 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.810 INFO [stderr] | ^^^^ Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:18:11.810 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:18:11.810 INFO [stderr] | | Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] Dec 15 09:18:11.810 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.810 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.810 INFO [stderr] | ^ Dec 15 09:18:11.810 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.810 INFO [stderr] | ^^^^ Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:18:11.810 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:18:11.810 INFO [stderr] | | Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] Dec 15 09:18:11.810 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.810 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.810 INFO [stderr] | ^ Dec 15 09:18:11.810 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.810 INFO [stderr] | ^^^^ Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 15 09:18:11.810 INFO [stderr] | --------------------------------------------------------------------- Dec 15 09:18:11.810 INFO [stderr] | | Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] Dec 15 09:18:11.810 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.810 INFO [stderr] --> src/macros.rs:3:12 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 3 | #[repr(C)] Dec 15 09:18:11.810 INFO [stderr] | ^ Dec 15 09:18:11.810 INFO [stderr] 4 | #[repr(simd)] Dec 15 09:18:11.810 INFO [stderr] | ^^^^ Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:18:11.810 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:18:11.810 INFO [stderr] | | Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] | in this macro invocation Dec 15 09:18:11.810 INFO [stderr] Dec 15 09:18:11.810 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.810 INFO [stderr] --> src/macros.rs:24:12 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 24 | #[repr(C)] Dec 15 09:18:11.810 INFO [stderr] | ^ Dec 15 09:18:11.810 INFO [stderr] 25 | #[repr(simd)] Dec 15 09:18:11.810 INFO [stderr] | ^^^^ Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:18:11.810 INFO [stderr] | Dec 15 09:18:11.810 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:18:11.810 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:18:11.811 INFO [stderr] | | Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] Dec 15 09:18:11.811 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.811 INFO [stderr] --> src/macros.rs:45:12 Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] 45 | #[repr(C)] Dec 15 09:18:11.811 INFO [stderr] | ^ Dec 15 09:18:11.811 INFO [stderr] 46 | #[repr(simd)] Dec 15 09:18:11.811 INFO [stderr] | ^^^^ Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:18:11.811 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:18:11.811 INFO [stderr] | | Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] Dec 15 09:18:11.811 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.811 INFO [stderr] --> src/macros.rs:66:12 Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] 66 | #[repr(C)] Dec 15 09:18:11.811 INFO [stderr] | ^ Dec 15 09:18:11.811 INFO [stderr] 67 | #[repr(simd)] Dec 15 09:18:11.811 INFO [stderr] | ^^^^ Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:18:11.811 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:18:11.811 INFO [stderr] | | Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] Dec 15 09:18:11.811 INFO [stderr] warning[E0566]: conflicting representation hints Dec 15 09:18:11.811 INFO [stderr] --> src/macros.rs:87:12 Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] 87 | #[repr(C)] Dec 15 09:18:11.811 INFO [stderr] | ^ Dec 15 09:18:11.811 INFO [stderr] 88 | #[repr(simd)] Dec 15 09:18:11.811 INFO [stderr] | ^^^^ Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 15 09:18:11.811 INFO [stderr] | Dec 15 09:18:11.811 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 15 09:18:11.811 INFO [stderr] | -------------------------------------------------------------------------- Dec 15 09:18:11.811 INFO [stderr] | | Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] | in this macro invocation Dec 15 09:18:11.811 INFO [stderr] Dec 15 09:18:17.159 INFO [stderr] warning: the feature `associated_consts` has been stable since 1.20.0 and no longer requires an attribute to enable Dec 15 09:18:17.159 INFO [stderr] --> src/lib.rs:1:12 Dec 15 09:18:17.159 INFO [stderr] | Dec 15 09:18:17.159 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 15 09:18:17.159 INFO [stderr] | ^^^^^^^^^^^^^^^^^ Dec 15 09:18:17.159 INFO [stderr] | Dec 15 09:18:17.159 INFO [stderr] = note: #[warn(stable_features)] on by default Dec 15 09:18:17.159 INFO [stderr] Dec 15 09:18:17.159 INFO [stderr] warning: the feature `cfg_target_feature` has been stable since 1.27.0 and no longer requires an attribute to enable Dec 15 09:18:17.159 INFO [stderr] --> src/lib.rs:1:31 Dec 15 09:18:17.159 INFO [stderr] | Dec 15 09:18:17.159 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 15 09:18:17.159 INFO [stderr] | ^^^^^^^^^^^^^^^^^^ Dec 15 09:18:17.159 INFO [stderr] Dec 15 09:18:18.678 INFO [stderr] Finished dev [unoptimized + debuginfo] target(s) in 13.90s Dec 15 09:18:18.683 INFO [stderr] su: No module specific data is present Dec 15 09:18:18.961 INFO running `"docker" "inspect" "8d78201696a8b3fae0be35760cffdfff2d970cfe138cdab9c11187110ce3b278"` Dec 15 09:18:19.065 INFO running `"docker" "rm" "-f" "8d78201696a8b3fae0be35760cffdfff2d970cfe138cdab9c11187110ce3b278"` Dec 15 09:18:19.164 INFO [stdout] 8d78201696a8b3fae0be35760cffdfff2d970cfe138cdab9c11187110ce3b278 Dec 15 09:18:19.166 INFO running `"docker" "create" "-v" "/mnt/big/crater/work/local/target-dirs/pr-56550/worker-5/master#bd47d6825bf4090517549d33cfef10d3300b4a75:/target:rw,Z" "-v" "/mnt/big/crater/work/local/test-source/worker-5/pr-56550/master#bd47d6825bf4090517549d33cfef10d3300b4a75:/source:ro,Z" "-v" "/mnt/big/crater/work/local/cargo-home:/cargo-home:ro,Z" "-v" "/mnt/big/crater/work/local/rustup-home:/rustup-home:ro,Z" "-e" "USER_ID=1000" "-e" "SOURCE_DIR=/source" "-e" "USER_ID=1000" "-e" "CMD=cargo +bd47d6825bf4090517549d33cfef10d3300b4a75-alt test --frozen" "-e" "CARGO_TARGET_DIR=/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/cargo-home" "-e" "RUSTUP_HOME=/rustup-home" "-m" "1536M" "--network" "none" "crater"` Dec 15 09:18:19.486 INFO [stdout] 79108575e972260094a7bb796c2711dc15c301a91ded2a599cdd832b28bbc86f Dec 15 09:18:19.488 INFO running `"docker" "start" "-a" "79108575e972260094a7bb796c2711dc15c301a91ded2a599cdd832b28bbc86f"` Dec 15 09:18:19.940 INFO [stderr] usermod: no changes Dec 15 09:18:19.972 INFO [stderr] Finished dev [unoptimized + debuginfo] target(s) in 0.01s Dec 15 09:18:19.985 INFO [stderr] Running /target/debug/deps/hagane_simd-d30d0ceeb8b42e84 Dec 15 09:18:19.986 INFO [stderr] Running /target/debug/deps/assembly_generation_test_float4-5af00f0e9e4ab5b2 Dec 15 09:18:19.986 INFO [stdout] Dec 15 09:18:19.986 INFO [stdout] running 0 tests Dec 15 09:18:19.986 INFO [stdout] Dec 15 09:18:19.986 INFO [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:19.986 INFO [stdout] Dec 15 09:18:19.989 INFO [stderr] Running /target/debug/deps/conversion_test-5404b32637674e16 Dec 15 09:18:19.989 INFO [stdout] Dec 15 09:18:19.989 INFO [stdout] running 1 test Dec 15 09:18:19.989 INFO [stdout] test test ... ok Dec 15 09:18:19.989 INFO [stdout] Dec 15 09:18:19.989 INFO [stdout] test result: ok. 1 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:19.989 INFO [stdout] Dec 15 09:18:19.996 INFO [stdout] Dec 15 09:18:19.996 INFO [stdout] running 18 tests Dec 15 09:18:19.996 INFO [stdout] test test_to_float ... ok Dec 15 09:18:19.997 INFO [stdout] test test_to_int_sat ... ok Dec 15 09:18:19.997 INFO [stdout] test test_to_char ... ok Dec 15 09:18:19.997 INFO [stdout] test test_to_int ... ok Dec 15 09:18:19.997 INFO [stdout] test test_to_long_sat ... ok Dec 15 09:18:19.999 INFO [stdout] test test_to_char_sat ... ok Dec 15 09:18:19.999 INFO [stdout] test test_to_double ... ok Dec 15 09:18:20.003 INFO [stdout] test test_to_uint ... ok Dec 15 09:18:20.003 INFO [stdout] test test_to_ulong ... ok Dec 15 09:18:20.003 INFO [stdout] test test_to_uchar_sat ... ok Dec 15 09:18:20.003 INFO [stdout] test test_to_uint_sat ... ok Dec 15 09:18:20.003 INFO [stdout] test test_to_ushort ... ok Dec 15 09:18:20.003 INFO [stdout] test test_to_ushort_sat ... ok Dec 15 09:18:20.015 INFO [stderr] Running /target/debug/deps/float_test-9fe3352a8fc5c2bc Dec 15 09:18:20.015 INFO [stdout] test test_to_ulong_sat ... ok Dec 15 09:18:20.015 INFO [stdout] test test_to_short ... ok Dec 15 09:18:20.015 INFO [stdout] test test_to_uchar ... ok Dec 15 09:18:20.015 INFO [stdout] test test_to_short_sat ... ok Dec 15 09:18:20.015 INFO [stdout] test test_to_long ... ok Dec 15 09:18:20.015 INFO [stdout] Dec 15 09:18:20.015 INFO [stdout] test result: ok. 18 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:20.015 INFO [stdout] Dec 15 09:18:20.017 INFO [stdout] Dec 15 09:18:20.017 INFO [stdout] running 12 tests Dec 15 09:18:20.017 INFO [stdout] test test_ceil ... ok Dec 15 09:18:20.017 INFO [stdout] test test_copysign ... ok Dec 15 09:18:20.017 INFO [stdout] test test_floor ... ok Dec 15 09:18:20.017 INFO [stdout] test test_mix ... ok Dec 15 09:18:20.017 INFO [stdout] test test_recip ... ok Dec 15 09:18:20.017 INFO [stdout] test test_fract ... ok Dec 15 09:18:20.017 INFO [stdout] test test_sign ... ok Dec 15 09:18:20.017 INFO [stdout] test test_trunc ... ok Dec 15 09:18:20.017 INFO [stdout] test test_rsqrt ... ok Dec 15 09:18:20.017 INFO [stdout] test test_step ... ok Dec 15 09:18:20.017 INFO [stdout] test test_sqrt ... ok Dec 15 09:18:20.019 INFO [stdout] test test_smoothstep ... ok Dec 15 09:18:20.019 INFO [stdout] Dec 15 09:18:20.019 INFO [stdout] test result: ok. 12 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:20.019 INFO [stdout] Dec 15 09:18:20.023 INFO [stderr] Running /target/debug/deps/integer_test-14148c314ecda486 Dec 15 09:18:20.023 INFO [stderr] Running /target/debug/deps/logic_test-e5851074ab0cff33 Dec 15 09:18:20.023 INFO [stdout] Dec 15 09:18:20.023 INFO [stdout] running 2 tests Dec 15 09:18:20.023 INFO [stdout] test test_all ... ok Dec 15 09:18:20.023 INFO [stdout] test test_any ... ok Dec 15 09:18:20.023 INFO [stdout] Dec 15 09:18:20.023 INFO [stdout] test result: ok. 2 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:20.023 INFO [stdout] Dec 15 09:18:20.023 INFO [stdout] Dec 15 09:18:20.023 INFO [stdout] running 2 tests Dec 15 09:18:20.023 INFO [stdout] test test_any ... ok Dec 15 09:18:20.023 INFO [stdout] test test_all ... ok Dec 15 09:18:20.023 INFO [stdout] Dec 15 09:18:20.023 INFO [stdout] test result: ok. 2 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:20.023 INFO [stdout] Dec 15 09:18:20.024 INFO [stdout] Dec 15 09:18:20.024 INFO [stderr] Running /target/debug/deps/select_test-07b96b0a98fd5c8a Dec 15 09:18:20.024 INFO [stdout] running 2 tests Dec 15 09:18:20.024 INFO [stdout] test test_select ... ok Dec 15 09:18:20.024 INFO [stdout] test test_bitselect ... ok Dec 15 09:18:20.024 INFO [stdout] Dec 15 09:18:20.024 INFO [stdout] test result: ok. 2 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:20.024 INFO [stdout] Dec 15 09:18:20.025 INFO [stderr] Running /target/debug/deps/vector_test-a3f4cb13116bf73e Dec 15 09:18:20.026 INFO [stdout] Dec 15 09:18:20.026 INFO [stdout] running 7 tests Dec 15 09:18:20.026 INFO [stdout] test test_reduce_min ... ok Dec 15 09:18:20.026 INFO [stdout] test test_reduce_max ... ok Dec 15 09:18:20.026 INFO [stdout] test test_reduce_add ... ok Dec 15 09:18:20.026 INFO [stdout] test test_min ... ok Dec 15 09:18:20.026 INFO [stdout] test test_max ... ok Dec 15 09:18:20.026 INFO [stdout] test test_clamp ... ok Dec 15 09:18:20.027 INFO [stdout] test test_abs ... ok Dec 15 09:18:20.027 INFO [stdout] Dec 15 09:18:20.027 INFO [stdout] test result: ok. 7 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:20.027 INFO [stdout] Dec 15 09:18:20.027 INFO [stderr] Doc-tests hagane-simd Dec 15 09:18:21.399 INFO [stdout] Dec 15 09:18:21.399 INFO [stdout] running 0 tests Dec 15 09:18:21.399 INFO [stdout] Dec 15 09:18:21.399 INFO [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out Dec 15 09:18:21.399 INFO [stdout] Dec 15 09:18:21.413 INFO [stderr] su: No module specific data is present Dec 15 09:18:21.706 INFO running `"docker" "inspect" "79108575e972260094a7bb796c2711dc15c301a91ded2a599cdd832b28bbc86f"` Dec 15 09:18:21.847 INFO running `"docker" "rm" "-f" "79108575e972260094a7bb796c2711dc15c301a91ded2a599cdd832b28bbc86f"` Dec 15 09:18:21.947 INFO [stdout] 79108575e972260094a7bb796c2711dc15c301a91ded2a599cdd832b28bbc86f