Dec 05 12:17:32.121 INFO checking hagane-simd-0.1.0 against master#c8ae2de8363be088604ffa2ccba84ff7ad7250bc for pr-56481 Dec 05 12:17:32.121 INFO running `"docker" "create" "-v" "/mnt/big/crater/work/local/target-dirs/pr-56481/worker-3/master#c8ae2de8363be088604ffa2ccba84ff7ad7250bc:/target:rw,Z" "-v" "/mnt/big/crater/work/local/test-source/worker-3/pr-56481/master#c8ae2de8363be088604ffa2ccba84ff7ad7250bc:/source:ro,Z" "-v" "/mnt/big/crater/work/local/cargo-home:/cargo-home:ro,Z" "-v" "/mnt/big/crater/work/local/rustup-home:/rustup-home:ro,Z" "-e" "USER_ID=1000" "-e" "SOURCE_DIR=/source" "-e" "USER_ID=1000" "-e" "CMD=cargo +c8ae2de8363be088604ffa2ccba84ff7ad7250bc-alt check --frozen --all --all-targets" "-e" "CARGO_TARGET_DIR=/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/cargo-home" "-e" "RUSTUP_HOME=/rustup-home" "-m" "1536M" "--network" "none" "crater"` Dec 05 12:17:32.353 INFO [stdout] c284cf7f95d87a149ee32ddbd4325de2e5573558784a280b0588c8402a0508ef Dec 05 12:17:32.355 INFO running `"docker" "start" "-a" "c284cf7f95d87a149ee32ddbd4325de2e5573558784a280b0588c8402a0508ef"` Dec 05 12:17:33.274 INFO [stderr] usermod: no changes Dec 05 12:17:33.347 INFO [stderr] Checking hagane-simd v0.1.0 (/source) Dec 05 12:17:34.718 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.718 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.718 INFO [stderr] | Dec 05 12:17:34.718 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.718 INFO [stderr] | ^ Dec 05 12:17:34.718 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.718 INFO [stderr] | ^^^^ Dec 05 12:17:34.718 INFO [stderr] | Dec 05 12:17:34.718 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.718 INFO [stderr] | Dec 05 12:17:34.718 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.718 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.718 INFO [stderr] | | Dec 05 12:17:34.718 INFO [stderr] | in this macro invocation Dec 05 12:17:34.718 INFO [stderr] | in this macro invocation Dec 05 12:17:34.718 INFO [stderr] Dec 05 12:17:34.718 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.718 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.718 INFO [stderr] | Dec 05 12:17:34.718 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.718 INFO [stderr] | ^ Dec 05 12:17:34.718 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.718 INFO [stderr] | ^^^^ Dec 05 12:17:34.718 INFO [stderr] | Dec 05 12:17:34.718 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.718 INFO [stderr] | Dec 05 12:17:34.718 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.718 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.718 INFO [stderr] | | Dec 05 12:17:34.718 INFO [stderr] | in this macro invocation Dec 05 12:17:34.718 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] Dec 05 12:17:34.719 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.719 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.719 INFO [stderr] | ^ Dec 05 12:17:34.719 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.719 INFO [stderr] | ^^^^ Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.719 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.719 INFO [stderr] | | Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] Dec 05 12:17:34.719 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.719 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.719 INFO [stderr] | ^ Dec 05 12:17:34.719 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.719 INFO [stderr] | ^^^^ Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.719 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.719 INFO [stderr] | | Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] Dec 05 12:17:34.719 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.719 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.719 INFO [stderr] | ^ Dec 05 12:17:34.719 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.719 INFO [stderr] | ^^^^ Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.719 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.719 INFO [stderr] | | Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] Dec 05 12:17:34.719 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.719 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.719 INFO [stderr] | ^ Dec 05 12:17:34.719 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.719 INFO [stderr] | ^^^^ Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.719 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.719 INFO [stderr] | | Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] Dec 05 12:17:34.719 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.719 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.719 INFO [stderr] | ^ Dec 05 12:17:34.719 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.719 INFO [stderr] | ^^^^ Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.719 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.719 INFO [stderr] | | Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] | in this macro invocation Dec 05 12:17:34.719 INFO [stderr] Dec 05 12:17:34.719 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.719 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.719 INFO [stderr] | Dec 05 12:17:34.719 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.719 INFO [stderr] | ^ Dec 05 12:17:34.720 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.720 INFO [stderr] | ^^^^ Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.720 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.720 INFO [stderr] | | Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] Dec 05 12:17:34.720 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.720 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.720 INFO [stderr] | ^ Dec 05 12:17:34.720 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.720 INFO [stderr] | ^^^^ Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.720 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.720 INFO [stderr] | | Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] Dec 05 12:17:34.720 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.720 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.720 INFO [stderr] | ^ Dec 05 12:17:34.720 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.720 INFO [stderr] | ^^^^ Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.720 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.720 INFO [stderr] | | Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] Dec 05 12:17:34.720 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.720 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.720 INFO [stderr] | ^ Dec 05 12:17:34.720 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.720 INFO [stderr] | ^^^^ Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.720 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.720 INFO [stderr] | | Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] Dec 05 12:17:34.720 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.720 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.720 INFO [stderr] | ^ Dec 05 12:17:34.720 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.720 INFO [stderr] | ^^^^ Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.720 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.720 INFO [stderr] | | Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] | in this macro invocation Dec 05 12:17:34.720 INFO [stderr] Dec 05 12:17:34.720 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.720 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.720 INFO [stderr] | ^ Dec 05 12:17:34.720 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.720 INFO [stderr] | ^^^^ Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.720 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.720 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.721 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.721 INFO [stderr] | | Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] Dec 05 12:17:34.721 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.721 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.721 INFO [stderr] | ^ Dec 05 12:17:34.721 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.721 INFO [stderr] | ^^^^ Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.721 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.721 INFO [stderr] | | Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] Dec 05 12:17:34.721 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.721 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.721 INFO [stderr] | ^ Dec 05 12:17:34.721 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.721 INFO [stderr] | ^^^^ Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.721 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.721 INFO [stderr] | | Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] Dec 05 12:17:34.721 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.721 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.721 INFO [stderr] | ^ Dec 05 12:17:34.721 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.721 INFO [stderr] | ^^^^ Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.721 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.721 INFO [stderr] | | Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] Dec 05 12:17:34.721 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.721 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.721 INFO [stderr] | ^ Dec 05 12:17:34.721 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.721 INFO [stderr] | ^^^^ Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.721 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.721 INFO [stderr] | | Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] Dec 05 12:17:34.721 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.721 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.721 INFO [stderr] | ^ Dec 05 12:17:34.721 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.721 INFO [stderr] | ^^^^ Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.721 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.721 INFO [stderr] | | Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] | in this macro invocation Dec 05 12:17:34.721 INFO [stderr] Dec 05 12:17:34.721 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.721 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.721 INFO [stderr] | Dec 05 12:17:34.721 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.722 INFO [stderr] | ^ Dec 05 12:17:34.722 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.722 INFO [stderr] | ^^^^ Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.722 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.722 INFO [stderr] | | Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] Dec 05 12:17:34.722 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.722 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.722 INFO [stderr] | ^ Dec 05 12:17:34.722 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.722 INFO [stderr] | ^^^^ Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.722 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.722 INFO [stderr] | | Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] Dec 05 12:17:34.722 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.722 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.722 INFO [stderr] | ^ Dec 05 12:17:34.722 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.722 INFO [stderr] | ^^^^ Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.722 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.722 INFO [stderr] | | Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] Dec 05 12:17:34.722 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.722 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.722 INFO [stderr] | ^ Dec 05 12:17:34.722 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.722 INFO [stderr] | ^^^^ Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.722 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.722 INFO [stderr] | | Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] Dec 05 12:17:34.722 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.722 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.722 INFO [stderr] | ^ Dec 05 12:17:34.722 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.722 INFO [stderr] | ^^^^ Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.722 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.722 INFO [stderr] | | Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] | in this macro invocation Dec 05 12:17:34.722 INFO [stderr] Dec 05 12:17:34.722 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.722 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.722 INFO [stderr] | ^ Dec 05 12:17:34.722 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.722 INFO [stderr] | ^^^^ Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.722 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.722 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.723 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.723 INFO [stderr] | | Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] Dec 05 12:17:34.723 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.723 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.723 INFO [stderr] | ^ Dec 05 12:17:34.723 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.723 INFO [stderr] | ^^^^ Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.723 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.723 INFO [stderr] | | Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] Dec 05 12:17:34.723 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.723 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.723 INFO [stderr] | ^ Dec 05 12:17:34.723 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.723 INFO [stderr] | ^^^^ Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.723 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.723 INFO [stderr] | | Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] Dec 05 12:17:34.723 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.723 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.723 INFO [stderr] | ^ Dec 05 12:17:34.723 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.723 INFO [stderr] | ^^^^ Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.723 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.723 INFO [stderr] | | Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] Dec 05 12:17:34.723 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.723 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.723 INFO [stderr] | ^ Dec 05 12:17:34.723 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.723 INFO [stderr] | ^^^^ Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.723 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.723 INFO [stderr] | | Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] Dec 05 12:17:34.723 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.723 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.723 INFO [stderr] | ^ Dec 05 12:17:34.723 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.723 INFO [stderr] | ^^^^ Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.723 INFO [stderr] | Dec 05 12:17:34.723 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.723 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.723 INFO [stderr] | | Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] | in this macro invocation Dec 05 12:17:34.723 INFO [stderr] Dec 05 12:17:34.724 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.724 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.724 INFO [stderr] | ^ Dec 05 12:17:34.724 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.724 INFO [stderr] | ^^^^ Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.724 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.724 INFO [stderr] | | Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] Dec 05 12:17:34.724 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.724 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.724 INFO [stderr] | ^ Dec 05 12:17:34.724 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.724 INFO [stderr] | ^^^^ Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.724 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.724 INFO [stderr] | | Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] Dec 05 12:17:34.724 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.724 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.724 INFO [stderr] | ^ Dec 05 12:17:34.724 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.724 INFO [stderr] | ^^^^ Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.724 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.724 INFO [stderr] | | Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] Dec 05 12:17:34.724 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.724 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.724 INFO [stderr] | ^ Dec 05 12:17:34.724 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.724 INFO [stderr] | ^^^^ Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.724 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.724 INFO [stderr] | | Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] Dec 05 12:17:34.724 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.724 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.724 INFO [stderr] | ^ Dec 05 12:17:34.724 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.724 INFO [stderr] | ^^^^ Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.724 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.724 INFO [stderr] | | Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] | in this macro invocation Dec 05 12:17:34.724 INFO [stderr] Dec 05 12:17:34.724 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.724 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.724 INFO [stderr] | Dec 05 12:17:34.724 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.724 INFO [stderr] | ^ Dec 05 12:17:34.724 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.724 INFO [stderr] | ^^^^ Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.725 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.725 INFO [stderr] | | Dec 05 12:17:34.725 INFO [stderr] | in this macro invocation Dec 05 12:17:34.725 INFO [stderr] | in this macro invocation Dec 05 12:17:34.725 INFO [stderr] Dec 05 12:17:34.725 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.725 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.725 INFO [stderr] | ^ Dec 05 12:17:34.725 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.725 INFO [stderr] | ^^^^ Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.725 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.725 INFO [stderr] | | Dec 05 12:17:34.725 INFO [stderr] | in this macro invocation Dec 05 12:17:34.725 INFO [stderr] | in this macro invocation Dec 05 12:17:34.725 INFO [stderr] Dec 05 12:17:34.725 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.725 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.725 INFO [stderr] | ^ Dec 05 12:17:34.725 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.725 INFO [stderr] | ^^^^ Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.725 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.725 INFO [stderr] | | Dec 05 12:17:34.725 INFO [stderr] | in this macro invocation Dec 05 12:17:34.725 INFO [stderr] | in this macro invocation Dec 05 12:17:34.725 INFO [stderr] Dec 05 12:17:34.725 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.725 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.725 INFO [stderr] | ^ Dec 05 12:17:34.725 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.725 INFO [stderr] | ^^^^ Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.725 INFO [stderr] | Dec 05 12:17:34.725 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.725 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.726 INFO [stderr] | | Dec 05 12:17:34.726 INFO [stderr] | in this macro invocation Dec 05 12:17:34.726 INFO [stderr] | in this macro invocation Dec 05 12:17:34.726 INFO [stderr] Dec 05 12:17:34.726 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.726 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.726 INFO [stderr] | Dec 05 12:17:34.726 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.726 INFO [stderr] | ^ Dec 05 12:17:34.726 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.726 INFO [stderr] | ^^^^ Dec 05 12:17:34.726 INFO [stderr] | Dec 05 12:17:34.726 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.726 INFO [stderr] | Dec 05 12:17:34.726 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.726 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.726 INFO [stderr] | | Dec 05 12:17:34.726 INFO [stderr] | in this macro invocation Dec 05 12:17:34.726 INFO [stderr] | in this macro invocation Dec 05 12:17:34.726 INFO [stderr] Dec 05 12:17:34.726 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.726 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.726 INFO [stderr] | Dec 05 12:17:34.726 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.726 INFO [stderr] | ^ Dec 05 12:17:34.726 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.726 INFO [stderr] | ^^^^ Dec 05 12:17:34.726 INFO [stderr] | Dec 05 12:17:34.726 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.727 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.727 INFO [stderr] | | Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] Dec 05 12:17:34.727 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.727 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.727 INFO [stderr] | ^ Dec 05 12:17:34.727 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.727 INFO [stderr] | ^^^^ Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.727 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.727 INFO [stderr] | | Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] Dec 05 12:17:34.727 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.727 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.727 INFO [stderr] | ^ Dec 05 12:17:34.727 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.727 INFO [stderr] | ^^^^ Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.727 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.727 INFO [stderr] | | Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] Dec 05 12:17:34.727 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.727 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.727 INFO [stderr] | ^ Dec 05 12:17:34.727 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.727 INFO [stderr] | ^^^^ Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.727 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.727 INFO [stderr] | | Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] Dec 05 12:17:34.727 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.727 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.727 INFO [stderr] | ^ Dec 05 12:17:34.727 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.727 INFO [stderr] | ^^^^ Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.727 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.727 INFO [stderr] | | Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] Dec 05 12:17:34.727 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.727 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.727 INFO [stderr] | ^ Dec 05 12:17:34.727 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.727 INFO [stderr] | ^^^^ Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.727 INFO [stderr] | Dec 05 12:17:34.727 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.727 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.727 INFO [stderr] | | Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] | in this macro invocation Dec 05 12:17:34.727 INFO [stderr] Dec 05 12:17:34.727 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.727 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.728 INFO [stderr] | ^ Dec 05 12:17:34.728 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.728 INFO [stderr] | ^^^^ Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.728 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.728 INFO [stderr] | | Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] Dec 05 12:17:34.728 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.728 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.728 INFO [stderr] | ^ Dec 05 12:17:34.728 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.728 INFO [stderr] | ^^^^ Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.728 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.728 INFO [stderr] | | Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] Dec 05 12:17:34.728 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.728 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.728 INFO [stderr] | ^ Dec 05 12:17:34.728 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.728 INFO [stderr] | ^^^^ Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.728 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.728 INFO [stderr] | | Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] Dec 05 12:17:34.728 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.728 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.728 INFO [stderr] | ^ Dec 05 12:17:34.728 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.728 INFO [stderr] | ^^^^ Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.728 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.728 INFO [stderr] | | Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] Dec 05 12:17:34.728 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.728 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.728 INFO [stderr] | ^ Dec 05 12:17:34.728 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.728 INFO [stderr] | ^^^^ Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.728 INFO [stderr] | Dec 05 12:17:34.728 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.728 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.728 INFO [stderr] | | Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] | in this macro invocation Dec 05 12:17:34.728 INFO [stderr] Dec 05 12:17:34.780 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.780 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.780 INFO [stderr] | Dec 05 12:17:34.780 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.780 INFO [stderr] | ^ Dec 05 12:17:34.780 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.780 INFO [stderr] | ^^^^ Dec 05 12:17:34.780 INFO [stderr] | Dec 05 12:17:34.780 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.780 INFO [stderr] | Dec 05 12:17:34.780 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.780 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.780 INFO [stderr] | | Dec 05 12:17:34.780 INFO [stderr] | in this macro invocation Dec 05 12:17:34.780 INFO [stderr] | in this macro invocation Dec 05 12:17:34.780 INFO [stderr] Dec 05 12:17:34.780 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.780 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.780 INFO [stderr] | Dec 05 12:17:34.780 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.780 INFO [stderr] | ^ Dec 05 12:17:34.780 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.780 INFO [stderr] | ^^^^ Dec 05 12:17:34.780 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.781 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.781 INFO [stderr] | | Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] Dec 05 12:17:34.781 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.781 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.781 INFO [stderr] | ^ Dec 05 12:17:34.781 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.781 INFO [stderr] | ^^^^ Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.781 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.781 INFO [stderr] | | Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] Dec 05 12:17:34.781 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.781 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.781 INFO [stderr] | ^ Dec 05 12:17:34.781 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.781 INFO [stderr] | ^^^^ Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.781 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.781 INFO [stderr] | | Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] Dec 05 12:17:34.781 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.781 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.781 INFO [stderr] | ^ Dec 05 12:17:34.781 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.781 INFO [stderr] | ^^^^ Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] ::: src/vector/mod.rs:93:1 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 93 | declare_vector!(char2, char3, char4, char8, char16, i8, signed); Dec 05 12:17:34.781 INFO [stderr] | ---------------------------------------------------------------- Dec 05 12:17:34.781 INFO [stderr] | | Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] Dec 05 12:17:34.781 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.781 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.781 INFO [stderr] | ^ Dec 05 12:17:34.781 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.781 INFO [stderr] | ^^^^ Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.781 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.781 INFO [stderr] | | Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] Dec 05 12:17:34.781 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.781 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.781 INFO [stderr] | ^ Dec 05 12:17:34.781 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.781 INFO [stderr] | ^^^^ Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.781 INFO [stderr] | Dec 05 12:17:34.781 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.781 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.781 INFO [stderr] | | Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] | in this macro invocation Dec 05 12:17:34.781 INFO [stderr] Dec 05 12:17:34.781 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.782 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.782 INFO [stderr] | ^ Dec 05 12:17:34.782 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.782 INFO [stderr] | ^^^^ Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.782 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.782 INFO [stderr] | | Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] Dec 05 12:17:34.782 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.782 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.782 INFO [stderr] | ^ Dec 05 12:17:34.782 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.782 INFO [stderr] | ^^^^ Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.782 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.782 INFO [stderr] | | Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] Dec 05 12:17:34.782 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.782 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.782 INFO [stderr] | ^ Dec 05 12:17:34.782 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.782 INFO [stderr] | ^^^^ Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] ::: src/vector/mod.rs:94:1 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 94 | declare_vector!(short2, short3, short4, short8, short16, i16, signed); Dec 05 12:17:34.782 INFO [stderr] | ---------------------------------------------------------------------- Dec 05 12:17:34.782 INFO [stderr] | | Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] Dec 05 12:17:34.782 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.782 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.782 INFO [stderr] | ^ Dec 05 12:17:34.782 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.782 INFO [stderr] | ^^^^ Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.782 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.782 INFO [stderr] | | Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] Dec 05 12:17:34.782 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.782 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.782 INFO [stderr] | ^ Dec 05 12:17:34.782 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.782 INFO [stderr] | ^^^^ Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.782 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.782 INFO [stderr] | | Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] | in this macro invocation Dec 05 12:17:34.782 INFO [stderr] Dec 05 12:17:34.782 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.782 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.782 INFO [stderr] | Dec 05 12:17:34.782 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.782 INFO [stderr] | ^ Dec 05 12:17:34.782 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.782 INFO [stderr] | ^^^^ Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.783 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.783 INFO [stderr] | | Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] Dec 05 12:17:34.783 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.783 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.783 INFO [stderr] | ^ Dec 05 12:17:34.783 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.783 INFO [stderr] | ^^^^ Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.783 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.783 INFO [stderr] | | Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] Dec 05 12:17:34.783 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.783 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.783 INFO [stderr] | ^ Dec 05 12:17:34.783 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.783 INFO [stderr] | ^^^^ Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] ::: src/vector/mod.rs:95:1 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 95 | declare_vector!(int2, int3, int4, int8, int16, i32, signed); Dec 05 12:17:34.783 INFO [stderr] | ------------------------------------------------------------ Dec 05 12:17:34.783 INFO [stderr] | | Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] Dec 05 12:17:34.783 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.783 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.783 INFO [stderr] | ^ Dec 05 12:17:34.783 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.783 INFO [stderr] | ^^^^ Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.783 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.783 INFO [stderr] | | Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] Dec 05 12:17:34.783 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.783 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.783 INFO [stderr] | ^ Dec 05 12:17:34.783 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.783 INFO [stderr] | ^^^^ Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.783 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.783 INFO [stderr] | | Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] Dec 05 12:17:34.783 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.783 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.783 INFO [stderr] | ^ Dec 05 12:17:34.783 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.783 INFO [stderr] | ^^^^ Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.783 INFO [stderr] | Dec 05 12:17:34.783 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.783 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.783 INFO [stderr] | | Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.783 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] Dec 05 12:17:34.784 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.784 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.784 INFO [stderr] | ^ Dec 05 12:17:34.784 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.784 INFO [stderr] | ^^^^ Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.784 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.784 INFO [stderr] | | Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] Dec 05 12:17:34.784 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.784 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.784 INFO [stderr] | ^ Dec 05 12:17:34.784 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.784 INFO [stderr] | ^^^^ Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] ::: src/vector/mod.rs:96:1 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 96 | declare_vector!(long2, long3, long4, long8, long16, i64, signed); Dec 05 12:17:34.784 INFO [stderr] | ----------------------------------------------------------------- Dec 05 12:17:34.784 INFO [stderr] | | Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] Dec 05 12:17:34.784 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.784 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.784 INFO [stderr] | ^ Dec 05 12:17:34.784 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.784 INFO [stderr] | ^^^^ Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.784 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.784 INFO [stderr] | | Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] Dec 05 12:17:34.784 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.784 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.784 INFO [stderr] | ^ Dec 05 12:17:34.784 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.784 INFO [stderr] | ^^^^ Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.784 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.784 INFO [stderr] | | Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] Dec 05 12:17:34.784 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.784 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.784 INFO [stderr] | ^ Dec 05 12:17:34.784 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.784 INFO [stderr] | ^^^^ Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.784 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.784 INFO [stderr] | | Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] | in this macro invocation Dec 05 12:17:34.784 INFO [stderr] Dec 05 12:17:34.784 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.784 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.784 INFO [stderr] | ^ Dec 05 12:17:34.784 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.784 INFO [stderr] | ^^^^ Dec 05 12:17:34.784 INFO [stderr] | Dec 05 12:17:34.784 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.785 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.785 INFO [stderr] | | Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] Dec 05 12:17:34.785 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.785 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.785 INFO [stderr] | ^ Dec 05 12:17:34.785 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.785 INFO [stderr] | ^^^^ Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] ::: src/vector/mod.rs:98:1 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 98 | declare_vector!(uchar2, uchar3, uchar4, uchar8, uchar16, u8, unsigned); Dec 05 12:17:34.785 INFO [stderr] | ----------------------------------------------------------------------- Dec 05 12:17:34.785 INFO [stderr] | | Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] Dec 05 12:17:34.785 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.785 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.785 INFO [stderr] | ^ Dec 05 12:17:34.785 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.785 INFO [stderr] | ^^^^ Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.785 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.785 INFO [stderr] | | Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] Dec 05 12:17:34.785 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.785 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.785 INFO [stderr] | ^ Dec 05 12:17:34.785 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.785 INFO [stderr] | ^^^^ Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.785 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.785 INFO [stderr] | | Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] Dec 05 12:17:34.785 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.785 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.785 INFO [stderr] | ^ Dec 05 12:17:34.785 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.785 INFO [stderr] | ^^^^ Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.785 INFO [stderr] | Dec 05 12:17:34.785 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.785 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.785 INFO [stderr] | | Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] | in this macro invocation Dec 05 12:17:34.785 INFO [stderr] Dec 05 12:17:34.787 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.787 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.787 INFO [stderr] | ^ Dec 05 12:17:34.787 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.787 INFO [stderr] | ^^^^ Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.787 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.787 INFO [stderr] | | Dec 05 12:17:34.787 INFO [stderr] | in this macro invocation Dec 05 12:17:34.787 INFO [stderr] | in this macro invocation Dec 05 12:17:34.787 INFO [stderr] Dec 05 12:17:34.787 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.787 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.787 INFO [stderr] | ^ Dec 05 12:17:34.787 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.787 INFO [stderr] | ^^^^ Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] ::: src/vector/mod.rs:99:1 Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] 99 | declare_vector!(ushort2, ushort3, ushort4, ushort8, ushort16, u16, unsigned); Dec 05 12:17:34.787 INFO [stderr] | ----------------------------------------------------------------------------- Dec 05 12:17:34.787 INFO [stderr] | | Dec 05 12:17:34.787 INFO [stderr] | in this macro invocation Dec 05 12:17:34.787 INFO [stderr] | in this macro invocation Dec 05 12:17:34.787 INFO [stderr] Dec 05 12:17:34.787 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.787 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.787 INFO [stderr] | ^ Dec 05 12:17:34.787 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.787 INFO [stderr] | ^^^^ Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.787 INFO [stderr] | Dec 05 12:17:34.787 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.787 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.787 INFO [stderr] | | Dec 05 12:17:34.787 INFO [stderr] | in this macro invocation Dec 05 12:17:34.787 INFO [stderr] | in this macro invocation Dec 05 12:17:34.787 INFO [stderr] Dec 05 12:17:34.787 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.788 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.788 INFO [stderr] | ^ Dec 05 12:17:34.788 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.788 INFO [stderr] | ^^^^ Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.788 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.788 INFO [stderr] | | Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] Dec 05 12:17:34.788 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.788 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.788 INFO [stderr] | ^ Dec 05 12:17:34.788 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.788 INFO [stderr] | ^^^^ Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.788 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.788 INFO [stderr] | | Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] Dec 05 12:17:34.788 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.788 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.788 INFO [stderr] | ^ Dec 05 12:17:34.788 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.788 INFO [stderr] | ^^^^ Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.788 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.788 INFO [stderr] | | Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] Dec 05 12:17:34.788 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.788 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.788 INFO [stderr] | ^ Dec 05 12:17:34.788 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.788 INFO [stderr] | ^^^^ Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] ::: src/vector/mod.rs:100:1 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 100 | declare_vector!(uint2, uint3, uint4, uint8, uint16, u32, unsigned); Dec 05 12:17:34.788 INFO [stderr] | ------------------------------------------------------------------- Dec 05 12:17:34.788 INFO [stderr] | | Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] Dec 05 12:17:34.788 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.788 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.788 INFO [stderr] | ^ Dec 05 12:17:34.788 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.788 INFO [stderr] | ^^^^ Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.788 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.788 INFO [stderr] | | Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] | in this macro invocation Dec 05 12:17:34.788 INFO [stderr] Dec 05 12:17:34.788 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.788 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.788 INFO [stderr] | Dec 05 12:17:34.788 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.788 INFO [stderr] | ^ Dec 05 12:17:34.789 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.789 INFO [stderr] | ^^^^ Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.789 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.789 INFO [stderr] | | Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] Dec 05 12:17:34.789 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.789 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.789 INFO [stderr] | ^ Dec 05 12:17:34.789 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.789 INFO [stderr] | ^^^^ Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.789 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.789 INFO [stderr] | | Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] Dec 05 12:17:34.789 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.789 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.789 INFO [stderr] | ^ Dec 05 12:17:34.789 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.789 INFO [stderr] | ^^^^ Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.789 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.789 INFO [stderr] | | Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] Dec 05 12:17:34.789 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.789 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.789 INFO [stderr] | ^ Dec 05 12:17:34.789 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.789 INFO [stderr] | ^^^^ Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] ::: src/vector/mod.rs:101:1 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 101 | declare_vector!(ulong2, ulong3, ulong4, ulong8, ulong16, u64, unsigned); Dec 05 12:17:34.789 INFO [stderr] | ------------------------------------------------------------------------ Dec 05 12:17:34.789 INFO [stderr] | | Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] Dec 05 12:17:34.789 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.789 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.789 INFO [stderr] | ^ Dec 05 12:17:34.789 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.789 INFO [stderr] | ^^^^ Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.789 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.789 INFO [stderr] | | Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] | in this macro invocation Dec 05 12:17:34.789 INFO [stderr] Dec 05 12:17:34.789 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.789 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.789 INFO [stderr] | ^ Dec 05 12:17:34.789 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.789 INFO [stderr] | ^^^^ Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.789 INFO [stderr] | Dec 05 12:17:34.789 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.790 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.790 INFO [stderr] | | Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] Dec 05 12:17:34.790 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.790 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.790 INFO [stderr] | ^ Dec 05 12:17:34.790 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.790 INFO [stderr] | ^^^^ Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.790 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.790 INFO [stderr] | | Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] Dec 05 12:17:34.790 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.790 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.790 INFO [stderr] | ^ Dec 05 12:17:34.790 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.790 INFO [stderr] | ^^^^ Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.790 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.790 INFO [stderr] | | Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] Dec 05 12:17:34.790 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.790 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.790 INFO [stderr] | ^ Dec 05 12:17:34.790 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.790 INFO [stderr] | ^^^^ Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] ::: src/vector/mod.rs:104:1 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 104 | declare_vector!(float2, float3, float4, float8, float16, f32, float); Dec 05 12:17:34.790 INFO [stderr] | --------------------------------------------------------------------- Dec 05 12:17:34.790 INFO [stderr] | | Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] Dec 05 12:17:34.790 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.790 INFO [stderr] --> src/macros.rs:3:12 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 3 | #[repr(C)] Dec 05 12:17:34.790 INFO [stderr] | ^ Dec 05 12:17:34.790 INFO [stderr] 4 | #[repr(simd)] Dec 05 12:17:34.790 INFO [stderr] | ^^^^ Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.790 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.790 INFO [stderr] | | Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] | in this macro invocation Dec 05 12:17:34.790 INFO [stderr] Dec 05 12:17:34.790 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.790 INFO [stderr] --> src/macros.rs:24:12 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 24 | #[repr(C)] Dec 05 12:17:34.790 INFO [stderr] | ^ Dec 05 12:17:34.790 INFO [stderr] 25 | #[repr(simd)] Dec 05 12:17:34.790 INFO [stderr] | ^^^^ Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.790 INFO [stderr] | Dec 05 12:17:34.790 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.790 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.790 INFO [stderr] | | Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] Dec 05 12:17:34.791 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.791 INFO [stderr] --> src/macros.rs:45:12 Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] 45 | #[repr(C)] Dec 05 12:17:34.791 INFO [stderr] | ^ Dec 05 12:17:34.791 INFO [stderr] 46 | #[repr(simd)] Dec 05 12:17:34.791 INFO [stderr] | ^^^^ Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.791 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.791 INFO [stderr] | | Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] Dec 05 12:17:34.791 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.791 INFO [stderr] --> src/macros.rs:66:12 Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] 66 | #[repr(C)] Dec 05 12:17:34.791 INFO [stderr] | ^ Dec 05 12:17:34.791 INFO [stderr] 67 | #[repr(simd)] Dec 05 12:17:34.791 INFO [stderr] | ^^^^ Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.791 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.791 INFO [stderr] | | Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] Dec 05 12:17:34.791 INFO [stderr] warning[E0566]: conflicting representation hints Dec 05 12:17:34.791 INFO [stderr] --> src/macros.rs:87:12 Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] 87 | #[repr(C)] Dec 05 12:17:34.791 INFO [stderr] | ^ Dec 05 12:17:34.791 INFO [stderr] 88 | #[repr(simd)] Dec 05 12:17:34.791 INFO [stderr] | ^^^^ Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] ::: src/vector/mod.rs:105:1 Dec 05 12:17:34.791 INFO [stderr] | Dec 05 12:17:34.791 INFO [stderr] 105 | declare_vector!(double2, double3, double4, double8, double16, f64, float); Dec 05 12:17:34.791 INFO [stderr] | -------------------------------------------------------------------------- Dec 05 12:17:34.791 INFO [stderr] | | Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] | in this macro invocation Dec 05 12:17:34.791 INFO [stderr] Dec 05 12:17:38.227 INFO [stderr] warning: the feature `associated_consts` has been stable since 1.20.0 and no longer requires an attribute to enable Dec 05 12:17:38.227 INFO [stderr] --> src/lib.rs:1:12 Dec 05 12:17:38.227 INFO [stderr] | Dec 05 12:17:38.227 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 05 12:17:38.227 INFO [stderr] | ^^^^^^^^^^^^^^^^^ Dec 05 12:17:38.227 INFO [stderr] | Dec 05 12:17:38.227 INFO [stderr] = note: #[warn(stable_features)] on by default Dec 05 12:17:38.227 INFO [stderr] Dec 05 12:17:38.227 INFO [stderr] warning: the feature `cfg_target_feature` has been stable since 1.27.0 and no longer requires an attribute to enable Dec 05 12:17:38.227 INFO [stderr] --> src/lib.rs:1:31 Dec 05 12:17:38.227 INFO [stderr] | Dec 05 12:17:38.227 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 05 12:17:38.228 INFO [stderr] | ^^^^^^^^^^^^^^^^^^ Dec 05 12:17:38.228 INFO [stderr] Dec 05 12:17:39.943 INFO [stderr] warning: the feature `associated_consts` has been stable since 1.20.0 and no longer requires an attribute to enable Dec 05 12:17:39.943 INFO [stderr] --> src/lib.rs:1:12 Dec 05 12:17:39.943 INFO [stderr] | Dec 05 12:17:39.943 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 05 12:17:39.943 INFO [stderr] | ^^^^^^^^^^^^^^^^^ Dec 05 12:17:39.951 INFO [stderr] | Dec 05 12:17:39.951 INFO [stderr] = note: #[warn(stable_features)] on by default Dec 05 12:17:39.951 INFO [stderr] Dec 05 12:17:39.951 INFO [stderr] warning: the feature `cfg_target_feature` has been stable since 1.27.0 and no longer requires an attribute to enable Dec 05 12:17:39.951 INFO [stderr] --> src/lib.rs:1:31 Dec 05 12:17:39.951 INFO [stderr] | Dec 05 12:17:39.951 INFO [stderr] 1 | #![feature(associated_consts, cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi)] Dec 05 12:17:39.951 INFO [stderr] | ^^^^^^^^^^^^^^^^^^ Dec 05 12:17:39.951 INFO [stderr] Dec 05 12:17:41.730 INFO [stderr] warning: the feature `cfg_target_feature` has been stable since 1.27.0 and no longer requires an attribute to enable Dec 05 12:17:41.730 INFO [stderr] --> benches/recip.rs:1:12 Dec 05 12:17:41.730 INFO [stderr] | Dec 05 12:17:41.730 INFO [stderr] 1 | #![feature(cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, simd_ffi, test)] Dec 05 12:17:41.730 INFO [stderr] | ^^^^^^^^^^^^^^^^^^ Dec 05 12:17:41.767 INFO [stderr] | Dec 05 12:17:41.767 INFO [stderr] = note: #[warn(stable_features)] on by default Dec 05 12:17:41.767 INFO [stderr] Dec 05 12:17:42.867 INFO [stderr] warning: the feature `cfg_target_feature` has been stable since 1.27.0 and no longer requires an attribute to enable Dec 05 12:17:42.867 INFO [stderr] --> benches/rsqrt.rs:1:12 Dec 05 12:17:42.867 INFO [stderr] | Dec 05 12:17:42.867 INFO [stderr] 1 | #![feature(cfg_target_feature, link_llvm_intrinsics, platform_intrinsics, simd_ffi, test)] Dec 05 12:17:42.867 INFO [stderr] | ^^^^^^^^^^^^^^^^^^ Dec 05 12:17:42.895 INFO [stderr] | Dec 05 12:17:42.895 INFO [stderr] = note: #[warn(stable_features)] on by default Dec 05 12:17:42.895 INFO [stderr] Dec 05 12:17:45.329 INFO [stderr] Finished dev [unoptimized + debuginfo] target(s) in 12.02s Dec 05 12:17:45.339 INFO [stderr] su: No module specific data is present Dec 05 12:17:45.669 INFO running `"docker" "inspect" "c284cf7f95d87a149ee32ddbd4325de2e5573558784a280b0588c8402a0508ef"` Dec 05 12:17:45.857 INFO running `"docker" "rm" "-f" "c284cf7f95d87a149ee32ddbd4325de2e5573558784a280b0588c8402a0508ef"` Dec 05 12:17:46.123 INFO [stdout] c284cf7f95d87a149ee32ddbd4325de2e5573558784a280b0588c8402a0508ef