Nov 28 08:38:55.554 INFO documenting stm32f446-hal-0.0.1 against try#f5a0bd723553ea4b7556bd7087b9f0919cafb483 for pr-55318 Nov 28 08:38:55.554 INFO running `"docker" "create" "-v" "/mnt/big/crater/work/local/target-dirs/pr-55318/worker-3/try#f5a0bd723553ea4b7556bd7087b9f0919cafb483:/target:rw,Z" "-v" "/mnt/big/crater/work/local/test-source/worker-3/pr-55318/try#f5a0bd723553ea4b7556bd7087b9f0919cafb483:/source:ro,Z" "-v" "/mnt/big/crater/work/local/cargo-home:/cargo-home:ro,Z" "-v" "/mnt/big/crater/work/local/rustup-home:/rustup-home:ro,Z" "-e" "USER_ID=1000" "-e" "SOURCE_DIR=/source" "-e" "USER_ID=1000" "-e" "CMD=cargo +f5a0bd723553ea4b7556bd7087b9f0919cafb483-alt doc --frozen --no-deps --document-private-items" "-e" "CARGO_TARGET_DIR=/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/cargo-home" "-e" "RUSTUP_HOME=/rustup-home" "-m" "1536M" "--network" "none" "crater"` Nov 28 08:38:55.803 INFO [stdout] 11ab3d5ba0908380ba273edbf26c22b7b46e5b8892523ebcbc0d9e79e9b7fc20 Nov 28 08:38:55.805 INFO running `"docker" "start" "-a" "11ab3d5ba0908380ba273edbf26c22b7b46e5b8892523ebcbc0d9e79e9b7fc20"` Nov 28 08:38:56.235 INFO [stderr] usermod: no changes Nov 28 08:38:56.355 INFO [stderr] Compiling stm32f4 v0.2.3 Nov 28 08:39:36.499 INFO [stderr] Documenting stm32f446-hal v0.0.1 (/source) Nov 28 08:40:07.265 INFO [stderr] warning: `[9:5]` cannot be resolved, ignoring it... Nov 28 08:40:07.265 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338:23 Nov 28 08:40:07.266 INFO [stderr] | Nov 28 08:40:07.266 INFO [stderr] 338 | #[doc = "23 - EXTI Line[9:5] interrupts"] Nov 28 08:40:07.266 INFO [stderr] | ^^^ cannot be resolved, ignoring Nov 28 08:40:07.267 INFO [stderr] | Nov 28 08:40:07.267 INFO [stderr] = note: #[warn(intra_doc_link_resolution_failure)] on by default Nov 28 08:40:07.267 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.267 INFO [stderr] Nov 28 08:40:07.267 INFO [stderr] warning: `[15:10]` cannot be resolved, ignoring it... Nov 28 08:40:07.267 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:372:23 Nov 28 08:40:07.267 INFO [stderr] | Nov 28 08:40:07.268 INFO [stderr] 372 | #[doc = "40 - EXTI Line[15:10] interrupts"] Nov 28 08:40:07.268 INFO [stderr] | ^^^^^ cannot be resolved, ignoring Nov 28 08:40:07.268 INFO [stderr] | Nov 28 08:40:07.268 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.268 INFO [stderr] Nov 28 08:40:07.423 INFO [stderr] warning: `[20:12]` cannot be resolved, ignoring it... Nov 28 08:40:07.423 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:331955:267 Nov 28 08:40:07.423 INFO [stderr] | Nov 28 08:40:07.423 INFO [stderr] 331955 | #[doc = "0x34 - The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)"] Nov 28 08:40:07.423 INFO [stderr] | ^^^^^ cannot be resolved, ignoring Nov 28 08:40:07.423 INFO [stderr] | Nov 28 08:40:07.423 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.423 INFO [stderr] Nov 28 08:40:07.423 INFO [stderr] warning: `[20:12]` cannot be resolved, ignoring it... Nov 28 08:40:07.423 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:334646:256 Nov 28 08:40:07.423 INFO [stderr] | Nov 28 08:40:07.423 INFO [stderr] 334646 | #[doc = "The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)"] Nov 28 08:40:07.423 INFO [stderr] | ^^^^^ cannot be resolved, ignoring Nov 28 08:40:07.423 INFO [stderr] | Nov 28 08:40:07.423 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.423 INFO [stderr] Nov 28 08:40:07.425 INFO [stderr] warning: `[31:2]` cannot be resolved, ignoring it... Nov 28 08:40:07.425 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338805:63 Nov 28 08:40:07.425 INFO [stderr] | Nov 28 08:40:07.425 INFO [stderr] 338805 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Nov 28 08:40:07.425 INFO [stderr] | ^^^^ cannot be resolved, ignoring Nov 28 08:40:07.425 INFO [stderr] | Nov 28 08:40:07.425 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.425 INFO [stderr] Nov 28 08:40:07.426 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Nov 28 08:40:07.426 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338805:98 Nov 28 08:40:07.427 INFO [stderr] | Nov 28 08:40:07.427 INFO [stderr] 338805 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Nov 28 08:40:07.427 INFO [stderr] | ^^^ cannot be resolved, ignoring Nov 28 08:40:07.427 INFO [stderr] | Nov 28 08:40:07.427 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.427 INFO [stderr] Nov 28 08:40:07.427 INFO [stderr] warning: `[31:2]` cannot be resolved, ignoring it... Nov 28 08:40:07.434 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338828:63 Nov 28 08:40:07.437 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] 338828 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Nov 28 08:40:07.438 INFO [stderr] | ^^^^ cannot be resolved, ignoring Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.438 INFO [stderr] Nov 28 08:40:07.438 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Nov 28 08:40:07.438 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338828:98 Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] 338828 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Nov 28 08:40:07.438 INFO [stderr] | ^^^ cannot be resolved, ignoring Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.438 INFO [stderr] Nov 28 08:40:07.438 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Nov 28 08:40:07.438 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338917:86 Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] 338917 | #[doc = "Bits 0:31 - Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0)."] Nov 28 08:40:07.438 INFO [stderr] | ^^^ cannot be resolved, ignoring Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.438 INFO [stderr] Nov 28 08:40:07.438 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Nov 28 08:40:07.438 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338940:86 Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] 338940 | #[doc = "Bits 0:31 - Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0)."] Nov 28 08:40:07.438 INFO [stderr] | ^^^ cannot be resolved, ignoring Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.438 INFO [stderr] Nov 28 08:40:07.438 INFO [stderr] warning: `[9:5]` cannot be resolved, ignoring it... Nov 28 08:40:07.438 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338:23 Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] 338 | #[doc = "23 - EXTI Line[9:5] interrupts"] Nov 28 08:40:07.438 INFO [stderr] | ^^^ cannot be resolved, ignoring Nov 28 08:40:07.438 INFO [stderr] | Nov 28 08:40:07.438 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Nov 28 08:40:07.438 INFO [stderr] Nov 28 08:40:25.484 INFO [stderr] Finished dev [unoptimized + debuginfo] target(s) in 1m 29s Nov 28 08:40:25.489 INFO [stderr] su: No module specific data is present Nov 28 08:40:25.829 INFO running `"docker" "inspect" "11ab3d5ba0908380ba273edbf26c22b7b46e5b8892523ebcbc0d9e79e9b7fc20"` Nov 28 08:40:25.977 INFO running `"docker" "rm" "-f" "11ab3d5ba0908380ba273edbf26c22b7b46e5b8892523ebcbc0d9e79e9b7fc20"` Nov 28 08:40:26.088 INFO [stdout] 11ab3d5ba0908380ba273edbf26c22b7b46e5b8892523ebcbc0d9e79e9b7fc20