Dec 02 02:18:52.256 INFO documenting stm32f446-hal-0.0.1 against try#f86f76f89ea2b1ccbfb3741962ec2029d878a389 for pr-55318-1 Dec 02 02:18:52.256 INFO running `"docker" "create" "-v" "/mnt/big/crater/work/local/target-dirs/pr-55318-1/worker-2/try#f86f76f89ea2b1ccbfb3741962ec2029d878a389:/target:rw,Z" "-v" "/mnt/big/crater/work/local/test-source/worker-2/pr-55318-1/try#f86f76f89ea2b1ccbfb3741962ec2029d878a389:/source:ro,Z" "-v" "/mnt/big/crater/work/local/cargo-home:/cargo-home:ro,Z" "-v" "/mnt/big/crater/work/local/rustup-home:/rustup-home:ro,Z" "-e" "USER_ID=1000" "-e" "SOURCE_DIR=/source" "-e" "USER_ID=1000" "-e" "CMD=cargo +f86f76f89ea2b1ccbfb3741962ec2029d878a389-alt doc --frozen --no-deps --document-private-items" "-e" "CARGO_TARGET_DIR=/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/cargo-home" "-e" "RUSTUP_HOME=/rustup-home" "-m" "1536M" "--network" "none" "crater"` Dec 02 02:18:52.738 INFO [stdout] 391d7844f9bbbdfa8907b6aedbf32d419b0e943d1961cb97526a4f8b41e745b7 Dec 02 02:18:52.740 INFO running `"docker" "start" "-a" "391d7844f9bbbdfa8907b6aedbf32d419b0e943d1961cb97526a4f8b41e745b7"` Dec 02 02:18:53.962 INFO [stderr] usermod: no changes Dec 02 02:18:54.072 INFO [stderr] Compiling stm32f4 v0.2.3 Dec 02 02:18:54.072 INFO [stderr] Checking cast v0.2.2 Dec 02 02:19:32.613 INFO [stderr] Documenting stm32f446-hal v0.0.1 (/source) Dec 02 02:20:00.274 INFO [stderr] warning: `[9:5]` cannot be resolved, ignoring it... Dec 02 02:20:00.274 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338:23 Dec 02 02:20:00.274 INFO [stderr] | Dec 02 02:20:00.274 INFO [stderr] 338 | #[doc = "23 - EXTI Line[9:5] interrupts"] Dec 02 02:20:00.274 INFO [stderr] | ^^^ cannot be resolved, ignoring Dec 02 02:20:00.274 INFO [stderr] | Dec 02 02:20:00.274 INFO [stderr] = note: #[warn(intra_doc_link_resolution_failure)] on by default Dec 02 02:20:00.274 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.274 INFO [stderr] Dec 02 02:20:00.274 INFO [stderr] warning: `[15:10]` cannot be resolved, ignoring it... Dec 02 02:20:00.274 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:372:23 Dec 02 02:20:00.274 INFO [stderr] | Dec 02 02:20:00.274 INFO [stderr] 372 | #[doc = "40 - EXTI Line[15:10] interrupts"] Dec 02 02:20:00.274 INFO [stderr] | ^^^^^ cannot be resolved, ignoring Dec 02 02:20:00.274 INFO [stderr] | Dec 02 02:20:00.274 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.274 INFO [stderr] Dec 02 02:20:00.422 INFO [stderr] warning: `[20:12]` cannot be resolved, ignoring it... Dec 02 02:20:00.423 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:331955:267 Dec 02 02:20:00.423 INFO [stderr] | Dec 02 02:20:00.423 INFO [stderr] 331955 | #[doc = "0x34 - The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)"] Dec 02 02:20:00.424 INFO [stderr] | ^^^^^ cannot be resolved, ignoring Dec 02 02:20:00.424 INFO [stderr] | Dec 02 02:20:00.424 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.424 INFO [stderr] Dec 02 02:20:00.425 INFO [stderr] warning: `[20:12]` cannot be resolved, ignoring it... Dec 02 02:20:00.425 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:334646:256 Dec 02 02:20:00.425 INFO [stderr] | Dec 02 02:20:00.425 INFO [stderr] 334646 | #[doc = "The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)"] Dec 02 02:20:00.426 INFO [stderr] | ^^^^^ cannot be resolved, ignoring Dec 02 02:20:00.426 INFO [stderr] | Dec 02 02:20:00.426 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.426 INFO [stderr] Dec 02 02:20:00.427 INFO [stderr] warning: `[31:2]` cannot be resolved, ignoring it... Dec 02 02:20:00.427 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338805:63 Dec 02 02:20:00.427 INFO [stderr] | Dec 02 02:20:00.428 INFO [stderr] 338805 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Dec 02 02:20:00.428 INFO [stderr] | ^^^^ cannot be resolved, ignoring Dec 02 02:20:00.428 INFO [stderr] | Dec 02 02:20:00.428 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.429 INFO [stderr] Dec 02 02:20:00.429 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Dec 02 02:20:00.429 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338805:98 Dec 02 02:20:00.429 INFO [stderr] | Dec 02 02:20:00.430 INFO [stderr] 338805 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Dec 02 02:20:00.430 INFO [stderr] | ^^^ cannot be resolved, ignoring Dec 02 02:20:00.430 INFO [stderr] | Dec 02 02:20:00.431 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.431 INFO [stderr] Dec 02 02:20:00.431 INFO [stderr] warning: `[31:2]` cannot be resolved, ignoring it... Dec 02 02:20:00.431 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338828:63 Dec 02 02:20:00.432 INFO [stderr] | Dec 02 02:20:00.432 INFO [stderr] 338828 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Dec 02 02:20:00.432 INFO [stderr] | ^^^^ cannot be resolved, ignoring Dec 02 02:20:00.433 INFO [stderr] | Dec 02 02:20:00.433 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.433 INFO [stderr] Dec 02 02:20:00.433 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Dec 02 02:20:00.433 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338828:98 Dec 02 02:20:00.434 INFO [stderr] | Dec 02 02:20:00.434 INFO [stderr] 338828 | #[doc = "Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] Dec 02 02:20:00.434 INFO [stderr] | ^^^ cannot be resolved, ignoring Dec 02 02:20:00.435 INFO [stderr] | Dec 02 02:20:00.435 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.435 INFO [stderr] Dec 02 02:20:00.435 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Dec 02 02:20:00.436 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338917:86 Dec 02 02:20:00.436 INFO [stderr] | Dec 02 02:20:00.436 INFO [stderr] 338917 | #[doc = "Bits 0:31 - Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0)."] Dec 02 02:20:00.437 INFO [stderr] | ^^^ cannot be resolved, ignoring Dec 02 02:20:00.437 INFO [stderr] | Dec 02 02:20:00.437 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.437 INFO [stderr] Dec 02 02:20:00.437 INFO [stderr] warning: `[1:0]` cannot be resolved, ignoring it... Dec 02 02:20:00.438 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338940:86 Dec 02 02:20:00.438 INFO [stderr] | Dec 02 02:20:00.438 INFO [stderr] 338940 | #[doc = "Bits 0:31 - Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0)."] Dec 02 02:20:00.438 INFO [stderr] | ^^^ cannot be resolved, ignoring Dec 02 02:20:00.438 INFO [stderr] | Dec 02 02:20:00.438 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.438 INFO [stderr] Dec 02 02:20:00.438 INFO [stderr] warning: `[9:5]` cannot be resolved, ignoring it... Dec 02 02:20:00.438 INFO [stderr] --> /cargo-home/registry/src/github.com-1ecc6299db9ec823/stm32f4-0.2.3/src/stm32f446/mod.rs:338:23 Dec 02 02:20:00.438 INFO [stderr] | Dec 02 02:20:00.438 INFO [stderr] 338 | #[doc = "23 - EXTI Line[9:5] interrupts"] Dec 02 02:20:00.438 INFO [stderr] | ^^^ cannot be resolved, ignoring Dec 02 02:20:00.438 INFO [stderr] | Dec 02 02:20:00.438 INFO [stderr] = help: to escape `[` and `]` characters, just add '\' before them like `\[` or `\]` Dec 02 02:20:00.438 INFO [stderr] Dec 02 02:20:18.384 INFO [stderr] Finished dev [unoptimized + debuginfo] target(s) in 1m 24s Dec 02 02:20:18.392 INFO [stderr] su: No module specific data is present Dec 02 02:20:18.679 INFO running `"docker" "inspect" "391d7844f9bbbdfa8907b6aedbf32d419b0e943d1961cb97526a4f8b41e745b7"` Dec 02 02:20:18.803 INFO running `"docker" "rm" "-f" "391d7844f9bbbdfa8907b6aedbf32d419b0e943d1961cb97526a4f8b41e745b7"` Dec 02 02:20:18.958 INFO [stdout] 391d7844f9bbbdfa8907b6aedbf32d419b0e943d1961cb97526a4f8b41e745b7