[INFO] cloning repository https://github.com/Eliasin/jagce-rust
[INFO] running `Command { std: "git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/Eliasin/jagce-rust" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FEliasin%2Fjagce-rust", kill_on_drop: false }`
[INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FEliasin%2Fjagce-rust'...
[INFO] running `Command { std: "git" "rev-parse" "HEAD", kill_on_drop: false }`
[INFO] [stdout] e0f0969ff77a1dc079071d200850c99f50481416
[INFO] checking Eliasin/jagce-rust against try#6284d7b4bd27983dba388146648ab844ca7d032f for pr-152971
[INFO] running `Command { std: "git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FEliasin%2Fjagce-rust" "/workspace/builds/worker-7-tc2/source", kill_on_drop: false }`
[INFO] [stderr] Cloning into '/workspace/builds/worker-7-tc2/source'...
[INFO] [stderr] done.
[INFO] started tweaking git repo https://github.com/Eliasin/jagce-rust
[INFO] finished tweaking git repo https://github.com/Eliasin/jagce-rust
[INFO] tweaked toml for git repo https://github.com/Eliasin/jagce-rust written to /workspace/builds/worker-7-tc2/source/Cargo.toml
[INFO] validating manifest of git repo https://github.com/Eliasin/jagce-rust on toolchain 6284d7b4bd27983dba388146648ab844ca7d032f
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+6284d7b4bd27983dba388146648ab844ca7d032f" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] crate git repo https://github.com/Eliasin/jagce-rust already has a lockfile, it will not be regenerated
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+6284d7b4bd27983dba388146648ab844ca7d032f" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]     Blocking waiting for file lock on package cache
[INFO] [stderr]     Blocking waiting for file lock on package cache
[INFO] [stderr]  Downloading crates ...
[INFO] [stderr]   Downloaded either v1.6.0
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:61361fe0aef631f17e9d025a70c5a647956f8c671dd02950a60ad3f5cc5526d7" "/opt/rustwide/cargo-home/bin/cargo" "+6284d7b4bd27983dba388146648ab844ca7d032f" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] 7b868eedf2b4d85e53defe3e5563b700f795103eaae8a4d821551c422f77db95
[INFO] running `Command { std: "docker" "start" "-a" "7b868eedf2b4d85e53defe3e5563b700f795103eaae8a4d821551c422f77db95", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "7b868eedf2b4d85e53defe3e5563b700f795103eaae8a4d821551c422f77db95", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "7b868eedf2b4d85e53defe3e5563b700f795103eaae8a4d821551c422f77db95", kill_on_drop: false }`
[INFO] [stdout] 7b868eedf2b4d85e53defe3e5563b700f795103eaae8a4d821551c422f77db95
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:61361fe0aef631f17e9d025a70c5a647956f8c671dd02950a60ad3f5cc5526d7" "/opt/rustwide/cargo-home/bin/cargo" "+6284d7b4bd27983dba388146648ab844ca7d032f" "check" "--frozen" "--all" "--all-targets" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] 308c02323962ab8175dac6eb579e2ad2ff70e4ecc2f137a0fa321b18a7ae31d8
[INFO] running `Command { std: "docker" "start" "-a" "308c02323962ab8175dac6eb579e2ad2ff70e4ecc2f137a0fa321b18a7ae31d8", kill_on_drop: false }`
[INFO] [stderr]     Checking either v1.6.0
[INFO] [stderr]     Checking itertools v0.9.0
[INFO] [stderr]     Checking jagce-rust v0.1.0 (/opt/rustwide/workdir)
[INFO] [stdout] warning: unused imports: `Register16Name` and `RegisterName`
[INFO] [stdout]  --> src/logic/decoder.rs:2:29
[INFO] [stdout]   |
[INFO] [stdout] 2 | use crate::mem::register::{ RegisterName, Register8Name, Register16Name, Indirect };
[INFO] [stdout]   |                             ^^^^^^^^^^^^                 ^^^^^^^^^^^^^^
[INFO] [stdout]   |
[INFO] [stdout]   = note: `#[warn(unused_imports)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused imports: `Register16Name` and `RegisterName`
[INFO] [stdout]  --> src/logic/decoder.rs:2:29
[INFO] [stdout]   |
[INFO] [stdout] 2 | use crate::mem::register::{ RegisterName, Register8Name, Register16Name, Indirect };
[INFO] [stdout]   |                             ^^^^^^^^^^^^                 ^^^^^^^^^^^^^^
[INFO] [stdout]   |
[INFO] [stdout]   = note: `#[warn(unused_imports)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `prefix`
[INFO] [stdout]   --> src/logic/decoder.rs:14:35
[INFO] [stdout]    |
[INFO] [stdout] 14 | fn decode_prefixed_instruction<I>(prefix: u8, input: &mut Peekable<I>) -> Option<Instruction>
[INFO] [stdout]    |                                   ^^^^^^ help: if this is intentional, prefix it with an underscore: `_prefix`
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(unused_variables)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `input`
[INFO] [stdout]   --> src/logic/decoder.rs:14:47
[INFO] [stdout]    |
[INFO] [stdout] 14 | fn decode_prefixed_instruction<I>(prefix: u8, input: &mut Peekable<I>) -> Option<Instruction>
[INFO] [stdout]    |                                               ^^^^^ help: if this is intentional, prefix it with an underscore: `_input`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `prefix`
[INFO] [stdout]   --> src/logic/decoder.rs:14:35
[INFO] [stdout]    |
[INFO] [stdout] 14 | fn decode_prefixed_instruction<I>(prefix: u8, input: &mut Peekable<I>) -> Option<Instruction>
[INFO] [stdout]    |                                   ^^^^^^ help: if this is intentional, prefix it with an underscore: `_prefix`
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(unused_variables)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `input`
[INFO] [stdout]   --> src/logic/decoder.rs:14:47
[INFO] [stdout]    |
[INFO] [stdout] 14 | fn decode_prefixed_instruction<I>(prefix: u8, input: &mut Peekable<I>) -> Option<Instruction>
[INFO] [stdout]    |                                               ^^^^^ help: if this is intentional, prefix it with an underscore: `_input`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `UNCH`, `SET`, `RESET`, and `DEFER` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:11:5
[INFO] [stdout]    |
[INFO] [stdout] 10 | pub enum FlagChange {
[INFO] [stdout]    |          ---------- variants in this enum
[INFO] [stdout] 11 |     UNCH,
[INFO] [stdout]    |     ^^^^
[INFO] [stdout] 12 |     SET,
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 13 |     RESET,
[INFO] [stdout]    |     ^^^^^
[INFO] [stdout] 14 |     DEFER,
[INFO] [stdout]    |     ^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `FlagChange` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout]    = note: `#[warn(dead_code)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Immediate8` and `Register8Name` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:21:5
[INFO] [stdout]    |
[INFO] [stdout] 20 | pub enum PartialAddressChunk {
[INFO] [stdout]    |          ------------------- variants in this enum
[INFO] [stdout] 21 |     Immediate8(Immediate8),
[INFO] [stdout]    |     ^^^^^^^^^^
[INFO] [stdout] 22 |     Register8Name(Register8Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `PartialAddressChunk` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Address` and `PartialAddress` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:58:5
[INFO] [stdout]    |
[INFO] [stdout] 56 | pub enum Writable8 {
[INFO] [stdout]    |          --------- variants in this enum
[INFO] [stdout] 57 |     Register8Name(Register8Name),
[INFO] [stdout] 58 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 59 |     Indirect(Indirect),
[INFO] [stdout] 60 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Writable8` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Register16Name`, `Address`, `Indirect`, and `PartialAddress` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:65:5
[INFO] [stdout]    |
[INFO] [stdout] 64 | pub enum Writable16 {
[INFO] [stdout]    |          ---------- variants in this enum
[INFO] [stdout] 65 |     Register16Name(Register16Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 66 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 67 |     Indirect(Indirect),
[INFO] [stdout]    |     ^^^^^^^^
[INFO] [stdout] 68 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Writable16` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Register8PlusFlag`, `Address`, `PartialAddress`, `Immediate8PlusFlag`, and `IndirectPlusFlag` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:74:5
[INFO] [stdout]    |
[INFO] [stdout] 72 | pub enum Readable8 {
[INFO] [stdout]    |          --------- variants in this enum
[INFO] [stdout] 73 |     Register8Name(Register8Name),
[INFO] [stdout] 74 |     Register8PlusFlag(Register8PlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^^
[INFO] [stdout] 75 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 76 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 77 |     Immediate8(Immediate8),
[INFO] [stdout] 78 |     Immediate8PlusFlag(Immediate8PlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 79 |     Indirect(Indirect),
[INFO] [stdout] 80 |     IndirectPlusFlag(IndirectPlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Readable8` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `UNCH`, `SET`, `RESET`, and `DEFER` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:11:5
[INFO] [stdout]    |
[INFO] [stdout] 10 | pub enum FlagChange {
[INFO] [stdout]    |          ---------- variants in this enum
[INFO] [stdout] 11 |     UNCH,
[INFO] [stdout]    |     ^^^^
[INFO] [stdout] 12 |     SET,
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 13 |     RESET,
[INFO] [stdout]    |     ^^^^^
[INFO] [stdout] 14 |     DEFER,
[INFO] [stdout]    |     ^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `FlagChange` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout]    = note: `#[warn(dead_code)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Immediate8` and `Register8Name` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:21:5
[INFO] [stdout]    |
[INFO] [stdout] 20 | pub enum PartialAddressChunk {
[INFO] [stdout]    |          ------------------- variants in this enum
[INFO] [stdout] 21 |     Immediate8(Immediate8),
[INFO] [stdout]    |     ^^^^^^^^^^
[INFO] [stdout] 22 |     Register8Name(Register8Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `PartialAddressChunk` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Address` and `PartialAddress` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:58:5
[INFO] [stdout]    |
[INFO] [stdout] 56 | pub enum Writable8 {
[INFO] [stdout]    |          --------- variants in this enum
[INFO] [stdout] 57 |     Register8Name(Register8Name),
[INFO] [stdout] 58 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 59 |     Indirect(Indirect),
[INFO] [stdout] 60 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Writable8` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Register16Name`, `Address`, `Indirect`, and `PartialAddress` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:65:5
[INFO] [stdout]    |
[INFO] [stdout] 64 | pub enum Writable16 {
[INFO] [stdout]    |          ---------- variants in this enum
[INFO] [stdout] 65 |     Register16Name(Register16Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 66 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 67 |     Indirect(Indirect),
[INFO] [stdout]    |     ^^^^^^^^
[INFO] [stdout] 68 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Writable16` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Register8PlusFlag`, `Address`, `PartialAddress`, `Immediate8PlusFlag`, and `IndirectPlusFlag` are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:74:5
[INFO] [stdout]    |
[INFO] [stdout] 72 | pub enum Readable8 {
[INFO] [stdout]    |          --------- variants in this enum
[INFO] [stdout] 73 |     Register8Name(Register8Name),
[INFO] [stdout] 74 |     Register8PlusFlag(Register8PlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^^
[INFO] [stdout] 75 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 76 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 77 |     Immediate8(Immediate8),
[INFO] [stdout] 78 |     Immediate8PlusFlag(Immediate8PlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 79 |     Indirect(Indirect),
[INFO] [stdout] 80 |     IndirectPlusFlag(IndirectPlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Readable8` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: multiple variants are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:85:5
[INFO] [stdout]    |
[INFO] [stdout] 84 | pub enum Readable16 {
[INFO] [stdout]    |          ---------- variants in this enum
[INFO] [stdout] 85 |     Register16Name(Register16Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 86 |     Register16PlusImmediate(Register16PlusImmediate),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 87 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 88 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 89 |     Immediate16(Immediate16),
[INFO] [stdout]    |     ^^^^^^^^^^^
[INFO] [stdout] 90 |     Indirect(Indirect),
[INFO] [stdout]    |     ^^^^^^^^
[INFO] [stdout] 91 |     IndirectPlusFlag(IndirectPlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Readable16` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: enum `Readable` is never used
[INFO] [stdout]   --> src/logic/instruction.rs:95:10
[INFO] [stdout]    |
[INFO] [stdout] 95 | pub enum Readable {
[INFO] [stdout]    |          ^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: enum `Writable` is never used
[INFO] [stdout]    --> src/logic/instruction.rs:101:10
[INFO] [stdout]     |
[INFO] [stdout] 101 | pub enum Writable {
[INFO] [stdout]     |          ^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Left` and `Right` are never constructed
[INFO] [stdout]    --> src/logic/instruction.rs:108:5
[INFO] [stdout]     |
[INFO] [stdout] 107 | pub enum ShiftDirection {
[INFO] [stdout]     |          -------------- variants in this enum
[INFO] [stdout] 108 |     Left,
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 109 |     Right,
[INFO] [stdout]     |     ^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: `ShiftDirection` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Logical`, `Arithmetic`, and `Rotate` are never constructed
[INFO] [stdout]    --> src/logic/instruction.rs:114:5
[INFO] [stdout]     |
[INFO] [stdout] 113 | pub enum ShiftType {
[INFO] [stdout]     |          --------- variants in this enum
[INFO] [stdout] 114 |     Logical,
[INFO] [stdout]     |     ^^^^^^^
[INFO] [stdout] 115 |     Arithmetic,
[INFO] [stdout]     |     ^^^^^^^^^^
[INFO] [stdout] 116 |     Rotate,
[INFO] [stdout]     |     ^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: `ShiftType` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: multiple variants are never constructed
[INFO] [stdout]   --> src/logic/instruction.rs:85:5
[INFO] [stdout]    |
[INFO] [stdout] 84 | pub enum Readable16 {
[INFO] [stdout]    |          ---------- variants in this enum
[INFO] [stdout] 85 |     Register16Name(Register16Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 86 |     Register16PlusImmediate(Register16PlusImmediate),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 87 |     Address(Address),
[INFO] [stdout]    |     ^^^^^^^
[INFO] [stdout] 88 |     PartialAddress(PartialAddress),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout] 89 |     Immediate16(Immediate16),
[INFO] [stdout]    |     ^^^^^^^^^^^
[INFO] [stdout] 90 |     Indirect(Indirect),
[INFO] [stdout]    |     ^^^^^^^^
[INFO] [stdout] 91 |     IndirectPlusFlag(IndirectPlusFlag),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Readable16` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: enum `Readable` is never used
[INFO] [stdout]   --> src/logic/instruction.rs:95:10
[INFO] [stdout]    |
[INFO] [stdout] 95 | pub enum Readable {
[INFO] [stdout]    |          ^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: enum `Writable` is never used
[INFO] [stdout]    --> src/logic/instruction.rs:101:10
[INFO] [stdout]     |
[INFO] [stdout] 101 | pub enum Writable {
[INFO] [stdout]     |          ^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Left` and `Right` are never constructed
[INFO] [stdout]    --> src/logic/instruction.rs:108:5
[INFO] [stdout]     |
[INFO] [stdout] 107 | pub enum ShiftDirection {
[INFO] [stdout]     |          -------------- variants in this enum
[INFO] [stdout] 108 |     Left,
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 109 |     Right,
[INFO] [stdout]     |     ^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: `ShiftDirection` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Logical`, `Arithmetic`, and `Rotate` are never constructed
[INFO] [stdout]    --> src/logic/instruction.rs:114:5
[INFO] [stdout]     |
[INFO] [stdout] 113 | pub enum ShiftType {
[INFO] [stdout]     |          --------- variants in this enum
[INFO] [stdout] 114 |     Logical,
[INFO] [stdout]     |     ^^^^^^^
[INFO] [stdout] 115 |     Arithmetic,
[INFO] [stdout]     |     ^^^^^^^^^^
[INFO] [stdout] 116 |     Rotate,
[INFO] [stdout]     |     ^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: `ShiftType` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: multiple variants are never constructed
[INFO] [stdout]    --> src/logic/instruction.rs:121:5
[INFO] [stdout]     |
[INFO] [stdout] 120 | pub enum Instruction {
[INFO] [stdout]     |          ----------- variants in this enum
[INFO] [stdout] 121 |     NoOP,
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 122 |     Load8(Writable8, Readable8),
[INFO] [stdout] 123 |     Load16(Writable16, Readable16),
[INFO] [stdout]     |     ^^^^^^
[INFO] [stdout] 124 |     Push(Register16Name),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 125 |     Pop(Register16Name),
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 126 |     Add8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 127 |     AddHL(Register16Name, FlagStateChange),
[INFO] [stdout]     |     ^^^^^
[INFO] [stdout] 128 |     AddSP(Immediate8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^
[INFO] [stdout] 129 |     Sub8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 130 |     And8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 131 |     Or8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 132 |     Xor8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 133 |     Compare8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^^^^
[INFO] [stdout] 134 |     Increment8(Writable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^^^^^^
[INFO] [stdout] 135 |     Increment16(Register16Name),
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 136 |     Decrement8(Writable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^^^^^^
[INFO] [stdout] 137 |     Decrement16(Register16Name),
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 138 |     RegisterShift(RegisterName, ShiftDirection, ShiftType, u8),
[INFO] [stdout]     |     ^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: `Instruction` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `AF`, `BC`, `DE`, `HL`, `SP`, and `PC` are never constructed
[INFO] [stdout]   --> src/mem/register.rs:14:5
[INFO] [stdout]    |
[INFO] [stdout] 13 | pub enum Register16Name {
[INFO] [stdout]    |          -------------- variants in this enum
[INFO] [stdout] 14 |     AF,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 15 |     BC,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 16 |     DE,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 17 |     HL,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 18 |     SP,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 19 |     PC,
[INFO] [stdout]    |     ^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Register16Name` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Register8Name` and `Register16Name` are never constructed
[INFO] [stdout]   --> src/mem/register.rs:24:5
[INFO] [stdout]    |
[INFO] [stdout] 23 | pub enum RegisterName {
[INFO] [stdout]    |          ------------ variants in this enum
[INFO] [stdout] 24 |     Register8Name(Register8Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^
[INFO] [stdout] 25 |     Register16Name(Register16Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `RegisterName` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `HLI`, `HLD`, `BC`, and `DE` are never constructed
[INFO] [stdout]   --> src/mem/register.rs:31:5
[INFO] [stdout]    |
[INFO] [stdout] 29 | pub enum Indirect {
[INFO] [stdout]    |          -------- variants in this enum
[INFO] [stdout] 30 |     HL,
[INFO] [stdout] 31 |     HLI,
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 32 |     HLD,
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 33 |     BC,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 34 |     DE,
[INFO] [stdout]    |     ^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Indirect` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: multiple variants are never constructed
[INFO] [stdout]   --> src/mem/register.rs:39:5
[INFO] [stdout]    |
[INFO] [stdout] 38 | pub enum FlagName {
[INFO] [stdout]    |          -------- variants in this enum
[INFO] [stdout] 39 |     S,
[INFO] [stdout]    |     ^
[INFO] [stdout] 40 |     Z,
[INFO] [stdout]    |     ^
[INFO] [stdout] 41 |     F5,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 42 |     H,
[INFO] [stdout]    |     ^
[INFO] [stdout] 43 |     F3,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 44 |     PV,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 45 |     N,
[INFO] [stdout]    |     ^
[INFO] [stdout] 46 |     C,
[INFO] [stdout]    |     ^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `FlagName` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: multiple variants are never constructed
[INFO] [stdout]    --> src/logic/instruction.rs:121:5
[INFO] [stdout]     |
[INFO] [stdout] 120 | pub enum Instruction {
[INFO] [stdout]     |          ----------- variants in this enum
[INFO] [stdout] 121 |     NoOP,
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 122 |     Load8(Writable8, Readable8),
[INFO] [stdout] 123 |     Load16(Writable16, Readable16),
[INFO] [stdout]     |     ^^^^^^
[INFO] [stdout] 124 |     Push(Register16Name),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 125 |     Pop(Register16Name),
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 126 |     Add8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 127 |     AddHL(Register16Name, FlagStateChange),
[INFO] [stdout]     |     ^^^^^
[INFO] [stdout] 128 |     AddSP(Immediate8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^
[INFO] [stdout] 129 |     Sub8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 130 |     And8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 131 |     Or8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 132 |     Xor8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^
[INFO] [stdout] 133 |     Compare8(Readable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^^^^
[INFO] [stdout] 134 |     Increment8(Writable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^^^^^^
[INFO] [stdout] 135 |     Increment16(Register16Name),
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 136 |     Decrement8(Writable8, FlagStateChange),
[INFO] [stdout]     |     ^^^^^^^^^^
[INFO] [stdout] 137 |     Decrement16(Register16Name),
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 138 |     RegisterShift(RegisterName, ShiftDirection, ShiftType, u8),
[INFO] [stdout]     |     ^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: `Instruction` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `AF`, `BC`, `DE`, `HL`, `SP`, and `PC` are never constructed
[INFO] [stdout]   --> src/mem/register.rs:14:5
[INFO] [stdout]    |
[INFO] [stdout] 13 | pub enum Register16Name {
[INFO] [stdout]    |          -------------- variants in this enum
[INFO] [stdout] 14 |     AF,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 15 |     BC,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 16 |     DE,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 17 |     HL,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 18 |     SP,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 19 |     PC,
[INFO] [stdout]    |     ^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Register16Name` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `Register8Name` and `Register16Name` are never constructed
[INFO] [stdout]   --> src/mem/register.rs:24:5
[INFO] [stdout]    |
[INFO] [stdout] 23 | pub enum RegisterName {
[INFO] [stdout]    |          ------------ variants in this enum
[INFO] [stdout] 24 |     Register8Name(Register8Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^
[INFO] [stdout] 25 |     Register16Name(Register16Name),
[INFO] [stdout]    |     ^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `RegisterName` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variants `HLI`, `HLD`, `BC`, and `DE` are never constructed
[INFO] [stdout]   --> src/mem/register.rs:31:5
[INFO] [stdout]    |
[INFO] [stdout] 29 | pub enum Indirect {
[INFO] [stdout]    |          -------- variants in this enum
[INFO] [stdout] 30 |     HL,
[INFO] [stdout] 31 |     HLI,
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 32 |     HLD,
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 33 |     BC,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 34 |     DE,
[INFO] [stdout]    |     ^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `Indirect` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: multiple variants are never constructed
[INFO] [stdout]   --> src/mem/register.rs:39:5
[INFO] [stdout]    |
[INFO] [stdout] 38 | pub enum FlagName {
[INFO] [stdout]    |          -------- variants in this enum
[INFO] [stdout] 39 |     S,
[INFO] [stdout]    |     ^
[INFO] [stdout] 40 |     Z,
[INFO] [stdout]    |     ^
[INFO] [stdout] 41 |     F5,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 42 |     H,
[INFO] [stdout]    |     ^
[INFO] [stdout] 43 |     F3,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 44 |     PV,
[INFO] [stdout]    |     ^^
[INFO] [stdout] 45 |     N,
[INFO] [stdout]    |     ^
[INFO] [stdout] 46 |     C,
[INFO] [stdout]    |     ^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `FlagName` has derived impls for the traits `Debug` and `Clone`, but these are intentionally ignored during dead code analysis
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:126:32
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 126 |     Add8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |                                ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout]     = note: `#[warn(unpredictable_function_pointer_comparisons)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:127:27
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 127 |     AddHL(Register16Name, FlagStateChange),
[INFO] [stdout]     |                           ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:128:23
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 128 |     AddSP(Immediate8, FlagStateChange),
[INFO] [stdout]     |                       ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:129:32
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 129 |     Sub8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |                                ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:130:21
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 130 |     And8(Readable8, FlagStateChange),
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:131:20
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 131 |     Or8(Readable8, FlagStateChange),
[INFO] [stdout]     |                    ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:132:21
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 132 |     Xor8(Readable8, FlagStateChange),
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:133:25
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 133 |     Compare8(Readable8, FlagStateChange),
[INFO] [stdout]     |                         ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:134:27
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 134 |     Increment8(Writable8, FlagStateChange),
[INFO] [stdout]     |                           ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:136:27
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 136 |     Decrement8(Writable8, FlagStateChange),
[INFO] [stdout]     |                           ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:126:32
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 126 |     Add8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |                                ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout]     = note: `#[warn(unpredictable_function_pointer_comparisons)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:127:27
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 127 |     AddHL(Register16Name, FlagStateChange),
[INFO] [stdout]     |                           ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:128:23
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 128 |     AddSP(Immediate8, FlagStateChange),
[INFO] [stdout]     |                       ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:129:32
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 129 |     Sub8(Readable8, Readable8, FlagStateChange),
[INFO] [stdout]     |                                ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:130:21
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 130 |     And8(Readable8, FlagStateChange),
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:131:20
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 131 |     Or8(Readable8, FlagStateChange),
[INFO] [stdout]     |                    ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:132:21
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 132 |     Xor8(Readable8, FlagStateChange),
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:133:25
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 133 |     Compare8(Readable8, FlagStateChange),
[INFO] [stdout]     |                         ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:134:27
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 134 |     Increment8(Writable8, FlagStateChange),
[INFO] [stdout]     |                           ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function pointer comparisons do not produce meaningful results since their addresses are not guaranteed to be unique
[INFO] [stdout]    --> src/logic/instruction.rs:136:27
[INFO] [stdout]     |
[INFO] [stdout] 119 | #[derive(Copy, Clone, Debug, PartialEq)]
[INFO] [stdout]     |                              --------- in this derive macro expansion
[INFO] [stdout] ...
[INFO] [stdout] 136 |     Decrement8(Writable8, FlagStateChange),
[INFO] [stdout]     |                           ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the address of the same function can vary between different codegen units
[INFO] [stdout]     = note: furthermore, different functions could have the same address after being merged together
[INFO] [stdout]     = note: for more information visit <https://doc.rust-lang.org/nightly/core/ptr/fn.fn_addr_eq.html>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]     Finished `dev` profile [unoptimized + debuginfo] target(s) in 0.83s
[INFO] running `Command { std: "docker" "inspect" "308c02323962ab8175dac6eb579e2ad2ff70e4ecc2f137a0fa321b18a7ae31d8", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "308c02323962ab8175dac6eb579e2ad2ff70e4ecc2f137a0fa321b18a7ae31d8", kill_on_drop: false }`
[INFO] [stdout] 308c02323962ab8175dac6eb579e2ad2ff70e4ecc2f137a0fa321b18a7ae31d8
