[INFO] cloning repository https://github.com/abbiepup/riscv
[INFO] running `Command { std: "git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/abbiepup/riscv" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fabbiepup%2Friscv", kill_on_drop: false }`
[INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fabbiepup%2Friscv'...
[INFO] running `Command { std: "git" "rev-parse" "HEAD", kill_on_drop: false }`
[INFO] [stdout] c36185fbf6cd86eb4ba77cb860396719576319f0
[INFO] testing abbiepup/riscv against try#bd7d74411512a3dd3b35d2f699c51dd2557c7e7e+cargoflags=-Zbuild-dir-new-layout for pr-149852-1
[INFO] running `Command { std: "git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fabbiepup%2Friscv" "/workspace/builds/worker-4-tc2/source", kill_on_drop: false }`
[INFO] [stderr] Cloning into '/workspace/builds/worker-4-tc2/source'...
[INFO] [stderr] done.
[INFO] removed /workspace/builds/worker-4-tc2/source/.cargo/config.toml
[INFO] removed /workspace/builds/worker-4-tc2/source/rust-toolchain.toml
[INFO] started tweaking git repo https://github.com/abbiepup/riscv
[INFO] finished tweaking git repo https://github.com/abbiepup/riscv
[INFO] tweaked toml for git repo https://github.com/abbiepup/riscv written to /workspace/builds/worker-4-tc2/source/Cargo.toml
[INFO] validating manifest of git repo https://github.com/abbiepup/riscv on toolchain bd7d74411512a3dd3b35d2f699c51dd2557c7e7e
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+bd7d74411512a3dd3b35d2f699c51dd2557c7e7e" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] crate git repo https://github.com/abbiepup/riscv already has a lockfile, it will not be regenerated
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+bd7d74411512a3dd3b35d2f699c51dd2557c7e7e" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]     Blocking waiting for file lock on package cache
[INFO] [stderr]     Blocking waiting for file lock on package cache
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:aa71247004a7fa38d13ec170f48f06cdedf5bc50b2a8645e56ed7e992e6fa513" "/opt/rustwide/cargo-home/bin/cargo" "+bd7d74411512a3dd3b35d2f699c51dd2557c7e7e" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] 3098412f2511b4e98392c8564d4c5f8421e0b993e4fd3a411542dc26eb415949
[INFO] running `Command { std: "docker" "start" "-a" "3098412f2511b4e98392c8564d4c5f8421e0b993e4fd3a411542dc26eb415949", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "3098412f2511b4e98392c8564d4c5f8421e0b993e4fd3a411542dc26eb415949", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "3098412f2511b4e98392c8564d4c5f8421e0b993e4fd3a411542dc26eb415949", kill_on_drop: false }`
[INFO] [stdout] 3098412f2511b4e98392c8564d4c5f8421e0b993e4fd3a411542dc26eb415949
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:aa71247004a7fa38d13ec170f48f06cdedf5bc50b2a8645e56ed7e992e6fa513" "/opt/rustwide/cargo-home/bin/cargo" "+bd7d74411512a3dd3b35d2f699c51dd2557c7e7e" "build" "--frozen" "--message-format=json" "-Zbuild-dir-new-layout", kill_on_drop: false }`
[INFO] [stdout] de5e867e5c4be6ce0aca7974a6642479f66a5eaa589cb77bba09a4693809ae5b
[INFO] running `Command { std: "docker" "start" "-a" "de5e867e5c4be6ce0aca7974a6642479f66a5eaa589cb77bba09a4693809ae5b", kill_on_drop: false }`
[INFO] [stderr]    Compiling thiserror v2.0.16
[INFO] [stderr]    Compiling syn v2.0.106
[INFO] [stderr]    Compiling thiserror-impl v2.0.16
[INFO] [stderr]    Compiling riscv v0.1.0 (/opt/rustwide/workdir)
[INFO] [stdout] error: invalid register class `freg`: unknown register class
[INFO] [stdout]    --> src/instruction/mod.rs:217:40
[INFO] [stdout]     |
[INFO] [stdout] 217 |     unsafe { asm!("fadd.s {}, {}, {}", lateout(freg) result, in(freg) lhs, in(freg) rhs, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                                        ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the following register classes are supported on this target: `reg`, `reg_abcd`, `reg_byte`, `xmm_reg`, `ymm_reg`, `zmm_reg`, `kreg`, `kreg0`, `mmx_reg`, `x87_reg`, `tmm_reg`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register class `freg`: unknown register class
[INFO] [stdout]    --> src/instruction/mod.rs:217:62
[INFO] [stdout]     |
[INFO] [stdout] 217 |     unsafe { asm!("fadd.s {}, {}, {}", lateout(freg) result, in(freg) lhs, in(freg) rhs, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                                                              ^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the following register classes are supported on this target: `reg`, `reg_abcd`, `reg_byte`, `xmm_reg`, `ymm_reg`, `zmm_reg`, `kreg`, `kreg0`, `mmx_reg`, `x87_reg`, `tmm_reg`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register class `freg`: unknown register class
[INFO] [stdout]    --> src/instruction/mod.rs:217:76
[INFO] [stdout]     |
[INFO] [stdout] 217 |     unsafe { asm!("fadd.s {}, {}, {}", lateout(freg) result, in(freg) lhs, in(freg) rhs, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                                                                            ^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the following register classes are supported on this target: `reg`, `reg_abcd`, `reg_byte`, `xmm_reg`, `ymm_reg`, `zmm_reg`, `kreg`, `kreg0`, `mmx_reg`, `x87_reg`, `tmm_reg`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register class `freg`: unknown register class
[INFO] [stdout]    --> src/instruction/mod.rs:226:40
[INFO] [stdout]     |
[INFO] [stdout] 226 |     unsafe { asm!("fadd.d {}, {}, {}", lateout(freg) result, in(freg) lhs, in(freg) rhs, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                                        ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the following register classes are supported on this target: `reg`, `reg_abcd`, `reg_byte`, `xmm_reg`, `ymm_reg`, `zmm_reg`, `kreg`, `kreg0`, `mmx_reg`, `x87_reg`, `tmm_reg`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register class `freg`: unknown register class
[INFO] [stdout]    --> src/instruction/mod.rs:226:62
[INFO] [stdout]     |
[INFO] [stdout] 226 |     unsafe { asm!("fadd.d {}, {}, {}", lateout(freg) result, in(freg) lhs, in(freg) rhs, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                                                              ^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the following register classes are supported on this target: `reg`, `reg_abcd`, `reg_byte`, `xmm_reg`, `ymm_reg`, `zmm_reg`, `kreg`, `kreg0`, `mmx_reg`, `x87_reg`, `tmm_reg`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register class `freg`: unknown register class
[INFO] [stdout]    --> src/instruction/mod.rs:226:76
[INFO] [stdout]     |
[INFO] [stdout] 226 |     unsafe { asm!("fadd.d {}, {}, {}", lateout(freg) result, in(freg) lhs, in(freg) rhs, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                                                                            ^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: the following register classes are supported on this target: `reg`, `reg_abcd`, `reg_byte`, `xmm_reg`, `ymm_reg`, `zmm_reg`, `kreg`, `kreg0`, `mmx_reg`, `x87_reg`, `tmm_reg`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0570]: "riscv-interrupt-s" is not a supported ABI for the current target
[INFO] [stdout]   --> src/register/stvec.rs:21:19
[INFO] [stdout]    |
[INFO] [stdout] 21 |     Direct(extern "riscv-interrupt-s" fn()) = 0,
[INFO] [stdout]    |                   ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zifencei` is not valid for this target
[INFO] [stdout]   --> src/instruction/mod.rs:29:18
[INFO] [stdout]    |
[INFO] [stdout] 29 | #[target_feature(enable = "zifencei")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^^^^^^^^ `zifencei` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `c` is not valid for this target
[INFO] [stdout]   --> src/instruction/mod.rs:55:18
[INFO] [stdout]    |
[INFO] [stdout] 55 | #[target_feature(enable = "c")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `c` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zbb` is not valid for this target
[INFO] [stdout]   --> src/instruction/mod.rs:84:18
[INFO] [stdout]    |
[INFO] [stdout] 84 | #[target_feature(enable = "zbb")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^^^ `zbb` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zicbom` is not valid for this target
[INFO] [stdout]   --> src/instruction/mod.rs:93:18
[INFO] [stdout]    |
[INFO] [stdout] 93 | #[target_feature(enable = "zicbom")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^^^^^^ `zicbom` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zbb` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:104:18
[INFO] [stdout]     |
[INFO] [stdout] 104 | #[target_feature(enable = "zbb")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^^^ `zbb` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zbb` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:117:18
[INFO] [stdout]     |
[INFO] [stdout] 117 | #[target_feature(enable = "zbb")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^^^ `zbb` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zbb` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:128:18
[INFO] [stdout]     |
[INFO] [stdout] 128 | #[target_feature(enable = "zbb")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^^^ `zbb` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zbb` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:139:18
[INFO] [stdout]     |
[INFO] [stdout] 139 | #[target_feature(enable = "zbb")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^^^ `zbb` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `m` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:187:18
[INFO] [stdout]     |
[INFO] [stdout] 187 | #[target_feature(enable = "m")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^ `m` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `m` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:196:18
[INFO] [stdout]     |
[INFO] [stdout] 196 | #[target_feature(enable = "m")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^ `m` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `m` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:205:18
[INFO] [stdout]     |
[INFO] [stdout] 205 | #[target_feature(enable = "m")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^ `m` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `f` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:214:18
[INFO] [stdout]     |
[INFO] [stdout] 214 | #[target_feature(enable = "f")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^ `f` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `d` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:223:18
[INFO] [stdout]     |
[INFO] [stdout] 223 | #[target_feature(enable = "d")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^ `d` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `zba` is not valid for this target
[INFO] [stdout]    --> src/instruction/mod.rs:232:18
[INFO] [stdout]     |
[INFO] [stdout] 232 | #[target_feature(enable = "zba")]
[INFO] [stdout]     |                  ^^^^^^^^^^^^^^ `zba` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `a` is not valid for this target
[INFO] [stdout]   --> src/instruction/atomic.rs:18:18
[INFO] [stdout]    |
[INFO] [stdout] 18 | #[target_feature(enable = "a")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `a` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `a` is not valid for this target
[INFO] [stdout]   --> src/instruction/atomic.rs:28:18
[INFO] [stdout]    |
[INFO] [stdout] 28 | #[target_feature(enable = "a")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `a` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `a` is not valid for this target
[INFO] [stdout]   --> src/instruction/atomic.rs:38:18
[INFO] [stdout]    |
[INFO] [stdout] 38 | #[target_feature(enable = "a")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `a` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `a` is not valid for this target
[INFO] [stdout]   --> src/instruction/atomic.rs:48:18
[INFO] [stdout]    |
[INFO] [stdout] 48 | #[target_feature(enable = "a")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `a` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `a` is not valid for this target
[INFO] [stdout]   --> src/instruction/atomic.rs:58:18
[INFO] [stdout]    |
[INFO] [stdout] 58 | #[target_feature(enable = "a")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `a` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `a` is not valid for this target
[INFO] [stdout]   --> src/instruction/atomic.rs:68:18
[INFO] [stdout]    |
[INFO] [stdout] 68 | #[target_feature(enable = "a")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `a` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `a` is not valid for this target
[INFO] [stdout]   --> src/instruction/atomic.rs:78:18
[INFO] [stdout]    |
[INFO] [stdout] 78 | #[target_feature(enable = "a")]
[INFO] [stdout]    |                  ^^^^^^^^^^^^ `a` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: the feature named `v` is not valid for this target
[INFO] [stdout]  --> src/instruction/vsetvli.rs:5:18
[INFO] [stdout]   |
[INFO] [stdout] 5 | #[target_feature(enable = "v")]
[INFO] [stdout]   |                  ^^^^^^^^^^^^ `v` is not valid for this target
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:21:29
[INFO] [stdout]    |
[INFO] [stdout] 21 |     unsafe { asm!("amoadd.w {}, {}, ({})", out(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) };
[INFO] [stdout]    |                             ^^                      --- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout]    = note: `#[warn(asm_sub_register)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:21:33
[INFO] [stdout]    |
[INFO] [stdout] 21 |     unsafe { asm!("amoadd.w {}, {}, ({})", out(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) };
[INFO] [stdout]    |                                 ^^                               ----- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:31:29
[INFO] [stdout]    |
[INFO] [stdout] 31 |     unsafe { asm!("amoand.w {}, {}, ({})", out(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) }
[INFO] [stdout]    |                             ^^                      --- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:31:33
[INFO] [stdout]    |
[INFO] [stdout] 31 |     unsafe { asm!("amoand.w {}, {}, ({})", out(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) }
[INFO] [stdout]    |                                 ^^                               ----- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:41:28
[INFO] [stdout]    |
[INFO] [stdout] 41 |     unsafe { asm!("amoor.w {}, {}, ({})", lateout(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) }
[INFO] [stdout]    |                            ^^                          --- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:41:32
[INFO] [stdout]    |
[INFO] [stdout] 41 |     unsafe { asm!("amoor.w {}, {}, ({})", lateout(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) }
[INFO] [stdout]    |                                ^^                                   ----- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:51:30
[INFO] [stdout]    |
[INFO] [stdout] 51 |     unsafe { asm!("amoswap.w {}, {}, ({})", lateout(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) };
[INFO] [stdout]    |                              ^^                          --- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:51:34
[INFO] [stdout]    |
[INFO] [stdout] 51 |     unsafe { asm!("amoswap.w {}, {}, ({})", lateout(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) };
[INFO] [stdout]    |                                  ^^                                   ----- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:61:29
[INFO] [stdout]    |
[INFO] [stdout] 61 |     unsafe { asm!("amoxor.w {}, {}, ({})", lateout(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) };
[INFO] [stdout]    |                             ^^                          --- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:61:33
[INFO] [stdout]    |
[INFO] [stdout] 61 |     unsafe { asm!("amoxor.w {}, {}, ({})", lateout(reg) old, in(reg) value, in(reg) address.as_ptr(), options(nostack)) };
[INFO] [stdout]    |                                 ^^                                   ----- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:71:25
[INFO] [stdout]    |
[INFO] [stdout] 71 |     unsafe { asm!("lr.w {}, ({})", lateout(reg) value, in(reg) address.as_ptr(), options(nostack)) }
[INFO] [stdout]    |                         ^^                      ----- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:81:25
[INFO] [stdout]    |
[INFO] [stdout] 81 |     unsafe { asm!("sc.w {}, {}, ({})", lateout(reg) status, in(reg) value, in(reg) address.as_ptr(), options(nostack)) }
[INFO] [stdout]    |                         ^^                          ------ for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]   --> src/instruction/atomic.rs:81:29
[INFO] [stdout]    |
[INFO] [stdout] 81 |     unsafe { asm!("sc.w {}, {}, ({})", lateout(reg) status, in(reg) value, in(reg) address.as_ptr(), options(nostack)) }
[INFO] [stdout]    |                             ^^                                      ----- for this argument
[INFO] [stdout]    |
[INFO] [stdout]    = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]    = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/instruction/mod.rs:120:25
[INFO] [stdout]     |
[INFO] [stdout] 120 |     unsafe { asm!("clzw {}, {}", lateout(reg) result, in(reg) value, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                         ^^                    ------ for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/instruction/mod.rs:120:29
[INFO] [stdout]     |
[INFO] [stdout] 120 |     unsafe { asm!("clzw {}, {}", lateout(reg) result, in(reg) value, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                             ^^                                ----- for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/instruction/mod.rs:142:26
[INFO] [stdout]     |
[INFO] [stdout] 142 |     unsafe { asm!("cpopw {}, {}", lateout(reg) result, in(reg) value, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                          ^^                    ------ for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/instruction/mod.rs:142:30
[INFO] [stdout]     |
[INFO] [stdout] 142 |     unsafe { asm!("cpopw {}, {}", lateout(reg) result, in(reg) value, options(pure, nomem, nostack)) };
[INFO] [stdout]     |                              ^^                                ----- for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/instruction/mod.rs:249:25
[INFO] [stdout]     |
[INFO] [stdout] 249 |     unsafe { asm!("negw {}, {}", lateout(reg) result, in(reg) value, options(pure, nomem, nostack)) }
[INFO] [stdout]     |                         ^^                    ------ for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/instruction/mod.rs:249:29
[INFO] [stdout]     |
[INFO] [stdout] 249 |     unsafe { asm!("negw {}, {}", lateout(reg) result, in(reg) value, options(pure, nomem, nostack)) }
[INFO] [stdout]     |                             ^^                                ----- for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{1:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{1:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] For more information about this error, try `rustc --explain E0570`.
[INFO] [stdout] 
[INFO] [stderr] error: could not compile `riscv` (lib) due to 29 previous errors; 19 warnings emitted
[INFO] running `Command { std: "docker" "inspect" "de5e867e5c4be6ce0aca7974a6642479f66a5eaa589cb77bba09a4693809ae5b", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "de5e867e5c4be6ce0aca7974a6642479f66a5eaa589cb77bba09a4693809ae5b", kill_on_drop: false }`
[INFO] [stdout] de5e867e5c4be6ce0aca7974a6642479f66a5eaa589cb77bba09a4693809ae5b
