[INFO] fetching crate arm-gic-driver 0.15.8...
[INFO] testing arm-gic-driver-0.15.8 against try#c2e32f1c9652b13ed99608599c1e855462f421f3 for pr-146098-7
[INFO] extracting crate arm-gic-driver 0.15.8 into /workspace/builds/worker-3-tc2/source
[INFO] started tweaking crates.io crate arm-gic-driver 0.15.8
[INFO] finished tweaking crates.io crate arm-gic-driver 0.15.8
[INFO] tweaked toml for crates.io crate arm-gic-driver 0.15.8 written to /workspace/builds/worker-3-tc2/source/Cargo.toml
[INFO] validating manifest of crates.io crate arm-gic-driver 0.15.8 on toolchain c2e32f1c9652b13ed99608599c1e855462f421f3
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+c2e32f1c9652b13ed99608599c1e855462f421f3" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] crate crates.io crate arm-gic-driver 0.15.8 already has a lockfile, it will not be regenerated
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+c2e32f1c9652b13ed99608599c1e855462f421f3" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-3-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-3-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:4848fb76d95f26979359cc7e45710b1dbc8f3acb7aeedee7c460d7702230f228" "/opt/rustwide/cargo-home/bin/cargo" "+c2e32f1c9652b13ed99608599c1e855462f421f3" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] 0b73bd3dab2bd0b45ca2319cc39519a901367a03f23878e8acbfc5fbfdc2011a
[INFO] running `Command { std: "docker" "start" "-a" "0b73bd3dab2bd0b45ca2319cc39519a901367a03f23878e8acbfc5fbfdc2011a", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "0b73bd3dab2bd0b45ca2319cc39519a901367a03f23878e8acbfc5fbfdc2011a", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "0b73bd3dab2bd0b45ca2319cc39519a901367a03f23878e8acbfc5fbfdc2011a", kill_on_drop: false }`
[INFO] [stdout] 0b73bd3dab2bd0b45ca2319cc39519a901367a03f23878e8acbfc5fbfdc2011a
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-3-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-3-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:4848fb76d95f26979359cc7e45710b1dbc8f3acb7aeedee7c460d7702230f228" "/opt/rustwide/cargo-home/bin/cargo" "+c2e32f1c9652b13ed99608599c1e855462f421f3" "build" "--frozen" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] 90ef1e91f4fd7d64c6c856b3fc242cfe7a8b7880164b3758f6e9c8d84276bb7c
[INFO] running `Command { std: "docker" "start" "-a" "90ef1e91f4fd7d64c6c856b3fc242cfe7a8b7880164b3758f6e9c8d84276bb7c", kill_on_drop: false }`
[INFO] [stderr]    Compiling once_cell v1.21.3
[INFO] [stderr]    Compiling tock-registers v0.9.0
[INFO] [stderr]    Compiling bitflags v2.9.2
[INFO] [stderr]    Compiling syn v2.0.106
[INFO] [stderr]    Compiling aarch64-cpu v10.0.0
[INFO] [stderr]    Compiling enum_dispatch v0.3.13
[INFO] [stderr]    Compiling arm-gic-driver v0.15.8 (/opt/rustwide/workdir)
[INFO] [stdout] warning: multiple methods are never used
[INFO] [stdout]    --> src/version/v3/gicd.rs:297:12
[INFO] [stdout]     |
[INFO] [stdout]  92 | impl DistributorReg {
[INFO] [stdout]     | ------------------- methods in this implementation
[INFO] [stdout] ...
[INFO] [stdout] 297 |     pub fn set_interrupt_group(&self, intid: u32, group: u32, group_modifier: bool) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 425 |     pub fn generate_spi_ns(&self, intid: u32) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 432 |     pub fn generate_spi_s(&self, intid: u32) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 439 |     pub fn clear_spi_ns(&self, intid: u32) {
[INFO] [stdout]     |            ^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 446 |     pub fn clear_spi_s(&self, intid: u32) {
[INFO] [stdout]     |            ^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 453 |     pub fn set_nmi(&self, intid: u32, nmi: bool) {
[INFO] [stdout]     |            ^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 470 |     pub fn is_nmi(&self, intid: u32) -> bool {
[INFO] [stdout]     |            ^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 484 |     pub fn has_extended_spi(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 490 |     pub fn extended_spi_range(&self) -> u32 {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 496 |     pub fn has_message_based_spi(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 501 |     pub fn has_lpis(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 506 |     pub fn has_direct_vlpi(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: `#[warn(dead_code)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: multiple methods are never used
[INFO] [stdout]    --> src/version/v3/gicr.rs:217:12
[INFO] [stdout]     |
[INFO] [stdout] 190 | impl LPI {
[INFO] [stdout]     | -------- methods in this implementation
[INFO] [stdout] ...
[INFO] [stdout] 217 |     pub fn enable_lpi(&self) {
[INFO] [stdout]     |            ^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 222 |     pub fn disable_lpi(&self) {
[INFO] [stdout]     |            ^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 231 |     pub fn is_lpi_enabled(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 236 |     pub fn set_lpi_pending(&self, intid: u32) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 241 |     pub fn clear_lpi_pending(&self, intid: u32) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 246 |     pub fn invalidate_lpi(&self, intid: u32) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 251 |     pub fn invalidate_all_lpi(&self) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 256 |     pub fn sync(&self) {
[INFO] [stdout]     |            ^^^^
[INFO] [stdout] ...
[INFO] [stdout] 263 |     pub fn is_last(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 268 |     pub fn get_affinity(&self) -> u32 {
[INFO] [stdout]     |            ^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 273 |     pub fn supports_physical_lpi(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 278 |     pub fn supports_virtual_lpi(&self) -> bool {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: methods `set_group`, `is_group1`, and `set_group_modifier` are never used
[INFO] [stdout]    --> src/version/v3/gicr.rs:464:12
[INFO] [stdout]     |
[INFO] [stdout] 324 | impl SGI {
[INFO] [stdout]     | -------- methods in this implementation
[INFO] [stdout] ...
[INFO] [stdout] 464 |     pub fn set_group(&self, intid: IntId, group1: bool) {
[INFO] [stdout]     |            ^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 474 |     pub fn is_group1(&self, intid: IntId) -> bool {
[INFO] [stdout]     |            ^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 481 |     pub fn set_group_modifier(&self, intid: IntId, modifier: bool) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR11_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR12_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR6_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR7_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR3_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR13_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR4_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR9_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR6_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:102:35
[INFO] [stdout]     |
[INFO] [stdout] 102 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_IGRPEN0_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR7_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:141:35
[INFO] [stdout]     |
[INFO] [stdout] 141 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_DIR_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR11_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:102:35
[INFO] [stdout]     |
[INFO] [stdout] 102 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_PMR_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR12_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR9_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR3_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR13_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR4_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR3_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR11_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR9_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR7_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR12_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR4_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR6_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR13_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR0_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR1_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR2_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR5_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR8_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR10_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR14_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR15_EL2, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]   --> src/sys_reg/macros.rs:50:35
[INFO] [stdout]    |
[INFO] [stdout] 50 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!($register)), out(reg) reg) }
[INFO] [stdout]    |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout]  2 |     mrs rax, ICC_IAR0_EL1
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]   --> src/sys_reg/macros.rs:50:35
[INFO] [stdout]    |
[INFO] [stdout] 50 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!($register)), out(reg) reg) }
[INFO] [stdout]    |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout]  2 |     mrs rax, ICC_IAR1_EL1
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR1_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR5_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR14_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR10_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR2_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]   --> src/sys_reg/macros.rs:91:35
[INFO] [stdout]    |
[INFO] [stdout] 91 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!($register)), out(reg) reg) }
[INFO] [stdout]    |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout]  2 |     mrs rax, ICC_CTLR_EL1
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR0_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR8_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]    --> src/sys_reg/ich.rs:176:35
[INFO] [stdout]     |
[INFO] [stdout] 176 |                     unsafe { asm!(concat!("mrs {0}, ", stringify!( [<ICH_LR $n _EL2>])), out(reg) reg) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     mrs rax, ICH_LR15_EL2
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR1_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR10_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR15_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:141:35
[INFO] [stdout]     |
[INFO] [stdout] 141 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_EOIR0_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:102:35
[INFO] [stdout]     |
[INFO] [stdout] 102 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_SRE_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:141:35
[INFO] [stdout]     |
[INFO] [stdout] 141 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_SGI1R_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:102:35
[INFO] [stdout]     |
[INFO] [stdout] 102 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_IGRPEN1_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR8_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR5_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR0_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:141:35
[INFO] [stdout]     |
[INFO] [stdout] 141 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_EOIR1_EL1, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR14_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:102:35
[INFO] [stdout]     |
[INFO] [stdout] 102 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_SRE_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/ich.rs:187:35
[INFO] [stdout]     |
[INFO] [stdout] 187 |                     unsafe { asm!(concat!("msr ", stringify!([<ICH_LR $n _EL2>]), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICH_LR2_EL2, rdx
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]    --> src/sys_reg/macros.rs:102:35
[INFO] [stdout]     |
[INFO] [stdout] 102 |                     unsafe { asm!(concat!("msr ", stringify!($register), ", {0}"), in(reg) value) }
[INFO] [stdout]     |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]    --> <inline asm>:2:2
[INFO] [stdout]     |
[INFO] [stdout]   2 |     msr ICC_CTLR_EL1, rax
[INFO] [stdout]     |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr] error: could not compile `arm-gic-driver` (lib) due to 61 previous errors; 3 warnings emitted
[INFO] running `Command { std: "docker" "inspect" "90ef1e91f4fd7d64c6c856b3fc242cfe7a8b7880164b3758f6e9c8d84276bb7c", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "90ef1e91f4fd7d64c6c856b3fc242cfe7a8b7880164b3758f6e9c8d84276bb7c", kill_on_drop: false }`
[INFO] [stdout] 90ef1e91f4fd7d64c6c856b3fc242cfe7a8b7880164b3758f6e9c8d84276bb7c