[INFO] fetching crate te1d 0.0.1... [INFO] testing te1d-0.0.1 against try#2440211fe03bc45c89b6dc1a3df18382ce91e32b for pr-146098-1 [INFO] extracting crate te1d 0.0.1 into /workspace/builds/worker-7-tc2/source [INFO] started tweaking crates.io crate te1d 0.0.1 [INFO] finished tweaking crates.io crate te1d 0.0.1 [INFO] tweaked toml for crates.io crate te1d 0.0.1 written to /workspace/builds/worker-7-tc2/source/Cargo.toml [INFO] validating manifest of crates.io crate te1d 0.0.1 on toolchain 2440211fe03bc45c89b6dc1a3df18382ce91e32b [INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+2440211fe03bc45c89b6dc1a3df18382ce91e32b" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }` [INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+2440211fe03bc45c89b6dc1a3df18382ce91e32b" "generate-lockfile" "--manifest-path" "Cargo.toml", kill_on_drop: false }` [INFO] [stderr] Updating crates.io index [INFO] [stderr] Locking 7 packages to latest compatible versions [INFO] [stderr] Adding ndarray v0.15.6 (available: v0.16.1) [INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+2440211fe03bc45c89b6dc1a3df18382ce91e32b" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }` [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+2440211fe03bc45c89b6dc1a3df18382ce91e32b" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }` [INFO] [stdout] 579f57f9fac5d7564acc8172996db91b6bbe19a070a59de4e697300009669a93 [INFO] running `Command { std: "docker" "start" "-a" "579f57f9fac5d7564acc8172996db91b6bbe19a070a59de4e697300009669a93", kill_on_drop: false }` [INFO] running `Command { std: "docker" "inspect" "579f57f9fac5d7564acc8172996db91b6bbe19a070a59de4e697300009669a93", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "579f57f9fac5d7564acc8172996db91b6bbe19a070a59de4e697300009669a93", kill_on_drop: false }` [INFO] [stdout] 579f57f9fac5d7564acc8172996db91b6bbe19a070a59de4e697300009669a93 [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+2440211fe03bc45c89b6dc1a3df18382ce91e32b" "build" "--frozen" "--message-format=json", kill_on_drop: false }` [INFO] [stdout] 78f9b4e799381f86525062d0ac470be326bdc67242c0cc723898f8186118e94c [INFO] running `Command { std: "docker" "start" "-a" "78f9b4e799381f86525062d0ac470be326bdc67242c0cc723898f8186118e94c", kill_on_drop: false }` [INFO] [stderr] Compiling matrixmultiply v0.3.10 [INFO] [stderr] Compiling num-complex v0.4.6 [INFO] [stderr] Compiling num-integer v0.1.46 [INFO] [stderr] Compiling ndarray v0.15.6 [INFO] [stderr] Compiling te1d v0.0.1 (/opt/rustwide/workdir) [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:12:26 [INFO] [stdout] | [INFO] [stdout] 12 | fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(unused_parens)]` (part of `#[warn(unused)]`) on by default [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 12 - fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] 12 + fn explicit_rk4_step(f: &dyn Fn(f64, &ColVec) -> ColVec, x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:49:25 [INFO] [stdout] | [INFO] [stdout] 49 | pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 49 - pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] 49 + pub fn explicit_rk4(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:96:29 [INFO] [stdout] | [INFO] [stdout] 96 | pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 96 - pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] 96 + pub fn explicit_rk4_mut(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:141:29 [INFO] [stdout] | [INFO] [stdout] 141 | pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 141 - pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] 141 + pub fn explicit_rk4_fvp(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:167:26 [INFO] [stdout] | [INFO] [stdout] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] 167 + pub fn new(left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:167:62 [INFO] [stdout] | [INFO] [stdout] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] 167 + pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:228:41 [INFO] [stdout] | [INFO] [stdout] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] 228 + pub fn to_full_var(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:228:77 [INFO] [stdout] | [INFO] [stdout] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] 228 + pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:240:74 [INFO] [stdout] | [INFO] [stdout] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:240:110 [INFO] [stdout] | [INFO] [stdout] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:250:91 [INFO] [stdout] | [INFO] [stdout] 250 | pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bounda... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:250:127 [INFO] [stdout] | [INFO] [stdout] 250 | ...ur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:277:88 [INFO] [stdout] | [INFO] [stdout] 277 | pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryC... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:277:124 [INFO] [stdout] | [INFO] [stdout] 277 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:287:105 [INFO] [stdout] | [INFO] [stdout] 287 | pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:287:141 [INFO] [stdout] | [INFO] [stdout] 287 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:320:78 [INFO] [stdout] | [INFO] [stdout] 320 | pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition),... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:320:114 [INFO] [stdout] | [INFO] [stdout] 320 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:334:95 [INFO] [stdout] | [INFO] [stdout] 334 | pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bo... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:334:131 [INFO] [stdout] | [INFO] [stdout] 334 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:50 [INFO] [stdout] | [INFO] [stdout] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &dyn Fn(&ColVec) -> f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:86 [INFO] [stdout] | [INFO] [stdout] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:122 [INFO] [stdout] | [INFO] [stdout] 375 | ...-> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) ->... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:427:87 [INFO] [stdout] | [INFO] [stdout] 427 | pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCo... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:427:123 [INFO] [stdout] | [INFO] [stdout] 427 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64,... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:439:104 [INFO] [stdout] | [INFO] [stdout] 439 | pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc:... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:439:140 [INFO] [stdout] | [INFO] [stdout] 439 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullO... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:457:55 [INFO] [stdout] | [INFO] [stdout] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 457 + pub fn maximize_power_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:457:91 [INFO] [stdout] | [INFO] [stdout] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 457 + pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:475:53 [INFO] [stdout] | [INFO] [stdout] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 475 + pub fn maximize_power_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:475:89 [INFO] [stdout] | [INFO] [stdout] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 475 + pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:487:70 [INFO] [stdout] | [INFO] [stdout] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:487:106 [INFO] [stdout] | [INFO] [stdout] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:505:60 [INFO] [stdout] | [INFO] [stdout] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:505:96 [INFO] [stdout] | [INFO] [stdout] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:523:58 [INFO] [stdout] | [INFO] [stdout] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:523:94 [INFO] [stdout] | [INFO] [stdout] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:535:75 [INFO] [stdout] | [INFO] [stdout] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:535:111 [INFO] [stdout] | [INFO] [stdout] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] Finished `dev` profile [unoptimized + debuginfo] target(s) in 5.88s [INFO] running `Command { std: "docker" "inspect" "78f9b4e799381f86525062d0ac470be326bdc67242c0cc723898f8186118e94c", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "78f9b4e799381f86525062d0ac470be326bdc67242c0cc723898f8186118e94c", kill_on_drop: false }` [INFO] [stdout] 78f9b4e799381f86525062d0ac470be326bdc67242c0cc723898f8186118e94c [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+2440211fe03bc45c89b6dc1a3df18382ce91e32b" "test" "--frozen" "--no-run" "--message-format=json", kill_on_drop: false }` [INFO] [stdout] 0cfe2de3b3447f91d80a1d8f7cb67d42b8377a458d1fcbf51427dc10efa768bc [INFO] running `Command { std: "docker" "start" "-a" "0cfe2de3b3447f91d80a1d8f7cb67d42b8377a458d1fcbf51427dc10efa768bc", kill_on_drop: false }` [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:12:26 [INFO] [stdout] | [INFO] [stdout] 12 | fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(unused_parens)]` (part of `#[warn(unused)]`) on by default [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 12 - fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] 12 + fn explicit_rk4_step(f: &dyn Fn(f64, &ColVec) -> ColVec, x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:49:25 [INFO] [stdout] | [INFO] [stdout] 49 | pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 49 - pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] 49 + pub fn explicit_rk4(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:96:29 [INFO] [stdout] | [INFO] [stdout] 96 | pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 96 - pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] 96 + pub fn explicit_rk4_mut(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:141:29 [INFO] [stdout] | [INFO] [stdout] 141 | pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 141 - pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] 141 + pub fn explicit_rk4_fvp(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:167:26 [INFO] [stdout] | [INFO] [stdout] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] 167 + pub fn new(left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:167:62 [INFO] [stdout] | [INFO] [stdout] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] 167 + pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:228:41 [INFO] [stdout] | [INFO] [stdout] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] 228 + pub fn to_full_var(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:228:77 [INFO] [stdout] | [INFO] [stdout] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] 228 + pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:240:74 [INFO] [stdout] | [INFO] [stdout] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:240:110 [INFO] [stdout] | [INFO] [stdout] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:250:91 [INFO] [stdout] | [INFO] [stdout] 250 | pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bounda... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:250:127 [INFO] [stdout] | [INFO] [stdout] 250 | ...ur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:277:88 [INFO] [stdout] | [INFO] [stdout] 277 | pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryC... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:277:124 [INFO] [stdout] | [INFO] [stdout] 277 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:287:105 [INFO] [stdout] | [INFO] [stdout] 287 | pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:287:141 [INFO] [stdout] | [INFO] [stdout] 287 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:320:78 [INFO] [stdout] | [INFO] [stdout] 320 | pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition),... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:320:114 [INFO] [stdout] | [INFO] [stdout] 320 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:334:95 [INFO] [stdout] | [INFO] [stdout] 334 | pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bo... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:334:131 [INFO] [stdout] | [INFO] [stdout] 334 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:50 [INFO] [stdout] | [INFO] [stdout] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &dyn Fn(&ColVec) -> f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:86 [INFO] [stdout] | [INFO] [stdout] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:122 [INFO] [stdout] | [INFO] [stdout] 375 | ...-> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) ->... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:427:87 [INFO] [stdout] | [INFO] [stdout] 427 | pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCo... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:427:123 [INFO] [stdout] | [INFO] [stdout] 427 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64,... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:439:104 [INFO] [stdout] | [INFO] [stdout] 439 | pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc:... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:439:140 [INFO] [stdout] | [INFO] [stdout] 439 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullO... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:457:55 [INFO] [stdout] | [INFO] [stdout] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 457 + pub fn maximize_power_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:457:91 [INFO] [stdout] | [INFO] [stdout] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 457 + pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:475:53 [INFO] [stdout] | [INFO] [stdout] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 475 + pub fn maximize_power_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:475:89 [INFO] [stdout] | [INFO] [stdout] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 475 + pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:487:70 [INFO] [stdout] | [INFO] [stdout] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:487:106 [INFO] [stdout] | [INFO] [stdout] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:505:60 [INFO] [stdout] | [INFO] [stdout] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] Compiling te1d v0.0.1 (/opt/rustwide/workdir) [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:505:96 [INFO] [stdout] | [INFO] [stdout] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:523:58 [INFO] [stdout] | [INFO] [stdout] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:523:94 [INFO] [stdout] | [INFO] [stdout] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:535:75 [INFO] [stdout] | [INFO] [stdout] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:535:111 [INFO] [stdout] | [INFO] [stdout] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:12:26 [INFO] [stdout] | [INFO] [stdout] 12 | fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(unused_parens)]` (part of `#[warn(unused)]`) on by default [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 12 - fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] 12 + fn explicit_rk4_step(f: &dyn Fn(f64, &ColVec) -> ColVec, x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:49:25 [INFO] [stdout] | [INFO] [stdout] 49 | pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 49 - pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] 49 + pub fn explicit_rk4(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:96:29 [INFO] [stdout] | [INFO] [stdout] 96 | pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 96 - pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] 96 + pub fn explicit_rk4_mut(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/ode.rs:141:29 [INFO] [stdout] | [INFO] [stdout] 141 | pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 141 - pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] 141 + pub fn explicit_rk4_fvp(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:167:26 [INFO] [stdout] | [INFO] [stdout] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] 167 + pub fn new(left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:167:62 [INFO] [stdout] | [INFO] [stdout] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] 167 + pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:228:41 [INFO] [stdout] | [INFO] [stdout] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] 228 + pub fn to_full_var(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:228:77 [INFO] [stdout] | [INFO] [stdout] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] 228 + pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, opt_var: &ColVec) -> FullOptVar { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:279:25 [INFO] [stdout] | [INFO] [stdout] 279 | let left_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 279 - let left_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stdout] 279 + let left_bcs: [&dyn BoundaryCondition; 8] = [ [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/bc.rs:283:26 [INFO] [stdout] | [INFO] [stdout] 283 | let right_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 283 - let right_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stdout] 283 + let right_bcs: [&dyn BoundaryCondition; 8] = [ [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:240:74 [INFO] [stdout] | [INFO] [stdout] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:240:110 [INFO] [stdout] | [INFO] [stdout] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:250:91 [INFO] [stdout] | [INFO] [stdout] 250 | pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bounda... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:250:127 [INFO] [stdout] | [INFO] [stdout] 250 | ...ur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:277:88 [INFO] [stdout] | [INFO] [stdout] 277 | pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryC... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:277:124 [INFO] [stdout] | [INFO] [stdout] 277 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:287:105 [INFO] [stdout] | [INFO] [stdout] 287 | pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:287:141 [INFO] [stdout] | [INFO] [stdout] 287 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:320:78 [INFO] [stdout] | [INFO] [stdout] 320 | pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition),... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:320:114 [INFO] [stdout] | [INFO] [stdout] 320 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:334:95 [INFO] [stdout] | [INFO] [stdout] 334 | pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bo... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:334:131 [INFO] [stdout] | [INFO] [stdout] 334 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:50 [INFO] [stdout] | [INFO] [stdout] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &dyn Fn(&ColVec) -> f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:86 [INFO] [stdout] | [INFO] [stdout] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:375:122 [INFO] [stdout] | [INFO] [stdout] 375 | ...-> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) ->... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:427:87 [INFO] [stdout] | [INFO] [stdout] 427 | pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCo... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:427:123 [INFO] [stdout] | [INFO] [stdout] 427 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64,... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:439:104 [INFO] [stdout] | [INFO] [stdout] 439 | pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc:... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:439:140 [INFO] [stdout] | [INFO] [stdout] 439 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullO... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:457:55 [INFO] [stdout] | [INFO] [stdout] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 457 + pub fn maximize_power_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:457:91 [INFO] [stdout] | [INFO] [stdout] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 457 + pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:475:53 [INFO] [stdout] | [INFO] [stdout] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 475 + pub fn maximize_power_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:475:89 [INFO] [stdout] | [INFO] [stdout] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 475 + pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:487:70 [INFO] [stdout] | [INFO] [stdout] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:487:106 [INFO] [stdout] | [INFO] [stdout] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:505:60 [INFO] [stdout] | [INFO] [stdout] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:505:96 [INFO] [stdout] | [INFO] [stdout] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:523:58 [INFO] [stdout] | [INFO] [stdout] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:523:94 [INFO] [stdout] | [INFO] [stdout] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:535:75 [INFO] [stdout] | [INFO] [stdout] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unnecessary parentheses around type [INFO] [stdout] --> src/teg/mod.rs:535:111 [INFO] [stdout] | [INFO] [stdout] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stdout] | ^ ^ [INFO] [stdout] | [INFO] [stdout] help: remove these parentheses [INFO] [stdout] | [INFO] [stdout] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stdout] | [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] Finished `test` profile [unoptimized + debuginfo] target(s) in 2.25s [INFO] running `Command { std: "docker" "inspect" "0cfe2de3b3447f91d80a1d8f7cb67d42b8377a458d1fcbf51427dc10efa768bc", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "0cfe2de3b3447f91d80a1d8f7cb67d42b8377a458d1fcbf51427dc10efa768bc", kill_on_drop: false }` [INFO] [stdout] 0cfe2de3b3447f91d80a1d8f7cb67d42b8377a458d1fcbf51427dc10efa768bc [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+2440211fe03bc45c89b6dc1a3df18382ce91e32b" "test" "--frozen", kill_on_drop: false }` [INFO] [stdout] bee531d18aaa13a2916099b43d9c23e8395f43a066ce20c77ff97d8dc7f5275e [INFO] running `Command { std: "docker" "start" "-a" "bee531d18aaa13a2916099b43d9c23e8395f43a066ce20c77ff97d8dc7f5275e", kill_on_drop: false }` [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:12:26 [INFO] [stderr] | [INFO] [stderr] 12 | fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_parens)]` (part of `#[warn(unused)]`) on by default [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 12 - fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stderr] 12 + fn explicit_rk4_step(f: &dyn Fn(f64, &ColVec) -> ColVec, x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:49:25 [INFO] [stderr] | [INFO] [stderr] 49 | pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 49 - pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stderr] 49 + pub fn explicit_rk4(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:96:29 [INFO] [stderr] | [INFO] [stderr] 96 | pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 96 - pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stderr] 96 + pub fn explicit_rk4_mut(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:141:29 [INFO] [stderr] | [INFO] [stderr] 141 | pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 141 - pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stderr] 141 + pub fn explicit_rk4_fvp(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:167:26 [INFO] [stderr] | [INFO] [stderr] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] 167 + pub fn new(left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:167:62 [INFO] [stderr] | [INFO] [stderr] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] 167 + pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:228:41 [INFO] [stderr] | [INFO] [stderr] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] 228 + pub fn to_full_var(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:228:77 [INFO] [stderr] | [INFO] [stderr] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] 228 + pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:240:74 [INFO] [stderr] | [INFO] [stderr] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:240:110 [INFO] [stderr] | [INFO] [stderr] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:250:91 [INFO] [stderr] | [INFO] [stderr] 250 | pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bounda... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:250:127 [INFO] [stderr] | [INFO] [stderr] 250 | ...ur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:277:88 [INFO] [stderr] | [INFO] [stderr] 277 | pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryC... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:277:124 [INFO] [stderr] | [INFO] [stderr] 277 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:287:105 [INFO] [stderr] | [INFO] [stderr] 287 | pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:287:141 [INFO] [stderr] | [INFO] [stderr] 287 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:320:78 [INFO] [stderr] | [INFO] [stderr] 320 | pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition),... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:320:114 [INFO] [stderr] | [INFO] [stderr] 320 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:334:95 [INFO] [stderr] | [INFO] [stderr] 334 | pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bo... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:334:131 [INFO] [stderr] | [INFO] [stderr] 334 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:375:50 [INFO] [stderr] | [INFO] [stderr] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 375 + fn minimize_cost_by_shooting(&self, cost_f: &dyn Fn(&ColVec) -> f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:375:86 [INFO] [stderr] | [INFO] [stderr] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:375:122 [INFO] [stderr] | [INFO] [stderr] 375 | ...-> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) ->... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:427:87 [INFO] [stderr] | [INFO] [stderr] 427 | pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCo... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:427:123 [INFO] [stderr] | [INFO] [stderr] 427 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64,... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:439:104 [INFO] [stderr] | [INFO] [stderr] 439 | pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc:... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:439:140 [INFO] [stderr] | [INFO] [stderr] 439 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullO... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:457:55 [INFO] [stderr] | [INFO] [stderr] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 457 + pub fn maximize_power_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:457:91 [INFO] [stderr] | [INFO] [stderr] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 457 + pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:475:53 [INFO] [stderr] | [INFO] [stderr] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 475 + pub fn maximize_power_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:475:89 [INFO] [stderr] | [INFO] [stderr] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 475 + pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:487:70 [INFO] [stderr] | [INFO] [stderr] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:487:106 [INFO] [stderr] | [INFO] [stderr] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:505:60 [INFO] [stderr] | [INFO] [stderr] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:505:96 [INFO] [stderr] | [INFO] [stderr] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:523:58 [INFO] [stderr] | [INFO] [stderr] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:523:94 [INFO] [stderr] | [INFO] [stderr] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:535:75 [INFO] [stderr] | [INFO] [stderr] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:535:111 [INFO] [stderr] | [INFO] [stderr] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:279:25 [INFO] [stderr] | [INFO] [stderr] 279 | let left_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 279 - let left_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stderr] 279 + let left_bcs: [&dyn BoundaryCondition; 8] = [ [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:283:26 [INFO] [stderr] | [INFO] [stderr] 283 | let right_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 283 - let right_bcs: [&(dyn BoundaryCondition); 8] = [ [INFO] [stderr] 283 + let right_bcs: [&dyn BoundaryCondition; 8] = [ [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: `te1d` (lib) generated 39 warnings (run `cargo fix --lib -p te1d` to apply 39 suggestions) [INFO] [stderr] warning: `te1d` (lib test) generated 41 warnings (39 duplicates) (run `cargo fix --lib -p te1d --tests` to apply 2 suggestions) [INFO] [stderr] Finished `test` profile [unoptimized + debuginfo] target(s) in 0.06s [INFO] [stderr] Running unittests src/lib.rs (/opt/rustwide/target/debug/deps/te1d-2347206d1e578c2d) [INFO] [stdout] [INFO] [stdout] running 29 tests [INFO] [stdout] test calc::tests::test_integrate_simpson ... ok [INFO] [stdout] test linalg::tests::test_row_of_abs_max ... ok [INFO] [stdout] test bc::tests::test_opt_var_converter ... ok [INFO] [stdout] test ode::tests::test_explicit_rk4 ... ok [INFO] [stdout] test ode::tests::test_explicit_rk4_fvp ... ok [INFO] [stdout] test opt::tests::test_line_search_strong_wolfe ... ok [INFO] [stdout] test ode::tests::test_explicit_rk4_step ... ok [INFO] [stdout] test teg::tests::test_estimate_max_efficiency_for_linear_thrm_cond ... ignored [INFO] [stdout] test teg::tests::test_estimate_max_power_for_linear_thrm_cond ... ignored [INFO] [stdout] test teg::tests::test_maximize_efficiency_for_cpm ... ignored [INFO] [stdout] test teg::tests::test_maximize_efficiency_for_linear_elec_resi ... ignored [INFO] [stdout] test teg::tests::test_maximize_power_for_cpm ... ignored [INFO] [stdout] test teg::tests::test_single_leg_simulate_fixed_elec_cur_for_linear_elec_resi ... ignored [INFO] [stdout] test teg::tests::test_single_leg_simulate_fixed_elec_cur_for_linear_thrm_cond ... ignored [INFO] [stdout] test teg::tests::test_single_leg_simulate_fixed_elec_cur_for_log_seebeck ... ignored [INFO] [stdout] test teg::tests::test_single_leg_simulate_fixed_load_ratio_for_cpm ... ignored [INFO] [stdout] test teg::tests::test_single_leg_simulate_fixed_load_resistance_for_linear_elec_resi ... ignored [INFO] [stdout] test teg::tests::test_get_num_mesh ... ok [INFO] [stdout] test calc::tests::test_panic_integrate_simpson_when_not_odd_length - should panic ... ok [INFO] [stdout] test func::tests::test_panic_piecewise_function_const_ext_new - should panic ... ok [INFO] [stdout] test linalg::tests::test_panic_solve_gauss_when_size_mistmatch - should panic ... ok [INFO] [stdout] test interp::tests::test_panic_piecewise_linear_const_ext - should panic ... ok [INFO] [stdout] test linalg::tests::test_panic_solve_gauss_when_not_square - should panic ... ok [INFO] [stdout] test opt::tests::test_panic_line_search_strong_wolfe - should panic ... ok [INFO] [stdout] test interp::tests::test_panic_barycentric_polynomial_new - should panic ... ok [INFO] [stdout] test interp::tests::test_panic_piecewise_cubic_polynomial - should panic ... ok [INFO] [stdout] test interp::tests::test_panic_piecewise_cubic_polynomial_const_ext - should panic ... ok [INFO] [stdout] test tep::tests::test_tep_from_single_raw_data ... ok [INFO] [stderr] Doc-tests te1d [INFO] [stdout] test calc::tests::test_panic_integrate_simpson_when_small_length - should panic ... ok [INFO] [stdout] [INFO] [stdout] test result: ok. 19 passed; 0 failed; 10 ignored; 0 measured; 0 filtered out; finished in 0.27s [INFO] [stdout] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:12:26 [INFO] [stderr] | [INFO] [stderr] 12 | fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_parens)]` (part of `#[warn(unused)]`) on by default [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 12 - fn explicit_rk4_step(f: &(dyn Fn(f64, &ColVec) -> ColVec), x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stderr] 12 + fn explicit_rk4_step(f: &dyn Fn(f64, &ColVec) -> ColVec, x0: f64, y0: &ColVec, xf: f64) -> ColVec { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:49:25 [INFO] [stderr] | [INFO] [stderr] 49 | pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 49 - pub fn explicit_rk4(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stderr] 49 + pub fn explicit_rk4(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec) -> Array2 { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:96:29 [INFO] [stderr] | [INFO] [stderr] 96 | pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 96 - pub fn explicit_rk4_mut(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stderr] 96 + pub fn explicit_rk4_mut(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, y0: &ColVec, ys: &mut Array2::) { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/ode.rs:141:29 [INFO] [stderr] | [INFO] [stderr] 141 | pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 141 - pub fn explicit_rk4_fvp(f: &(dyn Fn(f64, &ColVec) -> ColVec), xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stderr] 141 + pub fn explicit_rk4_fvp(f: &dyn Fn(f64, &ColVec) -> ColVec, xs: &ColVec, yf: &ColVec) -> Array2 { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:167:26 [INFO] [stderr] | [INFO] [stderr] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] 167 + pub fn new(left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:167:62 [INFO] [stderr] | [INFO] [stderr] 167 | pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 167 - pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] 167 + pub fn new(left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, fixed_elec_cur: Option, area: f64) -> Self { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:228:41 [INFO] [stderr] | [INFO] [stderr] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] 228 + pub fn to_full_var(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/bc.rs:228:77 [INFO] [stderr] | [INFO] [stderr] 228 | pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 228 - pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] 228 + pub fn to_full_var(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, opt_var: &ColVec) -> FullOptVar { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:240:74 [INFO] [stderr] | [INFO] [stderr] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:240:110 [INFO] [stderr] | [INFO] [stderr] 240 | pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), tem... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 240 - pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 240 + pub fn simulate_fixed_elec_cur(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:250:91 [INFO] [stderr] | [INFO] [stderr] 250 | pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bounda... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:250:127 [INFO] [stderr] | [INFO] [stderr] 250 | ...ur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 250 - pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] 250 + pub fn simulate_fixed_elec_cur_with_manual_init(&self, fixed_elec_cur: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar ) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:277:88 [INFO] [stderr] | [INFO] [stderr] 277 | pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryC... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:277:124 [INFO] [stderr] | [INFO] [stderr] 277 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 277 - pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 277 + pub fn simulate_fixed_load_resistance(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:287:105 [INFO] [stderr] | [INFO] [stderr] 287 | pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:287:141 [INFO] [stderr] | [INFO] [stderr] 287 | ...ce: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 287 - pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 287 + pub fn simulate_fixed_load_resistance_with_manual_init(&self, fixed_load_resistance: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:320:78 [INFO] [stderr] | [INFO] [stderr] 320 | pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition),... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:320:114 [INFO] [stderr] | [INFO] [stderr] 320 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 320 - pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 320 + pub fn simulate_fixed_load_ratio(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, elec_cur_hint: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:334:95 [INFO] [stderr] | [INFO] [stderr] 334 | pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn Bo... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:334:131 [INFO] [stderr] | [INFO] [stderr] 334 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 334 - pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 334 + pub fn simulate_fixed_load_ratio_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:375:50 [INFO] [stderr] | [INFO] [stderr] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 375 + fn minimize_cost_by_shooting(&self, cost_f: &dyn Fn(&ColVec) -> f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:375:86 [INFO] [stderr] | [INFO] [stderr] 375 | fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCon... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:375:122 [INFO] [stderr] | [INFO] [stderr] 375 | ...-> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) ->... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 375 - fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 375 + fn minimize_cost_by_shooting(&self, cost_f: &(dyn Fn(&ColVec) -> f64), left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, converter: &OptVarConverter, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:427:87 [INFO] [stderr] | [INFO] [stderr] 427 | pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCo... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:427:123 [INFO] [stderr] | [INFO] [stderr] 427 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64,... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 427 - pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 427 + pub fn simulate_fixed_load_ratio_in_range(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:439:104 [INFO] [stderr] | [INFO] [stderr] 439 | pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc:... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:439:140 [INFO] [stderr] | [INFO] [stderr] 439 | ...io: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullO... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 439 - pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 439 + pub fn simulate_fixed_load_ratio_in_range_with_manual_init(&self, fixed_load_ratio: f64, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:457:55 [INFO] [stderr] | [INFO] [stderr] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 457 + pub fn maximize_power_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:457:91 [INFO] [stderr] | [INFO] [stderr] 457 | pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 457 - pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 457 + pub fn maximize_power_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:475:53 [INFO] [stderr] | [INFO] [stderr] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 475 + pub fn maximize_power_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:475:89 [INFO] [stderr] | [INFO] [stderr] 475 | pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_e... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 475 - pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 475 + pub fn maximize_power_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:487:70 [INFO] [stderr] | [INFO] [stderr] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:487:106 [INFO] [stderr] | [INFO] [stderr] 487 | pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_ele... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 487 - pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 487 + pub fn maximize_power_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:505:60 [INFO] [stderr] | [INFO] [stderr] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:505:96 [INFO] [stderr] | [INFO] [stderr] 505 | pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 505 - pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 505 + pub fn maximize_efficiency_auto_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:523:58 [INFO] [stderr] | [INFO] [stderr] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:523:94 [INFO] [stderr] | [INFO] [stderr] 523 | pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, ... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 523 - pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] 523 + pub fn maximize_efficiency_in_range(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, templ_hint: f64, tempr_hint: f64) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:535:75 [INFO] [stderr] | [INFO] [stderr] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &dyn BoundaryCondition, right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: unnecessary parentheses around type [INFO] [stderr] --> src/teg/mod.rs:535:111 [INFO] [stderr] | [INFO] [stderr] 535 | pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), mi... [INFO] [stderr] | ^ ^ [INFO] [stderr] | [INFO] [stderr] help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] 535 - pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &(dyn BoundaryCondition), min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] 535 + pub fn maximize_efficiency_in_range_with_manual_init(&self, left_bc: &(dyn BoundaryCondition), right_bc: &dyn BoundaryCondition, min_elec_cur: f64, max_elec_cur: f64, init_var: &FullOptVar) -> LegSimulationResult { [INFO] [stderr] | [INFO] [stderr] [INFO] [stderr] warning: 39 warnings emitted [INFO] [stdout] [INFO] [stderr] [INFO] [stdout] running 38 tests [INFO] [stdout] test src/interp.rs - interp::BarycentricPolynomial (line 16) ... ok [INFO] [stdout] test src/calc.rs - calc::is_close (line 160) ... ok [INFO] [stdout] test src/calc.rs - calc::central_diff (line 76) ... ok [INFO] [stdout] test src/bc.rs - bc::ConvectionBc (line 91) ... ok [INFO] [stdout] test src/calc.rs - calc::argmax (line 253) ... ok [INFO] [stdout] test src/calc.rs - calc::argmin (line 229) ... ok [INFO] [stdout] test src/calc.rs - calc::integrate_simpson (line 109) ... ok [INFO] [stdout] test src/calc.rs - calc::central_diff_grad (line 25) ... ok [INFO] [stdout] test src/lib.rs - (line 40) - compile ... ok [INFO] [stdout] test src/calc.rs - calc::max (line 211) ... ok [INFO] [stdout] test src/interp.rs - interp::PiecewiseCubicPolynomial (line 413) ... ok [INFO] [stdout] test src/calc.rs - calc::all_close (line 188) ... ok [INFO] [stdout] test src/interp.rs - interp::PiecewiseCubicPolynomialConstExtLinearPadding (line 141) ... ok [INFO] [stdout] test src/bc.rs - bc::FixedHeatFluxBc (line 57) ... ok [INFO] [stdout] test src/func.rs - func::ConstantFunction (line 362) ... ok [INFO] [stdout] test src/linalg.rs - linalg::solve_gauss (line 73) ... ok [INFO] [stdout] test src/func.rs - func::ExplicitFunction (line 318) ... ok [INFO] [stdout] test src/linalg.rs - linalg::LinalgErrorKind::fmt (line 23) ... ok [INFO] [stdout] test src/bc.rs - bc::FixedTempBc (line 24) ... ok [INFO] [stdout] test src/func.rs - func::Polynomial (line 126) ... ok [INFO] [stdout] test src/interp.rs - interp::PiecewiseCubicPolynomialConstExt (line 289) ... ok [INFO] [stdout] test src/linalg.rs - linalg::outer_product (line 220) ... ok [INFO] [stdout] test src/ode.rs - ode::explicit_rk4 (line 35) ... ok [INFO] [stdout] test src/linalg.rs - linalg::swap_rows (line 175) ... ok [INFO] [stdout] test src/opt.rs - opt::cost_rosenbrock (line 604) ... ok [INFO] [stdout] test src/opt.rs - opt::OptimizeErrorKind::fmt (line 34) ... ok [INFO] [stdout] test src/opt.rs - opt::minimize_bfgs (line 122) ... ok [INFO] [stdout] test src/linalg.rs - linalg::swap_cols (line 197) ... ok [INFO] [stdout] test src/interp.rs - interp::PiecewiseLinearConstExt (line 532) ... ok [INFO] [stdout] test src/func.rs - func::CustomPiecewiseFunctionConstExt (line 225) ... ok [INFO] [stdout] test src/ode.rs - ode::explicit_rk4_fvp (line 127) ... ok [INFO] [stdout] test src/opt.rs - opt::line_search_strong_wolfe (line 389) ... ok [INFO] [stdout] test src/opt.rs - opt::minimize_brent (line 484) ... ok [INFO] [stdout] test src/tep.rs - tep::Tep (line 16) ... ok [INFO] [stdout] test src/simul.rs - simul::SimulationErrorKind::fmt (line 34) ... ok [INFO] [stdout] test src/ode.rs - ode::explicit_rk4_mut (line 82) ... ok [INFO] [stdout] test src/teg/mod.rs - teg::SingleLeg (line 144) ... ok [INFO] [stdout] test src/opt.rs - opt::minimize_damped_bfgs (line 225) ... ok [INFO] [stdout] [INFO] [stdout] test result: ok. 38 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 3.06s [INFO] [stdout] [INFO] running `Command { std: "docker" "inspect" "bee531d18aaa13a2916099b43d9c23e8395f43a066ce20c77ff97d8dc7f5275e", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "bee531d18aaa13a2916099b43d9c23e8395f43a066ce20c77ff97d8dc7f5275e", kill_on_drop: false }` [INFO] [stdout] bee531d18aaa13a2916099b43d9c23e8395f43a066ce20c77ff97d8dc7f5275e