[INFO] fetching crate extract_rust_hdl_interface 0.2.0...
[INFO] testing extract_rust_hdl_interface-0.2.0 against master#cdb45c87e2cd43495379f7e867e3cc15dcee9f93 for pr-145838-1
[INFO] extracting crate extract_rust_hdl_interface 0.2.0 into /workspace/builds/worker-7-tc1/source
[INFO] started tweaking crates.io crate extract_rust_hdl_interface 0.2.0
[INFO] finished tweaking crates.io crate extract_rust_hdl_interface 0.2.0
[INFO] tweaked toml for crates.io crate extract_rust_hdl_interface 0.2.0 written to /workspace/builds/worker-7-tc1/source/Cargo.toml
[INFO] validating manifest of crates.io crate extract_rust_hdl_interface 0.2.0 on toolchain cdb45c87e2cd43495379f7e867e3cc15dcee9f93
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+cdb45c87e2cd43495379f7e867e3cc15dcee9f93" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+cdb45c87e2cd43495379f7e867e3cc15dcee9f93" "generate-lockfile" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]     Updating crates.io index
[INFO] [stderr]      Locking 46 packages to latest compatible versions
[INFO] [stderr]       Adding itertools v0.10.5 (available: v0.14.0)
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+cdb45c87e2cd43495379f7e867e3cc15dcee9f93" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]  Downloading crates ...
[INFO] [stderr]   Downloaded nom-tracable-macros v0.9.1
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[INFO] [stderr]   Downloaded sv-parser-parser v0.13.3
[INFO] [stderr]   Downloaded nom-packrat v0.7.0
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:7ad1b28ee6f5f7f699f6cf7015098d6ccdd96d6f2d78dd06228f5b4c9faf309c" "/opt/rustwide/cargo-home/bin/cargo" "+cdb45c87e2cd43495379f7e867e3cc15dcee9f93" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] e1b785135695d6458f98722f0d253c44c73c1947afa0f18e957dee47854bea8a
[INFO] running `Command { std: "docker" "start" "-a" "e1b785135695d6458f98722f0d253c44c73c1947afa0f18e957dee47854bea8a", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "e1b785135695d6458f98722f0d253c44c73c1947afa0f18e957dee47854bea8a", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "e1b785135695d6458f98722f0d253c44c73c1947afa0f18e957dee47854bea8a", kill_on_drop: false }`
[INFO] [stdout] e1b785135695d6458f98722f0d253c44c73c1947afa0f18e957dee47854bea8a
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:7ad1b28ee6f5f7f699f6cf7015098d6ccdd96d6f2d78dd06228f5b4c9faf309c" "/opt/rustwide/cargo-home/bin/cargo" "+cdb45c87e2cd43495379f7e867e3cc15dcee9f93" "build" "--frozen" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] e6c2dba6900a6d76f189d7ed1a657eb95b6e5b0bac721da4ff0b40dc24de4492
[INFO] running `Command { std: "docker" "start" "-a" "e6c2dba6900a6d76f189d7ed1a657eb95b6e5b0bac721da4ff0b40dc24de4492", kill_on_drop: false }`
[INFO] [stderr]    Compiling memchr v2.7.5
[INFO] [stderr]    Compiling syn v1.0.109
[INFO] [stderr]    Compiling syn v2.0.106
[INFO] [stderr]    Compiling bytecount v0.6.9
[INFO] [stderr]    Compiling str-concat v0.2.0
[INFO] [stderr]    Compiling nom v7.1.3
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[INFO] [stderr]    Compiling regex-automata v0.4.10
[INFO] [stderr]    Compiling nom_locate v4.2.0
[INFO] [stderr]    Compiling nom-greedyerror v0.5.0
[INFO] [stderr]    Compiling regex v1.11.2
[INFO] [stderr]    Compiling thiserror-impl v1.0.69
[INFO] [stderr]    Compiling sv-parser-macros v0.13.3
[INFO] [stderr]    Compiling nom-packrat-macros v0.7.0
[INFO] [stderr]    Compiling nom-tracable-macros v0.9.1
[INFO] [stderr]    Compiling nom-recursive-macros v0.5.1
[INFO] [stderr]    Compiling nom-recursive v0.5.1
[INFO] [stderr]    Compiling nom-tracable v0.9.1
[INFO] [stderr]    Compiling nom-packrat v0.7.0
[INFO] [stderr]    Compiling sv-parser-syntaxtree v0.13.3
[INFO] [stderr]    Compiling thiserror v1.0.69
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[INFO] [stderr]    Compiling sv-parser v0.13.3
[INFO] [stderr]    Compiling extract_rust_hdl_interface v0.2.0 (/opt/rustwide/workdir)
[INFO] [stdout] warning: unused import: `self::analyze_port_list::NetType`
[INFO] [stdout]   --> src/extract_verilog_interface.rs:14:9
[INFO] [stdout]    |
[INFO] [stdout] 14 | pub use self::analyze_port_list::NetType;
[INFO] [stdout]    |         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(unused_imports)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]     Finished `dev` profile [unoptimized + debuginfo] target(s) in 1m 28s
[INFO] running `Command { std: "docker" "inspect" "e6c2dba6900a6d76f189d7ed1a657eb95b6e5b0bac721da4ff0b40dc24de4492", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "e6c2dba6900a6d76f189d7ed1a657eb95b6e5b0bac721da4ff0b40dc24de4492", kill_on_drop: false }`
[INFO] [stdout] e6c2dba6900a6d76f189d7ed1a657eb95b6e5b0bac721da4ff0b40dc24de4492
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:7ad1b28ee6f5f7f699f6cf7015098d6ccdd96d6f2d78dd06228f5b4c9faf309c" "/opt/rustwide/cargo-home/bin/cargo" "+cdb45c87e2cd43495379f7e867e3cc15dcee9f93" "test" "--frozen" "--no-run" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] dd58a85344702b138949f780f00ae769f5529dfa5cda1f4f2073335e5dc4c376
[INFO] running `Command { std: "docker" "start" "-a" "dd58a85344702b138949f780f00ae769f5529dfa5cda1f4f2073335e5dc4c376", kill_on_drop: false }`
[INFO] [stdout] warning: unused import: `self::analyze_port_list::NetType`
[INFO] [stdout]   --> src/extract_verilog_interface.rs:14:9
[INFO] [stdout]    |
[INFO] [stdout] 14 | pub use self::analyze_port_list::NetType;
[INFO] [stdout]    |         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(unused_imports)]` (part of `#[warn(unused)]`) on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]    Compiling extract_rust_hdl_interface v0.2.0 (/opt/rustwide/workdir)
[INFO] [stderr]     Finished `test` profile [unoptimized + debuginfo] target(s) in 5.44s
[INFO] running `Command { std: "docker" "inspect" "dd58a85344702b138949f780f00ae769f5529dfa5cda1f4f2073335e5dc4c376", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "dd58a85344702b138949f780f00ae769f5529dfa5cda1f4f2073335e5dc4c376", kill_on_drop: false }`
[INFO] [stdout] dd58a85344702b138949f780f00ae769f5529dfa5cda1f4f2073335e5dc4c376
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:7ad1b28ee6f5f7f699f6cf7015098d6ccdd96d6f2d78dd06228f5b4c9faf309c" "/opt/rustwide/cargo-home/bin/cargo" "+cdb45c87e2cd43495379f7e867e3cc15dcee9f93" "test" "--frozen", kill_on_drop: false }`
[INFO] [stdout] fd37cf5ca2ac56fa4feaf4e7d3be292aa37c0a1fe7edf3c74b2bfa6ea9170cb3
[INFO] running `Command { std: "docker" "start" "-a" "fd37cf5ca2ac56fa4feaf4e7d3be292aa37c0a1fe7edf3c74b2bfa6ea9170cb3", kill_on_drop: false }`
[INFO] [stderr] warning: unused import: `self::analyze_port_list::NetType`
[INFO] [stderr]   --> src/extract_verilog_interface.rs:14:9
[INFO] [stderr]    |
[INFO] [stderr] 14 | pub use self::analyze_port_list::NetType;
[INFO] [stderr]    |         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_imports)]` (part of `#[warn(unused)]`) on by default
[INFO] [stderr] 
[INFO] [stderr] warning: `extract_rust_hdl_interface` (lib) generated 1 warning (run `cargo fix --lib -p extract_rust_hdl_interface` to apply 1 suggestion)
[INFO] [stderr]     Finished `test` profile [unoptimized + debuginfo] target(s) in 0.09s
[INFO] [stderr]      Running unittests src/lib.rs (/opt/rustwide/target/debug/deps/extract_rust_hdl_interface-cb25a88a93a0f91c)
[INFO] [stdout] 
[INFO] [stdout] running 68 tests
[INFO] [stdout] test extract_rust_hdl_interface::as_pascal_case::tests::allcaps_works_as_expected ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_pascal_case::tests::converts_snake_case_to_pascal_case ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_pascal_case::tests::converts_other_punctuation_to_uppercase ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_snake_case::tests::converts_camel_case_to_snake_case ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_snake_case::tests::removes_duplicate_underscores ... ok
[INFO] [stdout] test extract_rust_hdl_interface::convert_port_to_signal::tests::does_not_detect_clock_signal_if_its_too_wide ... ok
[INFO] [stdout] test extract_rust_hdl_interface::generate_verilog_body::tests::can_extract_the_interface_of_counter ... ok
[INFO] [stdout] test extract_rust_hdl_interface::generate_verilog_body::tests::puts_external_name_and_internal_name_in_the_right_places ... ok
[INFO] [stdout] test extract_rust_hdl_interface::convert_port_to_signal::tests::detects_basic_clock_signal_by_name ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_snake_case::tests::converts_other_punctuation_to_underscores ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_snake_case::tests::allcaps_works_as_expected ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_pascal_case::tests::removes_duplicate_underscores ... ok
[INFO] [stdout] test extract_rust_hdl_interface::as_snake_case::tests::removes_trailing_and_leading_underscores ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_data_size::tests::works_with_ansi_without_range ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::finding_the_directon_of_named_ports_works_with_ansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_data_size::tests::works_with_ansi_with_range ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_data_size::tests::works_with_nonansi_with_range ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::works_with_ansi_inout_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::finding_the_directon_of_named_ports_works_with_nonansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_data_size::tests::works_with_nonansi_without_range ... ok
[INFO] [stdout] test extract_rust_hdl_interface::convert_port_to_signal::tests::converting_a_output_port_makes_the_signal_driven ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_data_size::tests::finding_the_directon_of_named_ports_works_with_ansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::works_with_nonansi_inout_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::works_with_ansi_output_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::works_with_ansi_input_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::works_with_ansi_with_reg ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::works_with_ansi_with_wire ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_identifiers::tests::finding_the_directon_of_named_ports_works_with_ansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::finding_the_directon_of_named_ports_works_with_ansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_identifiers::tests::finding_the_directon_of_named_ports_works_with_nonansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::works_with_ansi_without_specification ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_a_module_without_ports ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::works_with_nonansi_input_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::works_with_nonansi_with_wire ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_a_sized_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_a_single_bit_sized_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_a_basic_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_an_input_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_an_output_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_specified_reg_net_type ... ok
[INFO] [stdout] test extract_rust_hdl_interface::convert_port_to_signal::tests::converting_a_port_to_a_signal_works ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_specified_wire_net_type ... ok
[INFO] [stdout] test extract_rust_hdl_interface::convert_port_to_signal::tests::converting_a_port_to_signal_enforces_snake_case ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_data_size::tests::finding_the_directon_of_named_ports_works_with_nonansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_a_basic_nonansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::find_module_by_name::tests::should_work_with_a_single_module ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::works_with_nonansi_with_reg ... ok
[INFO] [stdout] test extract_verilog_interface::get_constant_number::tests::works_without_number ... ok
[INFO] [stdout] test extract_verilog_interface::get_constant_number::tests::works_with_binary_numbers ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_direction::tests::works_with_nonansi_output_port ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_identifiers::tests::should_work_with_a_basic_module ... ok
[INFO] [stdout] test extract_verilog_interface::find_module_by_name::tests::should_return_none_if_module_does_not_exist ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_an_input_output_port ... ok
[INFO] [stdout] test extract_verilog_interface::get_constant_number::tests::should_return_first_number_constant ... ok
[INFO] [stdout] test extract_verilog_interface::get_constant_number::tests::works_with_hex_numbers ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::tests::should_work_with_nonansi_module ... ok
[INFO] [stdout] test extract_verilog_interface::get_constant_number::tests::works_with_octal_numbers ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::works_with_nonansi_without_specification ... ok
[INFO] [stdout] test extract_verilog_interface::get_identifier::tests::should_get_identifier_of_module ... ok
[INFO] [stdout] test extract_rust_hdl_interface::tests::generating_rust_hdl_module_struct_from_counter_works ... ok
[INFO] [stdout] test extract_verilog_interface::find_module_by_name::tests::should_be_able_to_find_a_module_surrounded_by_other_modules ... ok
[INFO] [stdout] test verilog_parser::tests::parsing_test ... ok
[INFO] [stdout] test extract_verilog_interface::get_identifier::tests::should_return_none_without_identifier ... ok
[INFO] [stdout] test extract_verilog_interface::get_identifier::tests::should_get_identifier_of_reg ... ok
[INFO] [stdout] test extract_rust_hdl_interface::tests::renaming_interface_of_the_rusthdl_module_works ... ok
[INFO] [stdout] test verilog_parser::tests::parsed_string_should_have_correct_module ... ok
[INFO] [stdout] test extract_verilog_interface::tests::can_extract_the_interface_of_counter ... ok
[INFO] [stdout] test extract_verilog_interface::analyze_port_list::get_port_net_type::tests::finding_the_directon_of_named_ports_works_with_nonansi_module ... ok
[INFO] [stdout] 
[INFO] [stdout] test result: ok. 68 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.27s
[INFO] [stdout] 
[INFO] [stderr]    Doc-tests extract_rust_hdl_interface
[INFO] [stdout] 
[INFO] [stdout] running 0 tests
[INFO] [stdout] 
[INFO] [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.00s
[INFO] [stdout] 
[INFO] running `Command { std: "docker" "inspect" "fd37cf5ca2ac56fa4feaf4e7d3be292aa37c0a1fe7edf3c74b2bfa6ea9170cb3", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "fd37cf5ca2ac56fa4feaf4e7d3be292aa37c0a1fe7edf3c74b2bfa6ea9170cb3", kill_on_drop: false }`
[INFO] [stdout] fd37cf5ca2ac56fa4feaf4e7d3be292aa37c0a1fe7edf3c74b2bfa6ea9170cb3