[INFO] cloning repository https://github.com/bjoernQ/svd2rust_test [INFO] running `Command { std: "git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/bjoernQ/svd2rust_test" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FbjoernQ%2Fsvd2rust_test", kill_on_drop: false }` [INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FbjoernQ%2Fsvd2rust_test'... [INFO] running `Command { std: "git" "rev-parse" "HEAD", kill_on_drop: false }` [INFO] [stdout] 810047a926fd758f3639c7e2f1f1fa0674f4ba50 [INFO] checking bjoernQ/svd2rust_test against master#ca77504943887037504c7fc0b9bf06dab3910373 for pr-145181 [INFO] running `Command { std: "git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FbjoernQ%2Fsvd2rust_test" "/workspace/builds/worker-4-tc1/source", kill_on_drop: false }` [INFO] [stderr] Cloning into '/workspace/builds/worker-4-tc1/source'... [INFO] [stderr] done. [INFO] started tweaking git repo https://github.com/bjoernQ/svd2rust_test [INFO] finished tweaking git repo https://github.com/bjoernQ/svd2rust_test [INFO] tweaked toml for git repo https://github.com/bjoernQ/svd2rust_test written to /workspace/builds/worker-4-tc1/source/Cargo.toml [INFO] validating manifest of git repo https://github.com/bjoernQ/svd2rust_test on toolchain ca77504943887037504c7fc0b9bf06dab3910373 [INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+ca77504943887037504c7fc0b9bf06dab3910373" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }` [INFO] crate git repo https://github.com/bjoernQ/svd2rust_test already has a lockfile, it will not be regenerated [INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+ca77504943887037504c7fc0b9bf06dab3910373" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }` [INFO] [stderr] Updating crates.io index [INFO] [stderr] Downloading crates ... [INFO] [stderr] Downloaded svd-parser v0.13.4 [INFO] [stderr] Downloaded clap_conf v0.1.5 [INFO] [stderr] Downloaded svd-rs v0.13.2 [INFO] [stderr] Downloaded svd2rust v0.23.1 [INFO] [stderr] Downloaded xtensa-lx v0.7.0 [INFO] [stderr] Downloaded svd2rust v0.24.0 [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:ae6f63d130afcfff7f91f5ba9fdb2a74d52830289c6a2ea2d23a94dcfb480a0d" "/opt/rustwide/cargo-home/bin/cargo" "+ca77504943887037504c7fc0b9bf06dab3910373" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }` [INFO] [stdout] 854415b00b41f98c9737a884f5e51f1302355bf264c99553614226892821e2b5 [INFO] running `Command { std: "docker" "start" "-a" "854415b00b41f98c9737a884f5e51f1302355bf264c99553614226892821e2b5", kill_on_drop: false }` [INFO] running `Command { std: "docker" "inspect" "854415b00b41f98c9737a884f5e51f1302355bf264c99553614226892821e2b5", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "854415b00b41f98c9737a884f5e51f1302355bf264c99553614226892821e2b5", kill_on_drop: false }` [INFO] [stdout] 854415b00b41f98c9737a884f5e51f1302355bf264c99553614226892821e2b5 [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:ae6f63d130afcfff7f91f5ba9fdb2a74d52830289c6a2ea2d23a94dcfb480a0d" "/opt/rustwide/cargo-home/bin/cargo" "+ca77504943887037504c7fc0b9bf06dab3910373" "check" "--frozen" "--all" "--all-targets" "--message-format=json", kill_on_drop: false }` [INFO] [stdout] 71b25fff291a39d480b5890f6eb3705a02eaaa2ac9d4688d84691174a4a48069 [INFO] running `Command { std: "docker" "start" "-a" "71b25fff291a39d480b5890f6eb3705a02eaaa2ac9d4688d84691174a4a48069", kill_on_drop: false }` [INFO] [stderr] Compiling proc-macro2 v1.0.39 [INFO] [stderr] Compiling unicode-ident v1.0.1 [INFO] [stderr] Compiling syn v1.0.96 [INFO] [stderr] Compiling autocfg v1.1.0 [INFO] [stderr] Compiling serde_derive v1.0.137 [INFO] [stderr] Compiling serde v1.0.137 [INFO] [stderr] Compiling memchr v2.5.0 [INFO] [stderr] Compiling libc v0.2.126 [INFO] [stderr] Compiling anyhow v1.0.57 [INFO] [stderr] Compiling regex-syntax v0.6.26 [INFO] [stderr] Compiling log v0.4.17 [INFO] [stderr] Compiling unicode-width v0.1.9 [INFO] [stderr] Compiling vec_map v0.8.2 [INFO] [stderr] Compiling hashbrown v0.11.2 [INFO] [stderr] Compiling xmlparser v0.13.3 [INFO] [stderr] Compiling once_cell v1.12.0 [INFO] [stderr] Compiling textwrap v0.11.0 [INFO] [stderr] Compiling linked-hash-map v0.5.4 [INFO] [stderr] Compiling cfg-if v1.0.0 [INFO] [stderr] Compiling ansi_term v0.12.1 [INFO] [stderr] Compiling ryu v1.0.10 [INFO] [stderr] Compiling bitflags v1.3.2 [INFO] [stderr] Compiling serde_json v1.0.81 [INFO] [stderr] Compiling strsim v0.8.0 [INFO] [stderr] Compiling yaml-rust v0.4.5 [INFO] [stderr] Compiling termcolor v1.1.3 [INFO] [stderr] Compiling roxmltree v0.14.1 [INFO] [stderr] Compiling indexmap v1.8.2 [INFO] [stderr] Compiling lock_api v0.4.7 [INFO] [stderr] Checking scopeguard v1.1.0 [INFO] [stderr] Compiling humantime v2.1.0 [INFO] [stderr] Compiling itoa v1.0.2 [INFO] [stderr] Compiling xtensa-lx v0.7.0 [INFO] [stderr] Compiling inflections v1.1.1 [INFO] [stderr] Compiling svd2rust v0.23.1 [INFO] [stderr] Compiling cast v0.3.0 [INFO] [stderr] Compiling svd2rust v0.24.0 [INFO] [stderr] Checking mutex-trait v0.2.0 [INFO] [stderr] Checking r0 v1.0.0 [INFO] [stderr] Compiling quote v1.0.18 [INFO] [stderr] Checking bare-metal v1.0.0 [INFO] [stderr] Compiling aho-corasick v0.7.18 [INFO] [stderr] Compiling atty v0.2.14 [INFO] [stderr] Checking spin v0.9.3 [INFO] [stderr] Checking vcell v0.1.3 [INFO] [stderr] Compiling clap v2.34.0 [INFO] [stderr] Checking generated23 v0.1.0 (/opt/rustwide/workdir/generated23) [INFO] [stderr] Checking generated24 v0.1.0 (/opt/rustwide/workdir/generated24) [INFO] [stdout] warning: lint `const_err` has been removed: converted into hard error, see issue #71800 for more information [INFO] [stdout] --> generated23/src/lib.rs:1:562 [INFO] [stdout] | [INFO] [stdout] 1 | ...tory]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [den... [INFO] [stdout] | ^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(renamed_and_removed_lints)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: lint `private_in_public` has been removed: replaced with another group of lints, see RFC for more information [INFO] [stdout] --> generated23/src/lib.rs:1:847 [INFO] [stdout] | [INFO] [stdout] 1 | ...ts)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_a... [INFO] [stdout] | ^^^^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unexpected `cfg` condition value: `rt` [INFO] [stdout] --> generated23/src/lib.rs:1:8804 [INFO] [stdout] | [INFO] [stdout] 1 | ...& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _han... [INFO] [stdout] | ^^^^^^^^^^^^^^ help: remove the condition [INFO] [stdout] | [INFO] [stdout] = note: no expected values for `feature` [INFO] [stdout] = help: consider adding `rt` as a feature in `Cargo.toml` [INFO] [stdout] = note: see for more information about checking conditional configuration [INFO] [stdout] = note: `#[warn(unexpected_cfgs)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unexpected `cfg` condition value: `rt` [INFO] [stdout] --> generated23/src/lib.rs:1:8953 [INFO] [stdout] | [INFO] [stdout] 1 | ...xtern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _r... [INFO] [stdout] | ^^^^^^^^^^^^^^ help: remove the condition [INFO] [stdout] | [INFO] [stdout] = note: no expected values for `feature` [INFO] [stdout] = help: consider adding `rt` as a feature in `Cargo.toml` [INFO] [stdout] = note: see for more information about checking conditional configuration [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: lint `const_err` has been removed: converted into hard error, see issue #71800 for more information [INFO] [stdout] --> generated24/src/lib.rs:1:562 [INFO] [stdout] | [INFO] [stdout] 1 | ...tory]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [den... [INFO] [stdout] | ^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(renamed_and_removed_lints)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: lint `private_in_public` has been removed: replaced with another group of lints, see RFC for more information [INFO] [stdout] --> generated24/src/lib.rs:1:847 [INFO] [stdout] | [INFO] [stdout] 1 | ...ts)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_a... [INFO] [stdout] | ^^^^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unexpected `cfg` condition value: `rt` [INFO] [stdout] --> generated24/src/lib.rs:1:17320 [INFO] [stdout] | [INFO] [stdout] 1 | ...false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _han... [INFO] [stdout] | ^^^^^^^^^^^^^^ help: remove the condition [INFO] [stdout] | [INFO] [stdout] = note: no expected values for `feature` [INFO] [stdout] = help: consider adding `rt` as a feature in `Cargo.toml` [INFO] [stdout] = note: see for more information about checking conditional configuration [INFO] [stdout] = note: `#[warn(unexpected_cfgs)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: unexpected `cfg` condition value: `rt` [INFO] [stdout] --> generated24/src/lib.rs:1:17469 [INFO] [stdout] | [INFO] [stdout] 1 | ...xtern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _r... [INFO] [stdout] | ^^^^^^^^^^^^^^ help: remove the condition [INFO] [stdout] | [INFO] [stdout] = note: no expected values for `feature` [INFO] [stdout] = help: consider adding `rt` as a feature in `Cargo.toml` [INFO] [stdout] = note: see for more information about checking conditional configuration [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:15442 [INFO] [stdout] | [INFO] [stdout] 1 | ...safe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:15661 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 ... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:15864 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 ... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:16067 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 ... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:16270 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:16474 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 1... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:16679 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 1... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:16884 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 2... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:17089 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set t... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W<'_> { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:17294 [INFO] [stdout] | [INFO] [stdout] 1 | ...safe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # ... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:17516 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 ... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:17718 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 ... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:17920 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:18123 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 1... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:18327 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 1... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:18531 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 1... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:18735 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 2... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:18939 [INFO] [stdout] | [INFO] [stdout] 1 | ...ays)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set t... [INFO] [stdout] | ^^^^^^^^^^ ------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W<'_> { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:19138 [INFO] [stdout] | [INFO] [stdout] 1 | ...ub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:19348 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Se... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:19538 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Se... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:19728 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - S... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:22148 [INFO] [stdout] | [INFO] [stdout] 1 | ...end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set thi... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W <'_, O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:19919 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - ... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:22345 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set thi... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:22542 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set thi... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:20111 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - ... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:20303 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - ... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:22739 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set thi... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:20495 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - ... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:22936 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set th... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:23134 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set t... [INFO] [stdout] | ^^^^^^^^^^ -------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:20687 [INFO] [stdout] | [INFO] [stdout] 1 | ... (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this ... [INFO] [stdout] | ^^^^^^^^^^ ---------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W<'_> { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:20908 [INFO] [stdout] | [INFO] [stdout] 1 | ...h_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 ... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W<'_> { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:23333 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set t... [INFO] [stdout] | ^^^^^^^^^^ -------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:23532 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set t... [INFO] [stdout] | ^^^^^^^^^^ -------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:23731 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit t... [INFO] [stdout] | ^^^^^^^^^^ -------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W <'_, 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:23947 [INFO] [stdout] | [INFO] [stdout] 1 | ...end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set thi... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W <'_, O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:21162 [INFO] [stdout] | [INFO] [stdout] 1 | ... fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W<'_> { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:21400 [INFO] [stdout] | [INFO] [stdout] 1 | ... fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W<'_> { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:24143 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set thi... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W <'_, 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:24339 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set thi... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W <'_, 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:21638 [INFO] [stdout] | [INFO] [stdout] 1 | ... fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W<'_> { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:21876 [INFO] [stdout] | [INFO] [stdout] 1 | ... fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W<'_> { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:24535 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set th... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W <'_, 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated23/src/lib.rs:1:22114 [INFO] [stdout] | [INFO] [stdout] 1 | ... fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc... [INFO] [stdout] | ^^^^^^^^^^ ------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.23.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.23.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub struct FieldReader < U > { pub (crate) bits : U , } impl < U > FieldReader < U > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , } } # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , T > PartialEq < T > for FieldReader < U > where U : PartialEq , T : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & T) -> bool { self . bits . eq (& (* other) . into ()) } } impl FieldReader < bool > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub struct CH_TX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub struct CH_RX_END_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_RX_END_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub struct CH_ERR_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_ERR_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub struct CH_TX_THR_EVENT_INT_CLR_W < 'a > { w : & 'a mut W , offset : usize , } impl < 'a > CH_TX_THR_EVENT_INT_CLR_W < 'a > { # [doc = r"Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> & 'a mut W { self . bit (true) } # [doc = r"Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> & 'a mut W { self . bit (false) } # [doc = r"Writes raw bits to the field"] # [inline (always)] pub fn bit (self , value : bool) -> & 'a mut W { self . w . bits = (self . w . bits & ! (1 << self . offset)) | ((value as u32 & 1) << self . offset) ; self . w } } impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr (& mut self , n : usize) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : n * 3 } } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 0 } } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 3 } } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 6 } } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 9 } } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 12 } } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 15 } } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 18 } } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W { CH_TX_END_INT_CLR_W { w : self , offset : 21 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr (& mut self , n : usize) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : n * 3 + 1 } } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 1 } } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 4 } } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 7 } } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 10 } } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 13 } } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 16 } } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 19 } } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W { CH_RX_END_INT_CLR_W { w : self , offset : 22 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr (& mut self , n : usize) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : n * 3 + 2 } } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 2 } } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 5 } } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 8 } } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 11 } } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 14 } } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 17 } } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 20 } } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W { CH_ERR_INT_CLR_W { w : self , offset : 23 } } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr (& mut self , n : usize) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : n + 24 } } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 24 } } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 25 } } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 26 } } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 27 } } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W<'_> { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 28 } } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 29 } } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 30 } } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W { CH_TX_THR_EVENT_INT_CLR_W { w : self , offset : 31 } } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | ++++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: hiding a lifetime that's elided elsewhere is confusing [INFO] [stdout] --> generated24/src/lib.rs:1:24732 [INFO] [stdout] | [INFO] [stdout] 1 | ...)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set t... [INFO] [stdout] | ^^^^^^^^^^ -------------------------- the same lifetime is hidden here [INFO] [stdout] | | [INFO] [stdout] | the lifetime is elided here [INFO] [stdout] | [INFO] [stdout] = help: the same lifetime is referred to in inconsistent ways, making the signature confusing [INFO] [stdout] help: use `'_` for type paths [INFO] [stdout] | [INFO] [stdout] 1 | # ! [doc = "Peripheral access API for TEST microcontrollers (generated using svd2rust v0.24.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.24.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] # ! [deny (const_err)] # ! [deny (dead_code)] # ! [deny (improper_ctypes)] # ! [deny (missing_docs)] # ! [deny (no_mangle_generic_items)] # ! [deny (non_shorthand_field_patterns)] # ! [deny (overflowing_literals)] # ! [deny (path_statements)] # ! [deny (patterns_in_fns_without_body)] # ! [deny (private_in_public)] # ! [deny (unconditional_recursion)] # ! [deny (unused_allocation)] # ! [deny (unused_comparisons)] # ! [deny (unused_parens)] # ! [deny (while_true)] # ! [allow (non_camel_case_types)] # ! [allow (non_snake_case)] # ! [no_std] use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS : u8 = 3 ; # [allow (unused_imports)] use generic :: * ; # [doc = r"Common register and bit access and modify traits"] pub mod generic { use core :: marker ; # [doc = " Raw register type"] pub trait RegisterSpec { # [doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux : Copy ; } # [doc = " Trait implemented by readable registers to enable the `read` method."] # [doc = ""] # [doc = " Registers marked with `Writable` can be also `modify`'ed."] pub trait Readable : RegisterSpec { # [doc = " Result from a call to `read` and argument to `modify`."] type Reader : From < R < Self > > + core :: ops :: Deref < Target = R < Self > > ; } # [doc = " Trait implemented by writeable registers."] # [doc = ""] # [doc = " This enables the `write`, `write_with_zero` and `reset` methods."] # [doc = ""] # [doc = " Registers marked with `Readable` can be also `modify`'ed."] pub trait Writable : RegisterSpec { # [doc = " Writer type argument to `write`, et al."] type Writer : From < W < Self > > + core :: ops :: DerefMut < Target = W < Self > > ; } # [doc = " Reset value of the register."] # [doc = ""] # [doc = " This value is the initial value for the `write` method. It can also be directly written to the"] # [doc = " register by using the `reset` method."] pub trait Resettable : RegisterSpec { # [doc = " Reset value of the register."] fn reset_value () -> Self :: Ux ; } # [doc = " This structure provides volatile access to registers."] # [repr (transparent)] pub struct Reg < REG : RegisterSpec > { register : vcell :: VolatileCell < REG :: Ux > , _marker : marker :: PhantomData < REG > , } unsafe impl < REG : RegisterSpec > Send for Reg < REG > where REG :: Ux : Send { } impl < REG : RegisterSpec > Reg < REG > { # [doc = " Returns the underlying memory address of register."] # [doc = ""] # [doc = " ```ignore"] # [doc = " let reg_ptr = periph.reg.as_ptr();"] # [doc = " ```"] # [inline (always)] pub fn as_ptr (& self) -> * mut REG :: Ux { self . register . as_ptr () } } impl < REG : Readable > Reg < REG > { # [doc = " Reads the contents of a `Readable` register."] # [doc = ""] # [doc = " You can read the raw contents of a register by using `bits`:"] # [doc = " ```ignore"] # [doc = " let bits = periph.reg.read().bits();"] # [doc = " ```"] # [doc = " or get the content of a particular field of a register:"] # [doc = " ```ignore"] # [doc = " let reader = periph.reg.read();"] # [doc = " let bits = reader.field1().bits();"] # [doc = " let flag = reader.field2().bit_is_set();"] # [doc = " ```"] # [inline (always)] pub fn read (& self) -> REG :: Reader { REG :: Reader :: from (R { bits : self . register . get () , _reg : marker :: PhantomData , }) } } impl < REG : Resettable + Writable > Reg < REG > { # [doc = " Writes the reset value to `Writable` register."] # [doc = ""] # [doc = " Resets the register to its initial state."] # [inline (always)] pub fn reset (& self) { self . register . set (REG :: reset_value ()) } # [doc = " Writes bits to a `Writable` register."] # [doc = ""] # [doc = " You can write raw bits into a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] # [doc = " ```"] # [doc = " or write only the fields you need:"] # [doc = " ```ignore"] # [doc = " periph.reg.write(|w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " In the latter case, other fields will be set to their reset value."] # [inline (always)] pub fn write < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set (f (& mut REG :: Writer :: from (W { bits : REG :: reset_value () , _reg : marker :: PhantomData , })) . bits ,) ; } } impl < REG : Writable > Reg < REG > where REG :: Ux : Default , { # [doc = " Writes 0 to a `Writable` register."] # [doc = ""] # [doc = " Similar to `write`, but unused bits will contain 0."] # [inline (always)] pub unsafe fn write_with_zero < F > (& self , f : F) where F : FnOnce (& mut REG :: Writer) -> & mut W < REG > { self . register . set ((* f (& mut REG :: Writer :: from (W { bits : REG :: Ux :: default () , _reg : marker :: PhantomData , }))) . bits ,) ; } } impl < REG : Readable + Writable > Reg < REG > { # [doc = " Modifies the contents of the register by reading and then writing it."] # [doc = ""] # [doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|r, w| unsafe { w.bits("] # [doc = " r.bits() | 3"] # [doc = " ) });"] # [doc = " ```"] # [doc = " or"] # [doc = " ```ignore"] # [doc = " periph.reg.modify(|_, w| w"] # [doc = " .field1().bits(newfield1bits)"] # [doc = " .field2().set_bit()"] # [doc = " .field3().variant(VARIANT)"] # [doc = " );"] # [doc = " ```"] # [doc = " Other fields will have the value they had before the call to `modify`."] # [inline (always)] pub fn modify < F > (& self , f : F) where for < 'w > F : FnOnce (& REG :: Reader , & 'w mut REG :: Writer) -> & 'w mut W < REG > { let bits = self . register . get () ; self . register . set (f (& REG :: Reader :: from (R { bits , _reg : marker :: PhantomData , }) , & mut REG :: Writer :: from (W { bits , _reg : marker :: PhantomData , }) ,) . bits ,) ; } } # [doc = " Register reader."] # [doc = ""] # [doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] # [doc = " method."] pub struct R < REG : RegisterSpec + ? Sized > { pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > R < REG > { # [doc = " Reads raw bits from register."] # [inline (always)] pub fn bits (& self) -> REG :: Ux { self . bits } } impl < REG : RegisterSpec , FI > PartialEq < FI > for R < REG > where REG :: Ux : PartialEq , FI : Copy + Into < REG :: Ux > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } # [doc = " Register writer."] # [doc = ""] # [doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub struct W < REG : RegisterSpec + ? Sized > { # [doc = "Writable bits"] pub (crate) bits : REG :: Ux , _reg : marker :: PhantomData < REG > , } impl < REG : RegisterSpec > W < REG > { # [doc = " Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : REG :: Ux) -> & mut Self { self . bits = bits ; self } } # [doc (hidden)] pub struct FieldReaderRaw < U , T > { pub (crate) bits : U , _reg : marker :: PhantomData < T > , } impl < U , FI > FieldReaderRaw < U , FI > where U : Copy , { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : U) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitReaderRaw < T > { pub (crate) bits : bool , _reg : marker :: PhantomData < T > , } impl < FI > BitReaderRaw < FI > { # [doc = " Creates a new instance of the reader."] # [allow (unused)] # [inline (always)] pub (crate) fn new (bits : bool) -> Self { Self { bits , _reg : marker :: PhantomData , } } } # [doc = " Field reader."] # [doc = ""] # [doc = " Result of the `read` methods of fields."] pub type FieldReader < U , FI > = FieldReaderRaw < U , FI > ; # [doc = " Bit-wise field reader"] pub type BitReader < FI > = BitReaderRaw < FI > ; impl < U , FI > FieldReader < U , FI > where U : Copy , { # [doc = " Reads raw bits from field."] # [inline (always)] pub fn bits (& self) -> U { self . bits } } impl < U , FI > PartialEq < FI > for FieldReader < U , FI > where U : PartialEq , FI : Copy + Into < U > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > PartialEq < FI > for BitReader < FI > where FI : Copy + Into < bool > , { # [inline (always)] fn eq (& self , other : & FI) -> bool { self . bits . eq (& (* other) . into ()) } } impl < FI > BitReader < FI > { # [doc = " Value of the field as raw bits."] # [inline (always)] pub fn bit (& self) -> bool { self . bits } # [doc = " Returns `true` if the bit is clear (0)."] # [inline (always)] pub fn bit_is_clear (& self) -> bool { ! self . bit () } # [doc = " Returns `true` if the bit is set (1)."] # [inline (always)] pub fn bit_is_set (& self) -> bool { self . bit () } } # [doc (hidden)] pub struct Safe ; # [doc (hidden)] pub struct Unsafe ; # [doc (hidden)] pub struct FieldWriterRaw < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (N , FI , Safety) > , } impl < 'a , U , REG , N , FI , Safety , const WI : u8 , const O : u8 > FieldWriterRaw < 'a , U , REG , N , FI , Safety , WI , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc (hidden)] pub struct BitWriterRaw < 'a , U , REG , FI , M , const O : u8 > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { pub (crate) w : & 'a mut REG :: Writer , _field : marker :: PhantomData < (FI , M) > , } impl < 'a , U , REG , FI , M , const O : u8 > BitWriterRaw < 'a , U , REG , FI , M , O > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < bool > , { # [doc = " Creates a new instance of the writer"] # [allow (unused)] # [inline (always)] pub (crate) fn new (w : & 'a mut REG :: Writer) -> Self { Self { w , _field : marker :: PhantomData , } } } # [doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Unsafe , WI , O > ; # [doc = " Write field Proxy with safe `bits`"] pub type FieldWriterSafe < 'a , U , REG , N , FI , const WI : u8 , const O : u8 > = FieldWriterRaw < 'a , U , REG , N , FI , Safe , WI , O > ; impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } impl < 'a , U , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe < 'a , U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = U > , FI : Into < N > , { # [doc = " Field width"] pub const WIDTH : u8 = WI ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } macro_rules ! bit_proxy { ($ writer : ident , $ mwv : ident) => { # [doc (hidden)] pub struct $ mwv ; # [doc = " Bit-wise write field proxy"] pub type $ writer <'a , U , REG , FI , const O : u8 > = BitWriterRaw <'a , U , REG , FI , $ mwv , O >; impl <'a , U , REG , FI , const OF : u8 > $ writer <'a , U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = U >, FI : Into < bool >, { # [doc = " Field width"] pub const WIDTH : u8 = 1 ; # [doc = " Field offset"] pub const OFFSET : u8 = OF ; } } } macro_rules ! impl_bit_proxy { ($ writer : ident , $ U : ty) => { impl <'a , REG , FI , const OF : u8 > $ writer <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Writes bit to the field"] # [inline (always)] pub fn bit (self , value : bool) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (1 << { OF })) | ((<$ U >:: from (value) & 1) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bit (variant . into ()) } } } } bit_proxy ! (BitWriter , BitM) ; bit_proxy ! (BitWriter1S , Bit1S) ; bit_proxy ! (BitWriter0C , Bit0C) ; bit_proxy ! (BitWriter1C , Bit1C) ; bit_proxy ! (BitWriter0S , Bit0S) ; bit_proxy ! (BitWriter1T , Bit1T) ; bit_proxy ! (BitWriter0T , Bit0T) ; macro_rules ! impl_proxy { ($ U : ty) => { impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriter <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [doc = ""] # [doc = " # Safety"] # [doc = ""] # [doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { unsafe { self . bits (variant . into ()) } } } impl <'a , REG , N , FI , const WI : u8 , const OF : u8 > FieldWriterSafe <'a , $ U , REG , N , FI , WI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, N : Into <$ U >, FI : Into < N >, { const MASK : $ U = <$ U >:: MAX >> (<$ U >:: MAX . leading_ones () as u8 - { WI }) ; # [doc = " Writes raw bits to the field"] # [inline (always)] pub fn bits (self , value : N) -> &'a mut REG :: Writer { self . w . bits = (self . w . bits & ! (Self :: MASK << { OF })) | ((value . into () & Self :: MASK) << { OF }) ; self . w } # [doc = " Writes `variant` to the field"] # [inline (always)] pub fn variant (self , variant : FI) -> &'a mut REG :: Writer { self . bits (variant . into ()) } } impl_bit_proxy ! (BitWriter , $ U) ; impl_bit_proxy ! (BitWriter1S , $ U) ; impl_bit_proxy ! (BitWriter0C , $ U) ; impl_bit_proxy ! (BitWriter1C , $ U) ; impl_bit_proxy ! (BitWriter0S , $ U) ; impl_bit_proxy ! (BitWriter1T , $ U) ; impl_bit_proxy ! (BitWriter0T , $ U) ; impl <'a , REG , FI , const OF : u8 > BitWriter <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Sets the field bit"] # [inline (always)] pub fn set_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = " Clears the field bit"] # [inline (always)] pub fn clear_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1C <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Clears the field bit by passing one"] # [inline (always)] pub fn clear_bit_by_one (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0S <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Sets the field bit by passing zero"] # [inline (always)] pub fn set_bit_by_zero (self) -> &'a mut REG :: Writer { self . bit (false) } } impl <'a , REG , FI , const OF : u8 > BitWriter1T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing one"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (true) } } impl <'a , REG , FI , const OF : u8 > BitWriter0T <'a , $ U , REG , FI , OF > where REG : Writable + RegisterSpec < Ux = $ U >, FI : Into < bool >, { # [doc = "Toggle the field bit by passing zero"] # [inline (always)] pub fn toggle_bit (self) -> &'a mut REG :: Writer { self . bit (false) } } } } impl_proxy ! (u32) ; } # [cfg (feature = "rt")] extern "C" { fn RMT () ; } # [doc (hidden)] pub union Vector { pub _handler : unsafe extern "C" fn () , _reserved : u32 , } # [cfg (feature = "rt")] # [doc (hidden)] pub static __INTERRUPTS : [Vector ; 48] = [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : RMT } ,] ; # [doc = r"Enumeration of all the interrupts."] # [derive (Copy , Clone , Debug , PartialEq , Eq)] # [repr (u16)] pub enum Interrupt { # [doc = "47 - RMT"] RMT = 47 , } unsafe impl xtensa_lx :: interrupt :: InterruptNumber for Interrupt { # [inline (always)] fn number (self) -> u16 { self as u16 } } # [doc = r" TryFromInterruptError"] # [derive (Debug , Copy , Clone)] pub struct TryFromInterruptError (()) ; impl Interrupt { # [doc = r" Attempt to convert a given value into an `Interrupt`"] # [inline] pub fn try_from (value : u16) -> Result < Self , TryFromInterruptError > { match value { 47 => Ok (Interrupt :: RMT) , _ => Err (TryFromInterruptError (())) , } } } # [doc = "Remote Control Peripheral"] pub struct RMT { _marker : PhantomData < * const () > } unsafe impl Send for RMT { } impl RMT { # [doc = r"Pointer to the register block"] pub const PTR : * const rmt :: RegisterBlock = 0x3ff5_6000 as * const _ ; # [doc = r"Return the pointer to the register block"] # [inline (always)] pub const fn ptr () -> * const rmt :: RegisterBlock { Self :: PTR } } impl Deref for RMT { type Target = rmt :: RegisterBlock ; # [inline (always)] fn deref (& self) -> & Self :: Target { unsafe { & * Self :: PTR } } } impl core :: fmt :: Debug for RMT { fn fmt (& self , f : & mut core :: fmt :: Formatter) -> core :: fmt :: Result { f . debug_struct ("RMT") . finish () } } # [doc = "Remote Control Peripheral"] pub mod rmt { # [doc = r"Register block"] # [repr (C)] pub struct RegisterBlock { _reserved0 : [u8 ; 0xac] , # [doc = "0xac - "] pub int_clr : crate :: Reg < int_clr :: INT_CLR_SPEC > , } # [doc = "INT_CLR register accessor: an alias for `Reg`"] pub type INT_CLR = crate :: Reg < int_clr :: INT_CLR_SPEC > ; # [doc = ""] pub mod int_clr { # [doc = "Register `INT_CLR` writer"] pub struct W (crate :: W < INT_CLR_SPEC >) ; impl core :: ops :: Deref for W { type Target = crate :: W < INT_CLR_SPEC > ; # [inline (always)] fn deref (& self) -> & Self :: Target { & self . 0 } } impl core :: ops :: DerefMut for W { # [inline (always)] fn deref_mut (& mut self) -> & mut Self :: Target { & mut self . 0 } } impl From < crate :: W < INT_CLR_SPEC >> for W { # [inline (always)] fn from (writer : crate :: W < INT_CLR_SPEC >) -> Self { W (writer) } } # [doc = "Fields `CH(0-7)_TX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."] pub type CH_TX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_RX_END_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."] pub type CH_RX_END_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_ERR_INT_CLR` writer - Set this bit to clear the rmt_ch%s_err_int_raw."] pub type CH_ERR_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; # [doc = "Fields `CH(0-7)_TX_THR_EVENT_INT_CLR` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."] pub type CH_TX_THR_EVENT_INT_CLR_W < 'a , const O : u8 > = crate :: BitWriter < 'a , u32 , INT_CLR_SPEC , bool , O > ; impl W { # [doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."] # [inline (always)] pub unsafe fn ch_tx_end_int_clr < const O : u8 > (& mut self) -> CH_TX_END_INT_CLR_W < O > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 0 - Set this bit to clear the rmt_ch0_rx_end_int_raw.."] # [inline (always)] pub fn ch0_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 0 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 3 - Set this bit to clear the rmt_ch1_rx_end_int_raw.."] # [inline (always)] pub fn ch1_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 3 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 6 - Set this bit to clear the rmt_ch2_rx_end_int_raw.."] # [inline (always)] pub fn ch2_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 6 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 9 - Set this bit to clear the rmt_ch3_rx_end_int_raw.."] # [inline (always)] pub fn ch3_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 9 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 12 - Set this bit to clear the rmt_ch4_rx_end_int_raw.."] # [inline (always)] pub fn ch4_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 12 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 15 - Set this bit to clear the rmt_ch5_rx_end_int_raw.."] # [inline (always)] pub fn ch5_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 15 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 18 - Set this bit to clear the rmt_ch6_rx_end_int_raw.."] # [inline (always)] pub fn ch6_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 18 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Bit 21 - Set this bit to clear the rmt_ch7_rx_end_int_raw.."] # [inline (always)] pub fn ch7_tx_end_int_clr (& mut self) -> CH_TX_END_INT_CLR_W < 21 > { CH_TX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."] # [inline (always)] pub unsafe fn ch_rx_end_int_clr < const O : u8 > (& mut self) -> CH_RX_END_INT_CLR_W < O > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 1 - Set this bit to clear the rmt_ch0_tx_end_int_raw."] # [inline (always)] pub fn ch0_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 1 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 4 - Set this bit to clear the rmt_ch1_tx_end_int_raw."] # [inline (always)] pub fn ch1_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 4 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 7 - Set this bit to clear the rmt_ch2_tx_end_int_raw."] # [inline (always)] pub fn ch2_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 7 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 10 - Set this bit to clear the rmt_ch3_tx_end_int_raw."] # [inline (always)] pub fn ch3_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W <'_, 10 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 13 - Set this bit to clear the rmt_ch4_tx_end_int_raw."] # [inline (always)] pub fn ch4_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 13 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 16 - Set this bit to clear the rmt_ch5_tx_end_int_raw."] # [inline (always)] pub fn ch5_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 16 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 19 - Set this bit to clear the rmt_ch6_tx_end_int_raw."] # [inline (always)] pub fn ch6_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 19 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Bit 22 - Set this bit to clear the rmt_ch7_tx_end_int_raw."] # [inline (always)] pub fn ch7_rx_end_int_clr (& mut self) -> CH_RX_END_INT_CLR_W < 22 > { CH_RX_END_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."] # [inline (always)] pub unsafe fn ch_err_int_clr < const O : u8 > (& mut self) -> CH_ERR_INT_CLR_W < O > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 2 - Set this bit to clear the rmt_ch0_err_int_raw."] # [inline (always)] pub fn ch0_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 2 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 5 - Set this bit to clear the rmt_ch1_err_int_raw."] # [inline (always)] pub fn ch1_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 5 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 8 - Set this bit to clear the rmt_ch2_err_int_raw."] # [inline (always)] pub fn ch2_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 8 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 11 - Set this bit to clear the rmt_ch3_err_int_raw."] # [inline (always)] pub fn ch3_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 11 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 14 - Set this bit to clear the rmt_ch4_err_int_raw."] # [inline (always)] pub fn ch4_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 14 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 17 - Set this bit to clear the rmt_ch5_err_int_raw."] # [inline (always)] pub fn ch5_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 17 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 20 - Set this bit to clear the rmt_ch6_err_int_raw."] # [inline (always)] pub fn ch6_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 20 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Bit 23 - Set this bit to clear the rmt_ch7_err_int_raw."] # [inline (always)] pub fn ch7_err_int_clr (& mut self) -> CH_ERR_INT_CLR_W < 23 > { CH_ERR_INT_CLR_W :: new (self) } # [doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."] # [inline (always)] pub unsafe fn ch_tx_thr_event_int_clr < const O : u8 > (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < O > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 24 - Set this bit to clear the rmt_ch0_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch0_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 24 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 25 - Set this bit to clear the rmt_ch1_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch1_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 25 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 26 - Set this bit to clear the rmt_ch2_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch2_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 26 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 27 - Set this bit to clear the rmt_ch3_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch3_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 27 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 28 - Set this bit to clear the rmt_ch4_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch4_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 28 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 29 - Set this bit to clear the rmt_ch5_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch5_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 29 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 30 - Set this bit to clear the rmt_ch6_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch6_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 30 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Bit 31 - Set this bit to clear the rmt_ch7_tx_thr_event_int_raw interrupt."] # [inline (always)] pub fn ch7_tx_thr_event_int_clr (& mut self) -> CH_TX_THR_EVENT_INT_CLR_W < 31 > { CH_TX_THR_EVENT_INT_CLR_W :: new (self) } # [doc = "Writes raw bits to the register."] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . 0 . bits (bits) ; self } } # [doc = "\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_clr](index.html) module"] pub struct INT_CLR_SPEC ; impl crate :: RegisterSpec for INT_CLR_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [int_clr::W](W) writer structure"] impl crate :: Writable for INT_CLR_SPEC { type Writer = W ; } # [doc = "`reset()` method sets INT_CLR to value 0"] impl crate :: Resettable for INT_CLR_SPEC { # [inline (always)] fn reset_value () -> Self :: Ux { 0 } } } } # [no_mangle] static mut DEVICE_PERIPHERALS : bool = false ; # [doc = r"All the peripherals"] # [allow (non_snake_case)] pub struct Peripherals { # [doc = "RMT"] pub RMT : RMT , } impl Peripherals { # [doc = r"Returns all the peripherals *once*"] # [inline] pub fn take () -> Option < Self > { xtensa_lx :: interrupt :: free (| _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some (unsafe { Peripherals :: steal () }) } }) } # [doc = r"Unchecked version of `Peripherals::take`"] # [inline] pub unsafe fn steal () -> Self { DEVICE_PERIPHERALS = true ; Peripherals { RMT : RMT { _marker : PhantomData } , } } } [INFO] [stdout] | +++ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] error: failed to write to `/opt/rustwide/target/debug/deps/rmetap0i3LP/full.rmeta`: No space left on device (os error 28) [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] error: could not compile `indexmap` (lib) due to 1 previous error [INFO] [stderr] warning: build failed, waiting for other jobs to finish... [INFO] [stderr] error: could not compile `generated23` (lib); 37 warnings emitted [INFO] [stderr] [INFO] [stderr] Caused by: [INFO] [stderr] No space left on device (os error 28) [INFO] [stderr] [INFO] [stderr] Caused by: [INFO] [stderr] failed to parse process output: `/opt/rustwide/rustup-home/toolchains/ca77504943887037504c7fc0b9bf06dab3910373/bin/rustc --crate-name generated23 --edition=2021 generated23/src/lib.rs --error-format=json --json=diagnostic-rendered-ansi,artifacts,future-incompat --crate-type lib --emit=dep-info,metadata -C embed-bitcode=no -C debuginfo=2 --check-cfg 'cfg(docsrs,test)' --check-cfg 'cfg(feature, values())' -C metadata=2e38ed87260d148d -C extra-filename=-6422e34fe1f904fc --out-dir /opt/rustwide/target/debug/deps -L dependency=/opt/rustwide/target/debug/deps --extern bare_metal=/opt/rustwide/target/debug/deps/libbare_metal-60953fc5d210a049.rmeta --extern vcell=/opt/rustwide/target/debug/deps/libvcell-9184bd5c2bc518dc.rmeta --extern xtensa_lx=/opt/rustwide/target/debug/deps/libxtensa_lx-cc029ad83b6b3871.rmeta --cap-lints=forbid -L /opt/rustwide/target/debug/build/xtensa-lx-f813850e3611ecfe/out` (exit status: 1) [INFO] [stdout] error: failed to write to `/opt/rustwide/target/debug/deps/rmetaHFHPE1/full.rmeta`: No space left on device (os error 28) [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] error: could not compile `aho-corasick` (lib) due to 1 previous error [INFO] [stderr] error: could not compile `generated24` (lib); 18 warnings emitted [INFO] [stderr] [INFO] [stderr] Caused by: [INFO] [stderr] No space left on device (os error 28) [INFO] [stderr] [INFO] [stderr] Caused by: [INFO] [stderr] failed to parse process output: `/opt/rustwide/rustup-home/toolchains/ca77504943887037504c7fc0b9bf06dab3910373/bin/rustc --crate-name generated24 --edition=2021 generated24/src/lib.rs --error-format=json --json=diagnostic-rendered-ansi,artifacts,future-incompat --crate-type lib --emit=dep-info,metadata -C embed-bitcode=no -C debuginfo=2 --check-cfg 'cfg(docsrs,test)' --check-cfg 'cfg(feature, values())' -C metadata=2b1ff1149ffd49f3 -C extra-filename=-4be2d74d8e09ea28 --out-dir /opt/rustwide/target/debug/deps -L dependency=/opt/rustwide/target/debug/deps --extern bare_metal=/opt/rustwide/target/debug/deps/libbare_metal-60953fc5d210a049.rmeta --extern vcell=/opt/rustwide/target/debug/deps/libvcell-9184bd5c2bc518dc.rmeta --extern xtensa_lx=/opt/rustwide/target/debug/deps/libxtensa_lx-cc029ad83b6b3871.rmeta --cap-lints=forbid -L /opt/rustwide/target/debug/build/xtensa-lx-f813850e3611ecfe/out` (exit status: 1) [INFO] [stdout] error: failed to write to `/opt/rustwide/target/debug/deps/rmetaGyDp2N/full.rmeta`: No space left on device (os error 28) [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] error: could not compile `regex-syntax` (lib) due to 1 previous error [INFO] [stdout] error: failed to write to `/opt/rustwide/target/debug/deps/rmetagJWvpU/full.rmeta`: No space left on device (os error 28) [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] error: could not compile `clap` (lib) due to 1 previous error [INFO] running `Command { std: "docker" "inspect" "71b25fff291a39d480b5890f6eb3705a02eaaa2ac9d4688d84691174a4a48069", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "71b25fff291a39d480b5890f6eb3705a02eaaa2ac9d4688d84691174a4a48069", kill_on_drop: false }` [INFO] [stdout] 71b25fff291a39d480b5890f6eb3705a02eaaa2ac9d4688d84691174a4a48069