[INFO] cloning repository https://github.com/Frogieder/VCO-CH32V003
[INFO] running `Command { std: "git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/Frogieder/VCO-CH32V003" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FFrogieder%2FVCO-CH32V003", kill_on_drop: false }`
[INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FFrogieder%2FVCO-CH32V003'...
[INFO] running `Command { std: "git" "rev-parse" "HEAD", kill_on_drop: false }`
[INFO] [stdout] 0f4dd397b4b0c359c4613aa9d6186f42633e55c3
[INFO] checking Frogieder/VCO-CH32V003 against master#8f21a5c92ea55c348c275a1bc4fedbdf181e0d64 for pr-143011
[INFO] running `Command { std: "git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FFrogieder%2FVCO-CH32V003" "/workspace/builds/worker-7-tc1/source", kill_on_drop: false }`
[INFO] [stderr] Cloning into '/workspace/builds/worker-7-tc1/source'...
[INFO] [stderr] done.
[INFO] removed /workspace/builds/worker-7-tc1/source/.cargo/config.toml
[INFO] removed /workspace/builds/worker-7-tc1/source/rust-toolchain.toml
[INFO] started tweaking git repo https://github.com/Frogieder/VCO-CH32V003
[INFO] finished tweaking git repo https://github.com/Frogieder/VCO-CH32V003
[INFO] tweaked toml for git repo https://github.com/Frogieder/VCO-CH32V003 written to /workspace/builds/worker-7-tc1/source/Cargo.toml
[INFO] validating manifest of git repo https://github.com/Frogieder/VCO-CH32V003 on toolchain 8f21a5c92ea55c348c275a1bc4fedbdf181e0d64
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+8f21a5c92ea55c348c275a1bc4fedbdf181e0d64" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] crate git repo https://github.com/Frogieder/VCO-CH32V003 already has a lockfile, it will not be regenerated
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+8f21a5c92ea55c348c275a1bc4fedbdf181e0d64" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]     Updating git repository `https://github.com/ch32-rs/ch32-hal.git`
[INFO] [stderr]     Updating crates.io index
[INFO] [stderr]     Updating git repository `https://github.com/ch32-rs/ch32-metapac.git`
[INFO] [stderr]     Blocking waiting for file lock on package cache
[INFO] [stderr]  Downloading crates ...
[INFO] [stderr]   Downloaded qingke-rt-macros v0.2.1
[INFO] [stderr]   Downloaded qingke v0.2.0
[INFO] [stderr]   Downloaded embassy-time v0.3.1
[INFO] [stderr]   Downloaded qingke-rt v0.2.1
[INFO] [stderr]   Downloaded embassy-sync v0.6.0
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:90999bfc7ae267e83380e433d8e61a7c072ca6729e92edbae886d3423b3a6f4c" "/opt/rustwide/cargo-home/bin/cargo" "+8f21a5c92ea55c348c275a1bc4fedbdf181e0d64" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] 4438bfe4a2dc2d543e1d3f730b46ff3f6047d274e324d8f62b1d6f68b536b4b8
[INFO] running `Command { std: "docker" "start" "-a" "4438bfe4a2dc2d543e1d3f730b46ff3f6047d274e324d8f62b1d6f68b536b4b8", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "4438bfe4a2dc2d543e1d3f730b46ff3f6047d274e324d8f62b1d6f68b536b4b8", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "4438bfe4a2dc2d543e1d3f730b46ff3f6047d274e324d8f62b1d6f68b536b4b8", kill_on_drop: false }`
[INFO] [stdout] 4438bfe4a2dc2d543e1d3f730b46ff3f6047d274e324d8f62b1d6f68b536b4b8
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:90999bfc7ae267e83380e433d8e61a7c072ca6729e92edbae886d3423b3a6f4c" "/opt/rustwide/cargo-home/bin/cargo" "+8f21a5c92ea55c348c275a1bc4fedbdf181e0d64" "check" "--frozen" "--all" "--all-targets" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] 8e9c38825882a23884126c08578ef2c108f9f41a0fca695f2c4c7e86be7861f4
[INFO] running `Command { std: "docker" "start" "-a" "8e9c38825882a23884126c08578ef2c108f9f41a0fca695f2c4c7e86be7861f4", kill_on_drop: false }`
[INFO] [stderr]    Compiling proc-macro2 v1.0.86
[INFO] [stderr]    Compiling unicode-ident v1.0.12
[INFO] [stderr]    Compiling riscv v0.11.1
[INFO] [stderr]    Compiling version_check v0.9.4
[INFO] [stderr]     Checking embedded-hal v1.0.0
[INFO] [stderr]     Checking critical-section v1.1.2
[INFO] [stderr]     Checking futures-core v0.3.30
[INFO] [stderr]     Checking futures-sink v0.3.30
[INFO] [stderr]    Compiling syn v1.0.109
[INFO] [stderr]    Compiling heapless v0.8.0
[INFO] [stderr]     Checking futures-task v0.3.30
[INFO] [stderr]     Checking byteorder v1.5.0
[INFO] [stderr]    Compiling ch32-metapac v0.1.0 (https://github.com/ch32-rs/ch32-metapac.git?tag=ch32-data-9839bac87ce756ab19b09c03d89644be401a1c10#82e1fdc3)
[INFO] [stderr]     Checking pin-project-lite v0.2.14
[INFO] [stderr]    Compiling embassy-time-driver v0.1.0
[INFO] [stderr]     Checking nb v1.1.0
[INFO] [stderr]     Checking stable_deref_trait v1.2.0
[INFO] [stderr]    Compiling litrs v0.4.1
[INFO] [stderr]    Compiling vcell v0.1.3
[INFO] [stderr]    Compiling embedded-io-async v0.6.1
[INFO] [stderr]    Compiling embassy-time-queue-driver v0.1.0
[INFO] [stderr]    Compiling embedded-hal-async v1.0.0
[INFO] [stderr]     Checking embedded-io v0.6.1
[INFO] [stderr]     Checking nb v0.1.3
[INFO] [stderr]    Compiling qingke-rt v0.2.1
[INFO] [stderr]     Checking bit_field v0.10.2
[INFO] [stderr]    Compiling embassy-sync v0.6.0
[INFO] [stderr]     Checking void v1.0.2
[INFO] [stderr]     Checking hash32 v0.3.1
[INFO] [stderr]     Checking embedded-hal v0.2.7
[INFO] [stderr]     Checking futures-channel v0.3.30
[INFO] [stderr]     Checking futures-io v0.3.30
[INFO] [stderr]     Checking embedded-hal-nb v1.0.0
[INFO] [stderr]     Checking sdio-host v0.5.0
[INFO] [stderr]    Compiling hello-wch v0.1.0 (/opt/rustwide/workdir)
[INFO] [stderr]     Checking embassy-usb-driver v0.1.0
[INFO] [stderr]     Checking embassy-futures v0.1.1
[INFO] [stderr]     Checking rand_core v0.6.4
[INFO] [stderr]     Checking panic-halt v0.2.0
[INFO] [stderr]    Compiling proc-macro-error-attr v1.0.4
[INFO] [stderr]    Compiling proc-macro-error v1.0.4
[INFO] [stderr]    Compiling document-features v0.2.10
[INFO] [stderr]    Compiling quote v1.0.36
[INFO] [stderr]     Checking qingke v0.2.0
[INFO] [stderr]    Compiling syn v2.0.71
[INFO] [stderr]    Compiling ch32-hal v0.1.0 (https://github.com/ch32-rs/ch32-hal.git#5df0e89a)
[INFO] [stderr]    Compiling futures-macro v0.3.30
[INFO] [stderr]     Checking futures-util v0.3.30
[INFO] [stderr]    Compiling qingke-rt-macros v0.2.1
[INFO] [stderr]     Checking embassy-time v0.3.1
[INFO] [stderr]     Checking futures v0.3.30
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]    --> /opt/rustwide/cargo-home/git/checkouts/ch32-hal-f8ddd79b527ebc9f/5df0e89/src/exti.rs:354:5
[INFO] [stdout]     |
[INFO] [stdout] 354 |     #[interrupt]
[INFO] [stdout]     |     ^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]     |
[INFO] [stdout]     = note: this error originates in the attribute macro `interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]     |
[INFO] [stdout] 354 |     unsafe(#[interrupt])
[INFO] [stdout]     |     +++++++            +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]   --> /opt/rustwide/cargo-home/git/checkouts/ch32-hal-f8ddd79b527ebc9f/5df0e89/src/embassy/time_driver_tim.rs:58:9
[INFO] [stdout]    |
[INFO] [stdout] 58 |         #[interrupt]
[INFO] [stdout]    |         ^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]    |
[INFO] [stdout]    = note: this error originates in the attribute macro `interrupt` which comes from the expansion of the macro `foreach_interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]    |
[INFO] [stdout] 58 |         unsafe(#[interrupt])
[INFO] [stdout]    |         +++++++            +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17376
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...A1_CH7 , 6u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as...
[INFO] [stdout]   |                                             ^^^^^^^^^^^^^^^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]   |
[INFO] [stdout] 1 | crate :: peripherals_definition ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: peripherals_struct ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: interrupt_mod ! (WWDG , PVD , FLASH , RCC , EXTI7_0 , AWU , DMA1_CHANNEL1 , DMA1_CHANNEL2 , DMA1_CHANNEL3 , DMA1_CHANNEL4 , DMA1_CHANNEL5 , DMA1_CHANNEL6 , DMA1_CHANNEL7 , ADC , I2C1_EV , I2C1_ER , USART1 , SPI1 , TIM1_BRK , TIM1_UP , TIM1_TRG_COM , TIM1_CC , TIM2 ,) ; impl crate :: peripheral :: SealedRccPeripheral for peripherals :: DMA1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: DMA1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: AFIO { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: AFIO { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM2 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM2 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim2_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: USART1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: USART1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: I2C1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk1 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: I2C1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: SPI1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: SPI1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_spi1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: ADC1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: ADC1 { } pub unsafe fn init_dma () { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } pub unsafe fn init_gpio () { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopaen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopcen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopden (true)) ; } pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 0u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC6 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD3 , 1u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PC4 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PD4 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 2u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC4 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD4 , 3u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PD2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD6 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD5 , 3u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD4 , 0u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD5 , 0u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD6 , 0u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PD3 , 0u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 1u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 1u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 2u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD5 , 2u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 2u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PC0 , 3u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC5 , 2u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 0u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 0u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 1u8) ; impl_adc_pin ! (ADC1 , PA2 , 0u8) ; impl_adc_pin ! (ADC1 , PA1 , 1u8) ; impl_adc_pin ! (ADC1 , PC4 , 2u8) ; impl_adc_pin ! (ADC1 , PD2 , 3u8) ; impl_adc_pin ! (ADC1 , PC3 , 4u8) ; impl_adc_pin ! (ADC1 , PD5 , 5u8) ; impl_adc_pin ! (ADC1 , PD6 , 6u8) ; impl_adc_pin ! (ADC1 , PD4 , 7u8) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM1 , { channel : DMA1_CH2 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM2 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM2 , { channel : DMA1_CH1 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: usart :: RxDma , USART1 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: usart :: TxDma , USART1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: i2c :: TxDma , I2C1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: i2c :: RxDma , I2C1 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: spi :: TxDma , SPI1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: spi :: RxDma , SPI1 , { channel : DMA1_CH2 } , ()) ; # [allow (non_camel_case_types)] pub mod peripheral_interrupts { pub mod PFIC { } pub mod SYSTICK { } pub mod FLASH { } pub mod EXTI { pub type EXTI0 = crate :: interrupt :: typelevel :: EXTI7_0 ; } pub mod RCC { } pub mod DMA1 { pub type CH1 = crate :: interrupt :: typelevel :: DMA1_CHANNEL1 ; pub type CH2 = crate :: interrupt :: typelevel :: DMA1_CHANNEL2 ; pub type CH3 = crate :: interrupt :: typelevel :: DMA1_CHANNEL3 ; pub type CH4 = crate :: interrupt :: typelevel :: DMA1_CHANNEL4 ; pub type CH5 = crate :: interrupt :: typelevel :: DMA1_CHANNEL5 ; pub type CH6 = crate :: interrupt :: typelevel :: DMA1_CHANNEL6 ; pub type CH7 = crate :: interrupt :: typelevel :: DMA1_CHANNEL7 ; } pub mod AFIO { } pub mod GPIOA { } pub mod GPIOC { } pub mod GPIOD { } pub mod TIM1 { pub type UP = crate :: interrupt :: typelevel :: TIM1_UP ; pub type CC = crate :: interrupt :: typelevel :: TIM1_CC ; pub type COM = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type TRG = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type BRK = crate :: interrupt :: typelevel :: TIM1_BRK ; } pub mod TIM2 { pub type UP = crate :: interrupt :: typelevel :: TIM2 ; pub type CC = crate :: interrupt :: typelevel :: TIM2 ; pub type TRG = crate :: interrupt :: typelevel :: TIM2 ; } pub mod USART1 { pub type GLOBAL = crate :: interrupt :: typelevel :: USART1 ; } pub mod I2C1 { pub type EV = crate :: interrupt :: typelevel :: I2C1_EV ; pub type ER = crate :: interrupt :: typelevel :: I2C1_ER ; } pub mod SPI1 { pub type GLOBAL = crate :: interrupt :: typelevel :: SPI1 ; } pub mod ADC1 { pub type GLOBAL = crate :: interrupt :: typelevel :: ADC ; } pub mod OPA { } } dma_channel_impl ! (DMA1_CH1 , 0u8) ; dma_channel_impl ! (DMA1_CH2 , 1u8) ; dma_channel_impl ! (DMA1_CH3 , 2u8) ; dma_channel_impl ! (DMA1_CH4 , 3u8) ; dma_channel_impl ! (DMA1_CH5 , 4u8) ; dma_channel_impl ! (DMA1_CH6 , 5u8) ; dma_channel_impl ! (DMA1_CH7 , 6u8) ; # [cfg (feature = "rt")] unsafe(# [qingke_rt :: interrupt]) unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } pub (crate) const DMA_CHANNELS : & [crate :: dma :: ChannelInfo] = & [crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 0usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 1usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 2usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 3usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 4usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 5usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 6usize , } ,] ;
[INFO] [stdout]   |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                +++++++                          +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17547
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as...
[INFO] [stdout]   |                                             ^^^^^^^^^^^^^^^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]   |
[INFO] [stdout] 1 | crate :: peripherals_definition ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: peripherals_struct ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: interrupt_mod ! (WWDG , PVD , FLASH , RCC , EXTI7_0 , AWU , DMA1_CHANNEL1 , DMA1_CHANNEL2 , DMA1_CHANNEL3 , DMA1_CHANNEL4 , DMA1_CHANNEL5 , DMA1_CHANNEL6 , DMA1_CHANNEL7 , ADC , I2C1_EV , I2C1_ER , USART1 , SPI1 , TIM1_BRK , TIM1_UP , TIM1_TRG_COM , TIM1_CC , TIM2 ,) ; impl crate :: peripheral :: SealedRccPeripheral for peripherals :: DMA1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: DMA1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: AFIO { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: AFIO { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM2 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM2 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim2_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: USART1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: USART1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: I2C1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk1 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: I2C1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: SPI1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: SPI1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_spi1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: ADC1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: ADC1 { } pub unsafe fn init_dma () { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } pub unsafe fn init_gpio () { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopaen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopcen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopden (true)) ; } pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 0u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC6 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD3 , 1u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PC4 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PD4 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 2u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC4 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD4 , 3u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PD2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD6 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD5 , 3u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD4 , 0u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD5 , 0u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD6 , 0u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PD3 , 0u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 1u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 1u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 2u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD5 , 2u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 2u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PC0 , 3u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC5 , 2u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 0u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 0u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 1u8) ; impl_adc_pin ! (ADC1 , PA2 , 0u8) ; impl_adc_pin ! (ADC1 , PA1 , 1u8) ; impl_adc_pin ! (ADC1 , PC4 , 2u8) ; impl_adc_pin ! (ADC1 , PD2 , 3u8) ; impl_adc_pin ! (ADC1 , PC3 , 4u8) ; impl_adc_pin ! (ADC1 , PD5 , 5u8) ; impl_adc_pin ! (ADC1 , PD6 , 6u8) ; impl_adc_pin ! (ADC1 , PD4 , 7u8) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM1 , { channel : DMA1_CH2 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM2 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM2 , { channel : DMA1_CH1 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: usart :: RxDma , USART1 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: usart :: TxDma , USART1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: i2c :: TxDma , I2C1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: i2c :: RxDma , I2C1 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: spi :: TxDma , SPI1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: spi :: RxDma , SPI1 , { channel : DMA1_CH2 } , ()) ; # [allow (non_camel_case_types)] pub mod peripheral_interrupts { pub mod PFIC { } pub mod SYSTICK { } pub mod FLASH { } pub mod EXTI { pub type EXTI0 = crate :: interrupt :: typelevel :: EXTI7_0 ; } pub mod RCC { } pub mod DMA1 { pub type CH1 = crate :: interrupt :: typelevel :: DMA1_CHANNEL1 ; pub type CH2 = crate :: interrupt :: typelevel :: DMA1_CHANNEL2 ; pub type CH3 = crate :: interrupt :: typelevel :: DMA1_CHANNEL3 ; pub type CH4 = crate :: interrupt :: typelevel :: DMA1_CHANNEL4 ; pub type CH5 = crate :: interrupt :: typelevel :: DMA1_CHANNEL5 ; pub type CH6 = crate :: interrupt :: typelevel :: DMA1_CHANNEL6 ; pub type CH7 = crate :: interrupt :: typelevel :: DMA1_CHANNEL7 ; } pub mod AFIO { } pub mod GPIOA { } pub mod GPIOC { } pub mod GPIOD { } pub mod TIM1 { pub type UP = crate :: interrupt :: typelevel :: TIM1_UP ; pub type CC = crate :: interrupt :: typelevel :: TIM1_CC ; pub type COM = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type TRG = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type BRK = crate :: interrupt :: typelevel :: TIM1_BRK ; } pub mod TIM2 { pub type UP = crate :: interrupt :: typelevel :: TIM2 ; pub type CC = crate :: interrupt :: typelevel :: TIM2 ; pub type TRG = crate :: interrupt :: typelevel :: TIM2 ; } pub mod USART1 { pub type GLOBAL = crate :: interrupt :: typelevel :: USART1 ; } pub mod I2C1 { pub type EV = crate :: interrupt :: typelevel :: I2C1_EV ; pub type ER = crate :: interrupt :: typelevel :: I2C1_ER ; } pub mod SPI1 { pub type GLOBAL = crate :: interrupt :: typelevel :: SPI1 ; } pub mod ADC1 { pub type GLOBAL = crate :: interrupt :: typelevel :: ADC ; } pub mod OPA { } } dma_channel_impl ! (DMA1_CH1 , 0u8) ; dma_channel_impl ! (DMA1_CH2 , 1u8) ; dma_channel_impl ! (DMA1_CH3 , 2u8) ; dma_channel_impl ! (DMA1_CH4 , 3u8) ; dma_channel_impl ! (DMA1_CH5 , 4u8) ; dma_channel_impl ! (DMA1_CH6 , 5u8) ; dma_channel_impl ! (DMA1_CH7 , 6u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] unsafe(# [qingke_rt :: interrupt]) unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } pub (crate) const DMA_CHANNELS : & [crate :: dma :: ChannelInfo] = & [crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 0usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 1usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 2usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 3usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 4usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 5usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 6usize , } ,] ;
[INFO] [stdout]   |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           +++++++                          +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17718
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as...
[INFO] [stdout]   |                                             ^^^^^^^^^^^^^^^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]   |
[INFO] [stdout] 1 | crate :: peripherals_definition ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: peripherals_struct ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: interrupt_mod ! (WWDG , PVD , FLASH , RCC , EXTI7_0 , AWU , DMA1_CHANNEL1 , DMA1_CHANNEL2 , DMA1_CHANNEL3 , DMA1_CHANNEL4 , DMA1_CHANNEL5 , DMA1_CHANNEL6 , DMA1_CHANNEL7 , ADC , I2C1_EV , I2C1_ER , USART1 , SPI1 , TIM1_BRK , TIM1_UP , TIM1_TRG_COM , TIM1_CC , TIM2 ,) ; impl crate :: peripheral :: SealedRccPeripheral for peripherals :: DMA1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: DMA1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: AFIO { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: AFIO { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM2 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM2 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim2_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: USART1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: USART1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: I2C1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk1 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: I2C1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: SPI1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: SPI1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_spi1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: ADC1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: ADC1 { } pub unsafe fn init_dma () { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } pub unsafe fn init_gpio () { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopaen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopcen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopden (true)) ; } pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 0u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC6 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD3 , 1u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PC4 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PD4 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 2u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC4 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD4 , 3u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PD2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD6 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD5 , 3u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD4 , 0u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD5 , 0u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD6 , 0u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PD3 , 0u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 1u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 1u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 2u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD5 , 2u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 2u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PC0 , 3u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC5 , 2u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 0u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 0u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 1u8) ; impl_adc_pin ! (ADC1 , PA2 , 0u8) ; impl_adc_pin ! (ADC1 , PA1 , 1u8) ; impl_adc_pin ! (ADC1 , PC4 , 2u8) ; impl_adc_pin ! (ADC1 , PD2 , 3u8) ; impl_adc_pin ! (ADC1 , PC3 , 4u8) ; impl_adc_pin ! (ADC1 , PD5 , 5u8) ; impl_adc_pin ! (ADC1 , PD6 , 6u8) ; impl_adc_pin ! (ADC1 , PD4 , 7u8) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM1 , { channel : DMA1_CH2 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM2 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM2 , { channel : DMA1_CH1 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: usart :: RxDma , USART1 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: usart :: TxDma , USART1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: i2c :: TxDma , I2C1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: i2c :: RxDma , I2C1 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: spi :: TxDma , SPI1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: spi :: RxDma , SPI1 , { channel : DMA1_CH2 } , ()) ; # [allow (non_camel_case_types)] pub mod peripheral_interrupts { pub mod PFIC { } pub mod SYSTICK { } pub mod FLASH { } pub mod EXTI { pub type EXTI0 = crate :: interrupt :: typelevel :: EXTI7_0 ; } pub mod RCC { } pub mod DMA1 { pub type CH1 = crate :: interrupt :: typelevel :: DMA1_CHANNEL1 ; pub type CH2 = crate :: interrupt :: typelevel :: DMA1_CHANNEL2 ; pub type CH3 = crate :: interrupt :: typelevel :: DMA1_CHANNEL3 ; pub type CH4 = crate :: interrupt :: typelevel :: DMA1_CHANNEL4 ; pub type CH5 = crate :: interrupt :: typelevel :: DMA1_CHANNEL5 ; pub type CH6 = crate :: interrupt :: typelevel :: DMA1_CHANNEL6 ; pub type CH7 = crate :: interrupt :: typelevel :: DMA1_CHANNEL7 ; } pub mod AFIO { } pub mod GPIOA { } pub mod GPIOC { } pub mod GPIOD { } pub mod TIM1 { pub type UP = crate :: interrupt :: typelevel :: TIM1_UP ; pub type CC = crate :: interrupt :: typelevel :: TIM1_CC ; pub type COM = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type TRG = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type BRK = crate :: interrupt :: typelevel :: TIM1_BRK ; } pub mod TIM2 { pub type UP = crate :: interrupt :: typelevel :: TIM2 ; pub type CC = crate :: interrupt :: typelevel :: TIM2 ; pub type TRG = crate :: interrupt :: typelevel :: TIM2 ; } pub mod USART1 { pub type GLOBAL = crate :: interrupt :: typelevel :: USART1 ; } pub mod I2C1 { pub type EV = crate :: interrupt :: typelevel :: I2C1_EV ; pub type ER = crate :: interrupt :: typelevel :: I2C1_ER ; } pub mod SPI1 { pub type GLOBAL = crate :: interrupt :: typelevel :: SPI1 ; } pub mod ADC1 { pub type GLOBAL = crate :: interrupt :: typelevel :: ADC ; } pub mod OPA { } } dma_channel_impl ! (DMA1_CH1 , 0u8) ; dma_channel_impl ! (DMA1_CH2 , 1u8) ; dma_channel_impl ! (DMA1_CH3 , 2u8) ; dma_channel_impl ! (DMA1_CH4 , 3u8) ; dma_channel_impl ! (DMA1_CH5 , 4u8) ; dma_channel_impl ! (DMA1_CH6 , 5u8) ; dma_channel_impl ! (DMA1_CH7 , 6u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] unsafe(# [qingke_rt :: interrupt]) unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } pub (crate) const DMA_CHANNELS : & [crate :: dma :: ChannelInfo] = & [crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 0usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 1usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 2usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 3usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 4usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 5usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 6usize , } ,] ;
[INFO] [stdout]   |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      +++++++                          +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17889
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as...
[INFO] [stdout]   |                                             ^^^^^^^^^^^^^^^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]   |
[INFO] [stdout] 1 | crate :: peripherals_definition ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: peripherals_struct ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: interrupt_mod ! (WWDG , PVD , FLASH , RCC , EXTI7_0 , AWU , DMA1_CHANNEL1 , DMA1_CHANNEL2 , DMA1_CHANNEL3 , DMA1_CHANNEL4 , DMA1_CHANNEL5 , DMA1_CHANNEL6 , DMA1_CHANNEL7 , ADC , I2C1_EV , I2C1_ER , USART1 , SPI1 , TIM1_BRK , TIM1_UP , TIM1_TRG_COM , TIM1_CC , TIM2 ,) ; impl crate :: peripheral :: SealedRccPeripheral for peripherals :: DMA1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: DMA1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: AFIO { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: AFIO { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM2 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM2 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim2_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: USART1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: USART1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: I2C1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk1 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: I2C1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: SPI1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: SPI1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_spi1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: ADC1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: ADC1 { } pub unsafe fn init_dma () { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } pub unsafe fn init_gpio () { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopaen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopcen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopden (true)) ; } pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 0u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC6 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD3 , 1u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PC4 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PD4 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 2u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC4 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD4 , 3u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PD2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD6 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD5 , 3u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD4 , 0u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD5 , 0u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD6 , 0u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PD3 , 0u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 1u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 1u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 2u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD5 , 2u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 2u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PC0 , 3u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC5 , 2u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 0u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 0u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 1u8) ; impl_adc_pin ! (ADC1 , PA2 , 0u8) ; impl_adc_pin ! (ADC1 , PA1 , 1u8) ; impl_adc_pin ! (ADC1 , PC4 , 2u8) ; impl_adc_pin ! (ADC1 , PD2 , 3u8) ; impl_adc_pin ! (ADC1 , PC3 , 4u8) ; impl_adc_pin ! (ADC1 , PD5 , 5u8) ; impl_adc_pin ! (ADC1 , PD6 , 6u8) ; impl_adc_pin ! (ADC1 , PD4 , 7u8) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM1 , { channel : DMA1_CH2 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM2 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM2 , { channel : DMA1_CH1 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: usart :: RxDma , USART1 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: usart :: TxDma , USART1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: i2c :: TxDma , I2C1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: i2c :: RxDma , I2C1 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: spi :: TxDma , SPI1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: spi :: RxDma , SPI1 , { channel : DMA1_CH2 } , ()) ; # [allow (non_camel_case_types)] pub mod peripheral_interrupts { pub mod PFIC { } pub mod SYSTICK { } pub mod FLASH { } pub mod EXTI { pub type EXTI0 = crate :: interrupt :: typelevel :: EXTI7_0 ; } pub mod RCC { } pub mod DMA1 { pub type CH1 = crate :: interrupt :: typelevel :: DMA1_CHANNEL1 ; pub type CH2 = crate :: interrupt :: typelevel :: DMA1_CHANNEL2 ; pub type CH3 = crate :: interrupt :: typelevel :: DMA1_CHANNEL3 ; pub type CH4 = crate :: interrupt :: typelevel :: DMA1_CHANNEL4 ; pub type CH5 = crate :: interrupt :: typelevel :: DMA1_CHANNEL5 ; pub type CH6 = crate :: interrupt :: typelevel :: DMA1_CHANNEL6 ; pub type CH7 = crate :: interrupt :: typelevel :: DMA1_CHANNEL7 ; } pub mod AFIO { } pub mod GPIOA { } pub mod GPIOC { } pub mod GPIOD { } pub mod TIM1 { pub type UP = crate :: interrupt :: typelevel :: TIM1_UP ; pub type CC = crate :: interrupt :: typelevel :: TIM1_CC ; pub type COM = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type TRG = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type BRK = crate :: interrupt :: typelevel :: TIM1_BRK ; } pub mod TIM2 { pub type UP = crate :: interrupt :: typelevel :: TIM2 ; pub type CC = crate :: interrupt :: typelevel :: TIM2 ; pub type TRG = crate :: interrupt :: typelevel :: TIM2 ; } pub mod USART1 { pub type GLOBAL = crate :: interrupt :: typelevel :: USART1 ; } pub mod I2C1 { pub type EV = crate :: interrupt :: typelevel :: I2C1_EV ; pub type ER = crate :: interrupt :: typelevel :: I2C1_ER ; } pub mod SPI1 { pub type GLOBAL = crate :: interrupt :: typelevel :: SPI1 ; } pub mod ADC1 { pub type GLOBAL = crate :: interrupt :: typelevel :: ADC ; } pub mod OPA { } } dma_channel_impl ! (DMA1_CH1 , 0u8) ; dma_channel_impl ! (DMA1_CH2 , 1u8) ; dma_channel_impl ! (DMA1_CH3 , 2u8) ; dma_channel_impl ! (DMA1_CH4 , 3u8) ; dma_channel_impl ! (DMA1_CH5 , 4u8) ; dma_channel_impl ! (DMA1_CH6 , 5u8) ; dma_channel_impl ! (DMA1_CH7 , 6u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] unsafe(# [qingke_rt :: interrupt]) unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } pub (crate) const DMA_CHANNELS : & [crate :: dma :: ChannelInfo] = & [crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 0usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 1usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 2usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 3usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 4usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 5usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 6usize , } ,] ;
[INFO] [stdout]   |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      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[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:18060
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as...
[INFO] [stdout]   |                                             ^^^^^^^^^^^^^^^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]   |
[INFO] [stdout] 1 | crate :: peripherals_definition ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: peripherals_struct ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: interrupt_mod ! (WWDG , PVD , FLASH , RCC , EXTI7_0 , AWU , DMA1_CHANNEL1 , DMA1_CHANNEL2 , DMA1_CHANNEL3 , DMA1_CHANNEL4 , DMA1_CHANNEL5 , DMA1_CHANNEL6 , DMA1_CHANNEL7 , ADC , I2C1_EV , I2C1_ER , USART1 , SPI1 , TIM1_BRK , TIM1_UP , TIM1_TRG_COM , TIM1_CC , TIM2 ,) ; impl crate :: peripheral :: SealedRccPeripheral for peripherals :: DMA1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: DMA1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: AFIO { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: AFIO { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM2 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM2 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim2_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: USART1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: USART1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: I2C1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk1 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: I2C1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: SPI1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: SPI1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_spi1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: ADC1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: ADC1 { } pub unsafe fn init_dma () { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } pub unsafe fn init_gpio () { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopaen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopcen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopden (true)) ; } pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 0u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC6 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD3 , 1u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PC4 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PD4 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 2u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC4 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD4 , 3u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PD2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD6 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD5 , 3u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD4 , 0u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD5 , 0u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD6 , 0u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PD3 , 0u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 1u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 1u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 2u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD5 , 2u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 2u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PC0 , 3u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC5 , 2u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 0u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 0u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 1u8) ; impl_adc_pin ! (ADC1 , PA2 , 0u8) ; impl_adc_pin ! (ADC1 , PA1 , 1u8) ; impl_adc_pin ! (ADC1 , PC4 , 2u8) ; impl_adc_pin ! (ADC1 , PD2 , 3u8) ; impl_adc_pin ! (ADC1 , PC3 , 4u8) ; impl_adc_pin ! (ADC1 , PD5 , 5u8) ; impl_adc_pin ! (ADC1 , PD6 , 6u8) ; impl_adc_pin ! (ADC1 , PD4 , 7u8) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM1 , { channel : DMA1_CH2 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM2 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM2 , { channel : DMA1_CH1 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: usart :: RxDma , USART1 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: usart :: TxDma , USART1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: i2c :: TxDma , I2C1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: i2c :: RxDma , I2C1 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: spi :: TxDma , SPI1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: spi :: RxDma , SPI1 , { channel : DMA1_CH2 } , ()) ; # [allow (non_camel_case_types)] pub mod peripheral_interrupts { pub mod PFIC { } pub mod SYSTICK { } pub mod FLASH { } pub mod EXTI { pub type EXTI0 = crate :: interrupt :: typelevel :: EXTI7_0 ; } pub mod RCC { } pub mod DMA1 { pub type CH1 = crate :: interrupt :: typelevel :: DMA1_CHANNEL1 ; pub type CH2 = crate :: interrupt :: typelevel :: DMA1_CHANNEL2 ; pub type CH3 = crate :: interrupt :: typelevel :: DMA1_CHANNEL3 ; pub type CH4 = crate :: interrupt :: typelevel :: DMA1_CHANNEL4 ; pub type CH5 = crate :: interrupt :: typelevel :: DMA1_CHANNEL5 ; pub type CH6 = crate :: interrupt :: typelevel :: DMA1_CHANNEL6 ; pub type CH7 = crate :: interrupt :: typelevel :: DMA1_CHANNEL7 ; } pub mod AFIO { } pub mod GPIOA { } pub mod GPIOC { } pub mod GPIOD { } pub mod TIM1 { pub type UP = crate :: interrupt :: typelevel :: TIM1_UP ; pub type CC = crate :: interrupt :: typelevel :: TIM1_CC ; pub type COM = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type TRG = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type BRK = crate :: interrupt :: typelevel :: TIM1_BRK ; } pub mod TIM2 { pub type UP = crate :: interrupt :: typelevel :: TIM2 ; pub type CC = crate :: interrupt :: typelevel :: TIM2 ; pub type TRG = crate :: interrupt :: typelevel :: TIM2 ; } pub mod USART1 { pub type GLOBAL = crate :: interrupt :: typelevel :: USART1 ; } pub mod I2C1 { pub type EV = crate :: interrupt :: typelevel :: I2C1_EV ; pub type ER = crate :: interrupt :: typelevel :: I2C1_ER ; } pub mod SPI1 { pub type GLOBAL = crate :: interrupt :: typelevel :: SPI1 ; } pub mod ADC1 { pub type GLOBAL = crate :: interrupt :: typelevel :: ADC ; } pub mod OPA { } } dma_channel_impl ! (DMA1_CH1 , 0u8) ; dma_channel_impl ! (DMA1_CH2 , 1u8) ; dma_channel_impl ! (DMA1_CH3 , 2u8) ; dma_channel_impl ! (DMA1_CH4 , 3u8) ; dma_channel_impl ! (DMA1_CH5 , 4u8) ; dma_channel_impl ! (DMA1_CH6 , 5u8) ; dma_channel_impl ! (DMA1_CH7 , 6u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] unsafe(# [qingke_rt :: interrupt]) unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } pub (crate) const DMA_CHANNELS : & [crate :: dma :: ChannelInfo] = & [crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 0usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 1usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 2usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 3usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 4usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 5usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 6usize , } ,] ;
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                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             +++++++                          +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:18231
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as...
[INFO] [stdout]   |                                             ^^^^^^^^^^^^^^^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]   |
[INFO] [stdout] 1 | crate :: peripherals_definition ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: peripherals_struct ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: interrupt_mod ! (WWDG , PVD , FLASH , RCC , EXTI7_0 , AWU , DMA1_CHANNEL1 , DMA1_CHANNEL2 , DMA1_CHANNEL3 , DMA1_CHANNEL4 , DMA1_CHANNEL5 , DMA1_CHANNEL6 , DMA1_CHANNEL7 , ADC , I2C1_EV , I2C1_ER , USART1 , SPI1 , TIM1_BRK , TIM1_UP , TIM1_TRG_COM , TIM1_CC , TIM2 ,) ; impl crate :: peripheral :: SealedRccPeripheral for peripherals :: DMA1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: DMA1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: AFIO { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: AFIO { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM2 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM2 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim2_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: USART1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: USART1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: I2C1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk1 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: I2C1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: SPI1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: SPI1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_spi1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: ADC1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: ADC1 { } pub unsafe fn init_dma () { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } pub unsafe fn init_gpio () { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopaen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopcen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopden (true)) ; } pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 0u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC6 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD3 , 1u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PC4 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PD4 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 2u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC4 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD4 , 3u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PD2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD6 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD5 , 3u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD4 , 0u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD5 , 0u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD6 , 0u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PD3 , 0u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 1u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 1u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 2u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD5 , 2u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 2u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PC0 , 3u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC5 , 2u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 0u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 0u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 1u8) ; impl_adc_pin ! (ADC1 , PA2 , 0u8) ; impl_adc_pin ! (ADC1 , PA1 , 1u8) ; impl_adc_pin ! (ADC1 , PC4 , 2u8) ; impl_adc_pin ! (ADC1 , PD2 , 3u8) ; impl_adc_pin ! (ADC1 , PC3 , 4u8) ; impl_adc_pin ! (ADC1 , PD5 , 5u8) ; impl_adc_pin ! (ADC1 , PD6 , 6u8) ; impl_adc_pin ! (ADC1 , PD4 , 7u8) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM1 , { channel : DMA1_CH2 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM2 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM2 , { channel : DMA1_CH1 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: usart :: RxDma , USART1 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: usart :: TxDma , USART1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: i2c :: TxDma , I2C1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: i2c :: RxDma , I2C1 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: spi :: TxDma , SPI1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: spi :: RxDma , SPI1 , { channel : DMA1_CH2 } , ()) ; # [allow (non_camel_case_types)] pub mod peripheral_interrupts { pub mod PFIC { } pub mod SYSTICK { } pub mod FLASH { } pub mod EXTI { pub type EXTI0 = crate :: interrupt :: typelevel :: EXTI7_0 ; } pub mod RCC { } pub mod DMA1 { pub type CH1 = crate :: interrupt :: typelevel :: DMA1_CHANNEL1 ; pub type CH2 = crate :: interrupt :: typelevel :: DMA1_CHANNEL2 ; pub type CH3 = crate :: interrupt :: typelevel :: DMA1_CHANNEL3 ; pub type CH4 = crate :: interrupt :: typelevel :: DMA1_CHANNEL4 ; pub type CH5 = crate :: interrupt :: typelevel :: DMA1_CHANNEL5 ; pub type CH6 = crate :: interrupt :: typelevel :: DMA1_CHANNEL6 ; pub type CH7 = crate :: interrupt :: typelevel :: DMA1_CHANNEL7 ; } pub mod AFIO { } pub mod GPIOA { } pub mod GPIOC { } pub mod GPIOD { } pub mod TIM1 { pub type UP = crate :: interrupt :: typelevel :: TIM1_UP ; pub type CC = crate :: interrupt :: typelevel :: TIM1_CC ; pub type COM = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type TRG = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type BRK = crate :: interrupt :: typelevel :: TIM1_BRK ; } pub mod TIM2 { pub type UP = crate :: interrupt :: typelevel :: TIM2 ; pub type CC = crate :: interrupt :: typelevel :: TIM2 ; pub type TRG = crate :: interrupt :: typelevel :: TIM2 ; } pub mod USART1 { pub type GLOBAL = crate :: interrupt :: typelevel :: USART1 ; } pub mod I2C1 { pub type EV = crate :: interrupt :: typelevel :: I2C1_EV ; pub type ER = crate :: interrupt :: typelevel :: I2C1_ER ; } pub mod SPI1 { pub type GLOBAL = crate :: interrupt :: typelevel :: SPI1 ; } pub mod ADC1 { pub type GLOBAL = crate :: interrupt :: typelevel :: ADC ; } pub mod OPA { } } dma_channel_impl ! (DMA1_CH1 , 0u8) ; dma_channel_impl ! (DMA1_CH2 , 1u8) ; dma_channel_impl ! (DMA1_CH3 , 2u8) ; dma_channel_impl ! (DMA1_CH4 , 3u8) ; dma_channel_impl ! (DMA1_CH5 , 4u8) ; dma_channel_impl ! (DMA1_CH6 , 5u8) ; dma_channel_impl ! (DMA1_CH7 , 6u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] unsafe(# [qingke_rt :: interrupt]) unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } pub (crate) const DMA_CHANNELS : & [crate :: dma :: ChannelInfo] = & [crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 0usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 1usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 2usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 3usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 4usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 5usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 6usize , } ,] ;
[INFO] [stdout]   |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       +++++++                          +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: unsafe attribute used without unsafe
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:18402
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as...
[INFO] [stdout]   |                                             ^^^^^^^^^^^^^^^^^^^^^^^^^^ usage of unsafe attribute
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] help: wrap the attribute in `unsafe(...)`
[INFO] [stdout]   |
[INFO] [stdout] 1 | crate :: peripherals_definition ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: peripherals_struct ! (PFIC , SYSTICK , FLASH , MCO , RCC , DMA1 , AFIO , PA0 , PA1 , PA2 , PA3 , PA4 , PA5 , PA6 , PA7 , PC0 , PC1 , PC2 , PC3 , PC4 , PC5 , PC6 , PC7 , PD0 , PD1 , PD2 , PD3 , PD4 , PD5 , PD6 , PD7 , TIM1 , TIM2 , USART1 , I2C1 , SPI1 , ADC1 , OPA , EXTI0 , EXTI1 , EXTI2 , EXTI3 , EXTI4 , EXTI5 , EXTI6 , EXTI7 , DMA1_CH1 , DMA1_CH2 , DMA1_CH3 , DMA1_CH4 , DMA1_CH5 , DMA1_CH6 , DMA1_CH7) ; crate :: interrupt_mod ! (WWDG , PVD , FLASH , RCC , EXTI7_0 , AWU , DMA1_CHANNEL1 , DMA1_CHANNEL2 , DMA1_CHANNEL3 , DMA1_CHANNEL4 , DMA1_CHANNEL5 , DMA1_CHANNEL6 , DMA1_CHANNEL7 , ADC , I2C1_EV , I2C1_ER , USART1 , SPI1 , TIM1_BRK , TIM1_UP , TIM1_TRG_COM , TIM1_CC , TIM2 ,) ; impl crate :: peripheral :: SealedRccPeripheral for peripherals :: DMA1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: DMA1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: AFIO { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_afiorst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_afioen (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: AFIO { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_tim1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_tim1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: TIM2 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_tim2rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_tim2en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: TIM2 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_tim2_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: TIM2 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: USART1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_usart1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_usart1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: USART1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: I2C1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk1 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (true)) ; crate :: pac :: RCC . apb1prstr () . modify (| w | w . set_i2c1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb1pcenr () . modify (| w | w . set_i2c1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: I2C1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: SPI1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . hclk } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_spi1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_spi1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRemapPeripheral for peripherals :: SPI1 { fn set_remap (remap : u8) { crate :: pac :: AFIO . pcfr1 () . modify (| w | w . set_spi1_rm (unsafe { core :: mem :: transmute (remap) })) ; } } impl crate :: peripheral :: RemapPeripheral for peripherals :: SPI1 { } impl crate :: peripheral :: SealedRccPeripheral for peripherals :: ADC1 { fn frequency () -> crate :: time :: Hertz { crate :: rcc :: clocks () . pclk2 } fn enable_and_reset_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (true)) ; crate :: pac :: RCC . apb2prstr () . modify (| w | w . set_adc1rst (false)) ; } fn disable_with_cs (_cs : critical_section :: CriticalSection) { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_adc1en (false)) ; } } impl crate :: peripheral :: RccPeripheral for peripherals :: ADC1 { } pub unsafe fn init_dma () { crate :: pac :: RCC . ahbpcenr () . modify (| w | w . set_dma1en (true)) ; } pub unsafe fn init_gpio () { crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopaen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopcen (true)) ; crate :: pac :: RCC . apb2pcenr () . modify (| w | w . set_iopden (true)) ; } pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 0u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC6 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD3 , 1u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PC4 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PD4 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PD2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PA1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PC4 , 2u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PD0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PA2 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PD1 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM1 , PC2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM1 , PC4 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM1 , PD4 , 3u8) ; pin_trait_impl ! (crate :: timer :: BreakInputPin , TIM1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1ComplementaryPin , TIM1 , PC3 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2ComplementaryPin , TIM1 , PD2 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3ComplementaryPin , TIM1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PD4 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 0u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 0u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC5 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD2 , 1u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PC1 , 1u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PD3 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PC0 , 2u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD7 , 2u8) ; pin_trait_impl ! (crate :: timer :: ExternalTriggerPin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel1Pin , TIM2 , PC1 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel2Pin , TIM2 , PC7 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel3Pin , TIM2 , PD6 , 3u8) ; pin_trait_impl ! (crate :: timer :: Channel4Pin , TIM2 , PD5 , 3u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD4 , 0u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD5 , 0u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD6 , 0u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PD3 , 0u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 1u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC3 , 1u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC2 , 1u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PD7 , 2u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PD6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PD5 , 2u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 2u8) ; pin_trait_impl ! (crate :: usart :: CkPin , USART1 , PC5 , 3u8) ; pin_trait_impl ! (crate :: usart :: TxPin , USART1 , PC0 , 3u8) ; pin_trait_impl ! (crate :: usart :: RxPin , USART1 , PC1 , 3u8) ; pin_trait_impl ! (crate :: usart :: CtsPin , USART1 , PC6 , 3u8) ; pin_trait_impl ! (crate :: usart :: RtsPin , USART1 , PC7 , 3u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC2 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PD1 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PD0 , 1u8) ; pin_trait_impl ! (crate :: i2c :: SclPin , I2C1 , PC5 , 2u8) ; pin_trait_impl ! (crate :: i2c :: SdaPin , I2C1 , PC6 , 2u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC1 , 0u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 0u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 0u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 0u8) ; pin_trait_impl ! (crate :: spi :: CsPin , SPI1 , PC0 , 1u8) ; pin_trait_impl ! (crate :: spi :: SckPin , SPI1 , PC5 , 1u8) ; pin_trait_impl ! (crate :: spi :: MisoPin , SPI1 , PC7 , 1u8) ; pin_trait_impl ! (crate :: spi :: MosiPin , SPI1 , PC6 , 1u8) ; impl_adc_pin ! (ADC1 , PA2 , 0u8) ; impl_adc_pin ! (ADC1 , PA1 , 1u8) ; impl_adc_pin ! (ADC1 , PC4 , 2u8) ; impl_adc_pin ! (ADC1 , PD2 , 3u8) ; impl_adc_pin ! (ADC1 , PC3 , 4u8) ; impl_adc_pin ! (ADC1 , PD5 , 5u8) ; impl_adc_pin ! (ADC1 , PD6 , 6u8) ; impl_adc_pin ! (ADC1 , PD4 , 7u8) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM1 , { channel : DMA1_CH2 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch1Dma , TIM2 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch2Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch3Dma , TIM2 , { channel : DMA1_CH1 } , ()) ; dma_trait_impl ! (crate :: timer :: Ch4Dma , TIM2 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: usart :: RxDma , USART1 , { channel : DMA1_CH5 } , ()) ; dma_trait_impl ! (crate :: usart :: TxDma , USART1 , { channel : DMA1_CH4 } , ()) ; dma_trait_impl ! (crate :: i2c :: TxDma , I2C1 , { channel : DMA1_CH6 } , ()) ; dma_trait_impl ! (crate :: i2c :: RxDma , I2C1 , { channel : DMA1_CH7 } , ()) ; dma_trait_impl ! (crate :: spi :: TxDma , SPI1 , { channel : DMA1_CH3 } , ()) ; dma_trait_impl ! (crate :: spi :: RxDma , SPI1 , { channel : DMA1_CH2 } , ()) ; # [allow (non_camel_case_types)] pub mod peripheral_interrupts { pub mod PFIC { } pub mod SYSTICK { } pub mod FLASH { } pub mod EXTI { pub type EXTI0 = crate :: interrupt :: typelevel :: EXTI7_0 ; } pub mod RCC { } pub mod DMA1 { pub type CH1 = crate :: interrupt :: typelevel :: DMA1_CHANNEL1 ; pub type CH2 = crate :: interrupt :: typelevel :: DMA1_CHANNEL2 ; pub type CH3 = crate :: interrupt :: typelevel :: DMA1_CHANNEL3 ; pub type CH4 = crate :: interrupt :: typelevel :: DMA1_CHANNEL4 ; pub type CH5 = crate :: interrupt :: typelevel :: DMA1_CHANNEL5 ; pub type CH6 = crate :: interrupt :: typelevel :: DMA1_CHANNEL6 ; pub type CH7 = crate :: interrupt :: typelevel :: DMA1_CHANNEL7 ; } pub mod AFIO { } pub mod GPIOA { } pub mod GPIOC { } pub mod GPIOD { } pub mod TIM1 { pub type UP = crate :: interrupt :: typelevel :: TIM1_UP ; pub type CC = crate :: interrupt :: typelevel :: TIM1_CC ; pub type COM = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type TRG = crate :: interrupt :: typelevel :: TIM1_TRG_COM ; pub type BRK = crate :: interrupt :: typelevel :: TIM1_BRK ; } pub mod TIM2 { pub type UP = crate :: interrupt :: typelevel :: TIM2 ; pub type CC = crate :: interrupt :: typelevel :: TIM2 ; pub type TRG = crate :: interrupt :: typelevel :: TIM2 ; } pub mod USART1 { pub type GLOBAL = crate :: interrupt :: typelevel :: USART1 ; } pub mod I2C1 { pub type EV = crate :: interrupt :: typelevel :: I2C1_EV ; pub type ER = crate :: interrupt :: typelevel :: I2C1_ER ; } pub mod SPI1 { pub type GLOBAL = crate :: interrupt :: typelevel :: SPI1 ; } pub mod ADC1 { pub type GLOBAL = crate :: interrupt :: typelevel :: ADC ; } pub mod OPA { } } dma_channel_impl ! (DMA1_CH1 , 0u8) ; dma_channel_impl ! (DMA1_CH2 , 1u8) ; dma_channel_impl ! (DMA1_CH3 , 2u8) ; dma_channel_impl ! (DMA1_CH4 , 3u8) ; dma_channel_impl ! (DMA1_CH5 , 4u8) ; dma_channel_impl ! (DMA1_CH6 , 5u8) ; dma_channel_impl ! (DMA1_CH7 , 6u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } # [cfg (feature = "rt")] unsafe(# [qingke_rt :: interrupt]) unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: dma :: ChannelInterrupt > :: on_irq () ; } pub (crate) const DMA_CHANNELS : & [crate :: dma :: ChannelInfo] = & [crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 0usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 1usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 2usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 3usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 4usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 5usize , } , crate :: dma :: ChannelInfo { dma : crate :: dma :: DmaInfo :: Dma (crate :: pac :: DMA1) , num : 6usize , } ,] ;
[INFO] [stdout]   |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  +++++++                          +
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]    --> /opt/rustwide/cargo-home/git/checkouts/ch32-hal-f8ddd79b527ebc9f/5df0e89/src/exti.rs:354:5
[INFO] [stdout]     |
[INFO] [stdout] 354 |     #[interrupt]
[INFO] [stdout]     |     ^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]     |
[INFO] [stdout]     = note: this error originates in the attribute macro `interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]   --> /opt/rustwide/cargo-home/git/checkouts/ch32-hal-f8ddd79b527ebc9f/5df0e89/src/embassy/time_driver_tim.rs:58:9
[INFO] [stdout]    |
[INFO] [stdout] 58 |         #[interrupt]
[INFO] [stdout]    |         ^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]    |
[INFO] [stdout]    = note: this error originates in the attribute macro `interrupt` which comes from the expansion of the macro `foreach_interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17376
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...u8) ; # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL1 () { < crate :: peripherals :: DMA1_CH1 as crate :: ...
[INFO] [stdout]   |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17547
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...) ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL2 () { < crate :: peripherals :: DMA1_CH2 as crate :: ...
[INFO] [stdout]   |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17718
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...) ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL3 () { < crate :: peripherals :: DMA1_CH3 as crate :: ...
[INFO] [stdout]   |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:17889
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...) ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL4 () { < crate :: peripherals :: DMA1_CH4 as crate :: ...
[INFO] [stdout]   |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:18060
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...) ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL5 () { < crate :: peripherals :: DMA1_CH5 as crate :: ...
[INFO] [stdout]   |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:18231
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...) ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL6 () { < crate :: peripherals :: DMA1_CH6 as crate :: ...
[INFO] [stdout]   |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0787]: the `asm!` macro is not allowed in naked functions
[INFO] [stdout]  --> /opt/rustwide/target/debug/build/ch32-hal-f8312e0c45a45f20/out/_generated.rs:1:18402
[INFO] [stdout]   |
[INFO] [stdout] 1 | ...) ; } # [cfg (feature = "rt")] # [qingke_rt :: interrupt] unsafe fn DMA1_CHANNEL7 () { < crate :: peripherals :: DMA1_CH7 as crate :: ...
[INFO] [stdout]   |                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^ consider using the `naked_asm!` macro instead
[INFO] [stdout]   |
[INFO] [stdout]   = note: this error originates in the attribute macro `qingke_rt::interrupt` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] For more information about this error, try `rustc --explain E0787`.
[INFO] [stdout] 
[INFO] [stderr] error: could not compile `ch32-hal` (lib) due to 18 previous errors
[INFO] running `Command { std: "docker" "inspect" "8e9c38825882a23884126c08578ef2c108f9f41a0fca695f2c4c7e86be7861f4", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "8e9c38825882a23884126c08578ef2c108f9f41a0fca695f2c4c7e86be7861f4", kill_on_drop: false }`
[INFO] [stdout] 8e9c38825882a23884126c08578ef2c108f9f41a0fca695f2c4c7e86be7861f4
