[INFO] cloning repository https://github.com/yupferris/kaze
[INFO] running `Command { std: "git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/yupferris/kaze" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fyupferris%2Fkaze", kill_on_drop: false }`
[INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fyupferris%2Fkaze'...
[INFO] running `Command { std: "git" "rev-parse" "HEAD", kill_on_drop: false }`
[INFO] [stdout] 58c04571b2ed160f746f7e09e9ed2de5b981d595
[INFO] testing yupferris/kaze against master#d98a5da813da67eb189387b8ccfb73cf481275d8+rustflags=-Copt-level=3 for pr-138759
[INFO] running `Command { std: "git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fyupferris%2Fkaze" "/workspace/builds/worker-5-tc1/source", kill_on_drop: false }`
[INFO] [stderr] Cloning into '/workspace/builds/worker-5-tc1/source'...
[INFO] [stderr] done.
[INFO] started tweaking git repo https://github.com/yupferris/kaze
[INFO] finished tweaking git repo https://github.com/yupferris/kaze
[INFO] tweaked toml for git repo https://github.com/yupferris/kaze written to /workspace/builds/worker-5-tc1/source/Cargo.toml
[INFO] validating manifest of git repo https://github.com/yupferris/kaze on toolchain d98a5da813da67eb189387b8ccfb73cf481275d8
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+d98a5da813da67eb189387b8ccfb73cf481275d8" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+d98a5da813da67eb189387b8ccfb73cf481275d8" "generate-lockfile" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]     Updating crates.io index
[INFO] [stderr]      Locking 2 packages to latest compatible versions
[INFO] [stderr]       Adding vcd v0.6.1 (available: v0.7.0)
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+d98a5da813da67eb189387b8ccfb73cf481275d8" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]  Downloading crates ...
[INFO] [stderr]   Downloaded vcd v0.6.1
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+d98a5da813da67eb189387b8ccfb73cf481275d8" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] 3a47c110be17ad4cdfbe21fbf154ff1b813a9e3893d40da79474542f5e62c909
[INFO] running `Command { std: "docker" "start" "-a" "3a47c110be17ad4cdfbe21fbf154ff1b813a9e3893d40da79474542f5e62c909", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "3a47c110be17ad4cdfbe21fbf154ff1b813a9e3893d40da79474542f5e62c909", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "3a47c110be17ad4cdfbe21fbf154ff1b813a9e3893d40da79474542f5e62c909", kill_on_drop: false }`
[INFO] [stdout] 3a47c110be17ad4cdfbe21fbf154ff1b813a9e3893d40da79474542f5e62c909
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid -Copt-level=3" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+d98a5da813da67eb189387b8ccfb73cf481275d8" "build" "--frozen" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] e61e41fa13e27de33ed07cd8bb791cc72c947df9f4cbf525aba1039f0ae185a2
[INFO] running `Command { std: "docker" "start" "-a" "e61e41fa13e27de33ed07cd8bb791cc72c947df9f4cbf525aba1039f0ae185a2", kill_on_drop: false }`
[INFO] [stderr]    Compiling typed-arena v2.0.2
[INFO] [stderr]    Compiling vcd v0.6.1
[INFO] [stderr]    Compiling kaze v0.1.19 (/opt/rustwide/workdir/kaze)
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]   --> kaze/src/graph/context.rs:44:16
[INFO] [stdout]    |
[INFO] [stdout] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module;
[INFO] [stdout]    |                ^^                                                                     -------
[INFO] [stdout]    |                |                                                                      ||
[INFO] [stdout]    |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]    |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]    |
[INFO] [stdout] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a>;
[INFO] [stdout]    |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/context.rs:105:16
[INFO] [stdout]     |
[INFO] [stdout] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stdout]     |                ^^                                                                     -------
[INFO] [stdout]     |                |                                                                      ||
[INFO] [stdout]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/mem.rs:137:10
[INFO] [stdout]     |
[INFO] [stdout] 137 |         &'a self,
[INFO] [stdout]     |          ^^ these lifetimes flow to the output
[INFO] [stdout] 138 |         address: &'a dyn Signal<'a>,
[INFO] [stdout]     |                   ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                   |
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout] 139 |         enable: &'a dyn Signal<'a>,
[INFO] [stdout]     |                  ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                  |
[INFO] [stdout]     |                  these lifetimes flow to the output
[INFO] [stdout] 140 |     ) -> &dyn Signal<'a> {
[INFO] [stdout]     |          ---------------
[INFO] [stdout]     |          |           |
[INFO] [stdout]     |          |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 140 |     ) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]   --> kaze/src/graph/module.rs:92:17
[INFO] [stdout]    |
[INFO] [stdout] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &dyn Signal<'a> {
[INFO] [stdout]    |                 ^^                                                      ---------------
[INFO] [stdout]    |                 |                                                       |           |
[INFO] [stdout]    |                 |                                                       |           the lifetimes get resolved as `'a`
[INFO] [stdout]    |                 this lifetime flows to the output                       the lifetimes get resolved as `'a`
[INFO] [stdout]    |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]    |
[INFO] [stdout] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &'a dyn Signal<'a> {
[INFO] [stdout]    |                                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:134:17
[INFO] [stdout]     |
[INFO] [stdout] 134 |     pub fn low(&'a self) -> &dyn Signal<'a> {
[INFO] [stdout]     |                 ^^          ---------------
[INFO] [stdout]     |                 |           |           |
[INFO] [stdout]     |                 |           |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 134 |     pub fn low(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:153:18
[INFO] [stdout]     |
[INFO] [stdout] 153 |     pub fn high(&'a self) -> &dyn Signal<'a> {
[INFO] [stdout]     |                  ^^          ---------------
[INFO] [stdout]     |                  |           |           |
[INFO] [stdout]     |                  |           |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                  |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 153 |     pub fn high(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                               ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:174:19
[INFO] [stdout]     |
[INFO] [stdout] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &Input<'a> {
[INFO] [stdout]     |                   ^^                                                   ----------
[INFO] [stdout]     |                   |                                                    |      |
[INFO] [stdout]     |                   |                                                    |      the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Input<'a> {
[INFO] [stdout]     |                                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:228:20
[INFO] [stdout]     |
[INFO] [stdout] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &Output<'a> {
[INFO] [stdout]     |                    ^^                                         ^^            ^^      -----------
[INFO] [stdout]     |                    |                                          |             |       |       |
[INFO] [stdout]     |                    |                                          |             |       |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |                                          |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |                                          |             these lifetimes flow to the output
[INFO] [stdout]     |                    these lifetimes flow to the output         these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &'a Output<'a> {
[INFO] [stdout]     |                                                                                      ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:267:17
[INFO] [stdout]     |
[INFO] [stdout] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &Register<'a> {
[INFO] [stdout]     |                 ^^                                                   -------------
[INFO] [stdout]     |                 |                                                    |         |
[INFO] [stdout]     |                 |                                                    |         the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Register<'a> {
[INFO] [stdout]     |                                                                       ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:320:10
[INFO] [stdout]     |
[INFO] [stdout] 320 |         &'a self,
[INFO] [stdout]     |          ^^ these lifetimes flow to the output
[INFO] [stdout] 321 |         cond: &'a dyn Signal<'a>,
[INFO] [stdout]     |                ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                |
[INFO] [stdout]     |                these lifetimes flow to the output
[INFO] [stdout] 322 |         when_true: &'a dyn Signal<'a>,
[INFO] [stdout]     |                     ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                     |
[INFO] [stdout]     |                     these lifetimes flow to the output
[INFO] [stdout] 323 |         when_false: &'a dyn Signal<'a>,
[INFO] [stdout]     |                      ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                      |
[INFO] [stdout]     |                      these lifetimes flow to the output
[INFO] [stdout] 324 |     ) -> &dyn Signal<'a> {
[INFO] [stdout]     |          ---------------
[INFO] [stdout]     |          |           |
[INFO] [stdout]     |          |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 324 |     ) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:391:10
[INFO] [stdout]     |
[INFO] [stdout] 391 |         &'a self,
[INFO] [stdout]     |          ^^ this lifetime flows to the output
[INFO] [stdout] ...
[INFO] [stdout] 395 |     ) -> &Mem<'a> {
[INFO] [stdout]     |          --------
[INFO] [stdout]     |          |    |
[INFO] [stdout]     |          |    the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 395 |     ) -> &'a Mem<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:441:16
[INFO] [stdout]     |
[INFO] [stdout] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stdout]     |                ^^                                                                     -------
[INFO] [stdout]     |                |                                                                      ||
[INFO] [stdout]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:231:16
[INFO] [stdout]     |
[INFO] [stdout] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                |              |             |       |           |
[INFO] [stdout]     |                |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                |              |             these lifetimes flow to the output
[INFO] [stdout]     |                |              these lifetimes flow to the output
[INFO] [stdout]     |                these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                      ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:275:12
[INFO] [stdout]     |
[INFO] [stdout] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:322:12
[INFO] [stdout]     |
[INFO] [stdout] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:369:12
[INFO] [stdout]     |
[INFO] [stdout] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:416:12
[INFO] [stdout]     |
[INFO] [stdout] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:463:12
[INFO] [stdout]     |
[INFO] [stdout] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:510:12
[INFO] [stdout]     |
[INFO] [stdout] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:557:19
[INFO] [stdout]     |
[INFO] [stdout] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:607:19
[INFO] [stdout]     |
[INFO] [stdout] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:657:19
[INFO] [stdout]     |
[INFO] [stdout] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:707:19
[INFO] [stdout]     |
[INFO] [stdout] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:756:24
[INFO] [stdout]     |
[INFO] [stdout] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                        ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                        |              |             |       |           |
[INFO] [stdout]     |                        |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                        |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                        |              |             these lifetimes flow to the output
[INFO] [stdout]     |                        |              these lifetimes flow to the output
[INFO] [stdout]     |                        these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:796:20
[INFO] [stdout]     |
[INFO] [stdout] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                    ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                    |              |             |       |           |
[INFO] [stdout]     |                    |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |              |             these lifetimes flow to the output
[INFO] [stdout]     |                    |              these lifetimes flow to the output
[INFO] [stdout]     |                    these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]    Compiling sim-tests v0.1.0 (/opt/rustwide/workdir/sim-tests)
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:256:26
[INFO] [stdout]     |
[INFO] [stdout] 256 | fn input_masking<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                          ^^                           -----------
[INFO] [stdout]     |                          |                            |       |
[INFO] [stdout]     |                          |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                          |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                          this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout]     = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 256 | fn input_masking<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                        ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:264:25
[INFO] [stdout]     |
[INFO] [stdout] 264 | fn widest_input<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                         ^^                           -----------
[INFO] [stdout]     |                         |                            |       |
[INFO] [stdout]     |                         |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                         |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                         this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 264 | fn widest_input<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                       ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:272:28
[INFO] [stdout]     |
[INFO] [stdout] 272 | fn add_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 272 | fn add_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:302:28
[INFO] [stdout]     |
[INFO] [stdout] 302 | fn sub_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 302 | fn sub_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:332:28
[INFO] [stdout]     |
[INFO] [stdout] 332 | fn mul_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 332 | fn mul_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:366:35
[INFO] [stdout]     |
[INFO] [stdout] 366 | fn mul_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                   ^^                           -----------
[INFO] [stdout]     |                                   |                            |       |
[INFO] [stdout]     |                                   |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                   |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                   this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 366 | fn mul_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                 ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:400:28
[INFO] [stdout]     |
[INFO] [stdout] 400 | fn shl_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 400 | fn shl_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:442:28
[INFO] [stdout]     |
[INFO] [stdout] 442 | fn shr_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 442 | fn shr_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:484:39
[INFO] [stdout]     |
[INFO] [stdout] 484 | fn shr_arithmetic_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                       ^^                           -----------
[INFO] [stdout]     |                                       |                            |       |
[INFO] [stdout]     |                                       |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                       |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                       this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 484 | fn shr_arithmetic_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                     ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:526:32
[INFO] [stdout]     |
[INFO] [stdout] 526 | fn bit_and_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                ^^                           -----------
[INFO] [stdout]     |                                |                            |       |
[INFO] [stdout]     |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 526 | fn bit_and_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:536:31
[INFO] [stdout]     |
[INFO] [stdout] 536 | fn bit_or_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 536 | fn bit_or_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:546:32
[INFO] [stdout]     |
[INFO] [stdout] 546 | fn bit_xor_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                ^^                           -----------
[INFO] [stdout]     |                                |                            |       |
[INFO] [stdout]     |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 546 | fn bit_xor_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:556:28
[INFO] [stdout]     |
[INFO] [stdout] 556 | fn not_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 556 | fn not_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:565:28
[INFO] [stdout]     |
[INFO] [stdout] 565 | fn reg_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 565 | fn reg_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:580:29
[INFO] [stdout]     |
[INFO] [stdout] 580 | fn simple_reg_delay<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                             ^^                           -----------
[INFO] [stdout]     |                             |                            |       |
[INFO] [stdout]     |                             |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                             |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                             this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 580 | fn simple_reg_delay<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:597:30
[INFO] [stdout]     |
[INFO] [stdout] 597 | fn bit_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                              ^^                           -----------
[INFO] [stdout]     |                              |                            |       |
[INFO] [stdout]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 597 | fn bit_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:606:30
[INFO] [stdout]     |
[INFO] [stdout] 606 | fn bit_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                              ^^                           -----------
[INFO] [stdout]     |                              |                            |       |
[INFO] [stdout]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 606 | fn bit_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:618:31
[INFO] [stdout]     |
[INFO] [stdout] 618 | fn bits_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 618 | fn bits_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:632:31
[INFO] [stdout]     |
[INFO] [stdout] 632 | fn bits_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 632 | fn bits_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:653:31
[INFO] [stdout]     |
[INFO] [stdout] 653 | fn repeat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 653 | fn repeat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:671:31
[INFO] [stdout]     |
[INFO] [stdout] 671 | fn concat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 671 | fn concat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:689:27
[INFO] [stdout]     |
[INFO] [stdout] 689 | fn eq_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 689 | fn eq_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:700:27
[INFO] [stdout]     |
[INFO] [stdout] 700 | fn ne_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 700 | fn ne_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:711:27
[INFO] [stdout]     |
[INFO] [stdout] 711 | fn lt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 711 | fn lt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:722:27
[INFO] [stdout]     |
[INFO] [stdout] 722 | fn le_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 722 | fn le_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:733:27
[INFO] [stdout]     |
[INFO] [stdout] 733 | fn gt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 733 | fn gt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:744:27
[INFO] [stdout]     |
[INFO] [stdout] 744 | fn ge_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 744 | fn ge_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:755:34
[INFO] [stdout]     |
[INFO] [stdout] 755 | fn lt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 755 | fn lt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:766:34
[INFO] [stdout]     |
[INFO] [stdout] 766 | fn le_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 766 | fn le_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:777:34
[INFO] [stdout]     |
[INFO] [stdout] 777 | fn gt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 777 | fn gt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:788:34
[INFO] [stdout]     |
[INFO] [stdout] 788 | fn ge_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 788 | fn ge_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:799:28
[INFO] [stdout]     |
[INFO] [stdout] 799 | fn mux_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 799 | fn mux_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:831:33
[INFO] [stdout]     |
[INFO] [stdout] 831 | fn reg_next_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                 ^^                           -----------
[INFO] [stdout]     |                                 |                            |       |
[INFO] [stdout]     |                                 |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                 |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                 this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 831 | fn reg_next_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                               ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:842:46
[INFO] [stdout]     |
[INFO] [stdout] 842 | fn reg_next_with_default_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                              ^^                           -----------
[INFO] [stdout]     |                                              |                            |       |
[INFO] [stdout]     |                                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 842 | fn reg_next_with_default_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:856:43
[INFO] [stdout]     |
[INFO] [stdout] 856 | fn instantiation_test_module_comb<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                           ^^                           -----------
[INFO] [stdout]     |                                           |                            |       |
[INFO] [stdout]     |                                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 856 | fn instantiation_test_module_comb<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:895:42
[INFO] [stdout]     |
[INFO] [stdout] 895 | fn instantiation_test_module_reg<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                          ^^                           -----------
[INFO] [stdout]     |                                          |                            |       |
[INFO] [stdout]     |                                          |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                          |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                          this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 895 | fn instantiation_test_module_reg<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                        ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:936:45
[INFO] [stdout]     |
[INFO] [stdout] 936 | fn nested_instantiation_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                             ^^                           -----------
[INFO] [stdout]     |                                             |                            |       |
[INFO] [stdout]     |                                             |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                             |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                             this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 936 | fn nested_instantiation_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:993:30
[INFO] [stdout]     |
[INFO] [stdout] 993 | fn mem_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                              ^^                           -----------
[INFO] [stdout]     |                              |                            |       |
[INFO] [stdout]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 993 | fn mem_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1011:30
[INFO] [stdout]      |
[INFO] [stdout] 1011 | fn mem_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                              ^^                           -----------
[INFO] [stdout]      |                              |                            |       |
[INFO] [stdout]      |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1011 | fn mem_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1025:30
[INFO] [stdout]      |
[INFO] [stdout] 1025 | fn mem_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                              ^^                           -----------
[INFO] [stdout]      |                              |                            |       |
[INFO] [stdout]      |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1025 | fn mem_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1043:32
[INFO] [stdout]      |
[INFO] [stdout] 1043 | fn trace_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1043 | fn trace_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1055:32
[INFO] [stdout]      |
[INFO] [stdout] 1055 | fn trace_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1055 | fn trace_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1070:32
[INFO] [stdout]      |
[INFO] [stdout] 1070 | fn trace_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1070 | fn trace_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1108:32
[INFO] [stdout]      |
[INFO] [stdout] 1108 | fn trace_test_module_3<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1108 | fn trace_test_module_3<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1126:35
[INFO] [stdout]      |
[INFO] [stdout] 1126 | fn deep_graph_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                   ^^                           -----------
[INFO] [stdout]      |                                   |                            |       |
[INFO] [stdout]      |                                   |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                   |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                   this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1126 | fn deep_graph_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                                 ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]     Finished `dev` profile [unoptimized + debuginfo] target(s) in 6.68s
[INFO] running `Command { std: "docker" "inspect" "e61e41fa13e27de33ed07cd8bb791cc72c947df9f4cbf525aba1039f0ae185a2", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "e61e41fa13e27de33ed07cd8bb791cc72c947df9f4cbf525aba1039f0ae185a2", kill_on_drop: false }`
[INFO] [stdout] e61e41fa13e27de33ed07cd8bb791cc72c947df9f4cbf525aba1039f0ae185a2
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid -Copt-level=3" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+d98a5da813da67eb189387b8ccfb73cf481275d8" "test" "--frozen" "--no-run" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] c3b1c5a559a1c6ad98d509c76ed0643bc92bf4d391f78a22c08a9a845e4485ad
[INFO] running `Command { std: "docker" "start" "-a" "c3b1c5a559a1c6ad98d509c76ed0643bc92bf4d391f78a22c08a9a845e4485ad", kill_on_drop: false }`
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]   --> kaze/src/graph/context.rs:44:16
[INFO] [stdout]    |
[INFO] [stdout] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module;
[INFO] [stdout]    |                ^^                                                                     -------
[INFO] [stdout]    |                |                                                                      ||
[INFO] [stdout]    |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]    |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]    |
[INFO] [stdout] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a>;
[INFO] [stdout]    |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/context.rs:105:16
[INFO] [stdout]     |
[INFO] [stdout] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stdout]     |                ^^                                                                     -------
[INFO] [stdout]     |                |                                                                      ||
[INFO] [stdout]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/mem.rs:137:10
[INFO] [stdout]     |
[INFO] [stdout] 137 |         &'a self,
[INFO] [stdout]     |          ^^ these lifetimes flow to the output
[INFO] [stdout] 138 |         address: &'a dyn Signal<'a>,
[INFO] [stdout]     |                   ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                   |
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout] 139 |         enable: &'a dyn Signal<'a>,
[INFO] [stdout]     |                  ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                  |
[INFO] [stdout]     |                  these lifetimes flow to the output
[INFO] [stdout] 140 |     ) -> &dyn Signal<'a> {
[INFO] [stdout]     |          ---------------
[INFO] [stdout]     |          |           |
[INFO] [stdout]     |          |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 140 |     ) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]   --> kaze/src/graph/module.rs:92:17
[INFO] [stdout]    |
[INFO] [stdout] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &dyn Signal<'a> {
[INFO] [stdout]    |                 ^^                                                      ---------------
[INFO] [stdout]    |                 |                                                       |           |
[INFO] [stdout]    |                 |                                                       |           the lifetimes get resolved as `'a`
[INFO] [stdout]    |                 this lifetime flows to the output                       the lifetimes get resolved as `'a`
[INFO] [stdout]    |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]    |
[INFO] [stdout] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &'a dyn Signal<'a> {
[INFO] [stdout]    |                                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:134:17
[INFO] [stdout]     |
[INFO] [stdout] 134 |     pub fn low(&'a self) -> &dyn Signal<'a> {
[INFO] [stdout]     |                 ^^          ---------------
[INFO] [stdout]     |                 |           |           |
[INFO] [stdout]     |                 |           |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 134 |     pub fn low(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:153:18
[INFO] [stdout]     |
[INFO] [stdout] 153 |     pub fn high(&'a self) -> &dyn Signal<'a> {
[INFO] [stdout]     |                  ^^          ---------------
[INFO] [stdout]     |                  |           |           |
[INFO] [stdout]     |                  |           |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                  |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 153 |     pub fn high(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                               ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:174:19
[INFO] [stdout]     |
[INFO] [stdout] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &Input<'a> {
[INFO] [stdout]     |                   ^^                                                   ----------
[INFO] [stdout]     |                   |                                                    |      |
[INFO] [stdout]     |                   |                                                    |      the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Input<'a> {
[INFO] [stdout]     |                                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:228:20
[INFO] [stdout]     |
[INFO] [stdout] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &Output<'a> {
[INFO] [stdout]     |                    ^^                                         ^^            ^^      -----------
[INFO] [stdout]     |                    |                                          |             |       |       |
[INFO] [stdout]     |                    |                                          |             |       |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |                                          |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |                                          |             these lifetimes flow to the output
[INFO] [stdout]     |                    these lifetimes flow to the output         these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &'a Output<'a> {
[INFO] [stdout]     |                                                                                      ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:267:17
[INFO] [stdout]     |
[INFO] [stdout] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &Register<'a> {
[INFO] [stdout]     |                 ^^                                                   -------------
[INFO] [stdout]     |                 |                                                    |         |
[INFO] [stdout]     |                 |                                                    |         the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Register<'a> {
[INFO] [stdout]     |                                                                       ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:320:10
[INFO] [stdout]     |
[INFO] [stdout] 320 |         &'a self,
[INFO] [stdout]     |          ^^ these lifetimes flow to the output
[INFO] [stdout] 321 |         cond: &'a dyn Signal<'a>,
[INFO] [stdout]     |                ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                |
[INFO] [stdout]     |                these lifetimes flow to the output
[INFO] [stdout] 322 |         when_true: &'a dyn Signal<'a>,
[INFO] [stdout]     |                     ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                     |
[INFO] [stdout]     |                     these lifetimes flow to the output
[INFO] [stdout] 323 |         when_false: &'a dyn Signal<'a>,
[INFO] [stdout]     |                      ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                      |
[INFO] [stdout]     |                      these lifetimes flow to the output
[INFO] [stdout] 324 |     ) -> &dyn Signal<'a> {
[INFO] [stdout]     |          ---------------
[INFO] [stdout]     |          |           |
[INFO] [stdout]     |          |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 324 |     ) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:391:10
[INFO] [stdout]     |
[INFO] [stdout] 391 |         &'a self,
[INFO] [stdout]     |          ^^ this lifetime flows to the output
[INFO] [stdout] ...
[INFO] [stdout] 395 |     ) -> &Mem<'a> {
[INFO] [stdout]     |          --------
[INFO] [stdout]     |          |    |
[INFO] [stdout]     |          |    the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 395 |     ) -> &'a Mem<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:441:16
[INFO] [stdout]     |
[INFO] [stdout] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stdout]     |                ^^                                                                     -------
[INFO] [stdout]     |                |                                                                      ||
[INFO] [stdout]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:231:16
[INFO] [stdout]     |
[INFO] [stdout] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                |              |             |       |           |
[INFO] [stdout]     |                |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                |              |             these lifetimes flow to the output
[INFO] [stdout]     |                |              these lifetimes flow to the output
[INFO] [stdout]     |                these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                      ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:275:12
[INFO] [stdout]     |
[INFO] [stdout] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:322:12
[INFO] [stdout]     |
[INFO] [stdout] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:369:12
[INFO] [stdout]     |
[INFO] [stdout] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:416:12
[INFO] [stdout]     |
[INFO] [stdout] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:463:12
[INFO] [stdout]     |
[INFO] [stdout] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:510:12
[INFO] [stdout]     |
[INFO] [stdout] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]    Compiling kaze v0.1.19 (/opt/rustwide/workdir/kaze)
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:557:19
[INFO] [stdout]     |
[INFO] [stdout] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:607:19
[INFO] [stdout]     |
[INFO] [stdout] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:657:19
[INFO] [stdout]     |
[INFO] [stdout] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:707:19
[INFO] [stdout]     |
[INFO] [stdout] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:756:24
[INFO] [stdout]     |
[INFO] [stdout] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                        ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                        |              |             |       |           |
[INFO] [stdout]     |                        |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                        |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                        |              |             these lifetimes flow to the output
[INFO] [stdout]     |                        |              these lifetimes flow to the output
[INFO] [stdout]     |                        these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:796:20
[INFO] [stdout]     |
[INFO] [stdout] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                    ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                    |              |             |       |           |
[INFO] [stdout]     |                    |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |              |             these lifetimes flow to the output
[INFO] [stdout]     |                    |              these lifetimes flow to the output
[INFO] [stdout]     |                    these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:256:26
[INFO] [stdout]     |
[INFO] [stdout] 256 | fn input_masking<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                          ^^                           -----------
[INFO] [stdout]     |                          |                            |       |
[INFO] [stdout]     |                          |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                          |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                          this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout]     = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 256 | fn input_masking<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                        ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:264:25
[INFO] [stdout]     |
[INFO] [stdout] 264 | fn widest_input<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                         ^^                           -----------
[INFO] [stdout]     |                         |                            |       |
[INFO] [stdout]     |                         |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                         |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                         this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 264 | fn widest_input<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                       ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:272:28
[INFO] [stdout]     |
[INFO] [stdout] 272 | fn add_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 272 | fn add_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:302:28
[INFO] [stdout]     |
[INFO] [stdout] 302 | fn sub_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 302 | fn sub_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:332:28
[INFO] [stdout]     |
[INFO] [stdout] 332 | fn mul_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 332 | fn mul_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:366:35
[INFO] [stdout]     |
[INFO] [stdout] 366 | fn mul_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                   ^^                           -----------
[INFO] [stdout]     |                                   |                            |       |
[INFO] [stdout]     |                                   |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                   |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                   this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 366 | fn mul_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                 ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:400:28
[INFO] [stdout]     |
[INFO] [stdout] 400 | fn shl_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 400 | fn shl_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:442:28
[INFO] [stdout]     |
[INFO] [stdout] 442 | fn shr_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 442 | fn shr_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:484:39
[INFO] [stdout]     |
[INFO] [stdout] 484 | fn shr_arithmetic_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                       ^^                           -----------
[INFO] [stdout]     |                                       |                            |       |
[INFO] [stdout]     |                                       |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                       |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                       this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 484 | fn shr_arithmetic_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                     ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:526:32
[INFO] [stdout]     |
[INFO] [stdout] 526 | fn bit_and_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                ^^                           -----------
[INFO] [stdout]     |                                |                            |       |
[INFO] [stdout]     |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 526 | fn bit_and_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:536:31
[INFO] [stdout]     |
[INFO] [stdout] 536 | fn bit_or_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 536 | fn bit_or_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:546:32
[INFO] [stdout]     |
[INFO] [stdout] 546 | fn bit_xor_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                ^^                           -----------
[INFO] [stdout]     |                                |                            |       |
[INFO] [stdout]     |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 546 | fn bit_xor_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:556:28
[INFO] [stdout]     |
[INFO] [stdout] 556 | fn not_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 556 | fn not_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:565:28
[INFO] [stdout]     |
[INFO] [stdout] 565 | fn reg_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 565 | fn reg_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:580:29
[INFO] [stdout]     |
[INFO] [stdout] 580 | fn simple_reg_delay<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                             ^^                           -----------
[INFO] [stdout]     |                             |                            |       |
[INFO] [stdout]     |                             |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                             |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                             this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 580 | fn simple_reg_delay<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:597:30
[INFO] [stdout]     |
[INFO] [stdout] 597 | fn bit_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                              ^^                           -----------
[INFO] [stdout]     |                              |                            |       |
[INFO] [stdout]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 597 | fn bit_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:606:30
[INFO] [stdout]     |
[INFO] [stdout] 606 | fn bit_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                              ^^                           -----------
[INFO] [stdout]     |                              |                            |       |
[INFO] [stdout]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 606 | fn bit_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:618:31
[INFO] [stdout]     |
[INFO] [stdout] 618 | fn bits_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 618 | fn bits_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:632:31
[INFO] [stdout]     |
[INFO] [stdout] 632 | fn bits_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 632 | fn bits_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:653:31
[INFO] [stdout]     |
[INFO] [stdout] 653 | fn repeat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 653 | fn repeat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:671:31
[INFO] [stdout]     |
[INFO] [stdout] 671 | fn concat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                               ^^                           -----------
[INFO] [stdout]     |                               |                            |       |
[INFO] [stdout]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                               this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 671 | fn concat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                             ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:689:27
[INFO] [stdout]     |
[INFO] [stdout] 689 | fn eq_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 689 | fn eq_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:700:27
[INFO] [stdout]     |
[INFO] [stdout] 700 | fn ne_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 700 | fn ne_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:711:27
[INFO] [stdout]     |
[INFO] [stdout] 711 | fn lt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 711 | fn lt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:722:27
[INFO] [stdout]     |
[INFO] [stdout] 722 | fn le_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 722 | fn le_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:733:27
[INFO] [stdout]     |
[INFO] [stdout] 733 | fn gt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 733 | fn gt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:744:27
[INFO] [stdout]     |
[INFO] [stdout] 744 | fn ge_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                           ^^                           -----------
[INFO] [stdout]     |                           |                            |       |
[INFO] [stdout]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 744 | fn ge_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:755:34
[INFO] [stdout]     |
[INFO] [stdout] 755 | fn lt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 755 | fn lt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:766:34
[INFO] [stdout]     |
[INFO] [stdout] 766 | fn le_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 766 | fn le_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:777:34
[INFO] [stdout]     |
[INFO] [stdout] 777 | fn gt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 777 | fn gt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:788:34
[INFO] [stdout]     |
[INFO] [stdout] 788 | fn ge_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                  ^^                           -----------
[INFO] [stdout]     |                                  |                            |       |
[INFO] [stdout]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 788 | fn ge_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:799:28
[INFO] [stdout]     |
[INFO] [stdout] 799 | fn mux_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                            ^^                           -----------
[INFO] [stdout]     |                            |                            |       |
[INFO] [stdout]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                            this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 799 | fn mux_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:831:33
[INFO] [stdout]     |
[INFO] [stdout] 831 | fn reg_next_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                 ^^                           -----------
[INFO] [stdout]     |                                 |                            |       |
[INFO] [stdout]     |                                 |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                 |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                 this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 831 | fn reg_next_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                               ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:842:46
[INFO] [stdout]     |
[INFO] [stdout] 842 | fn reg_next_with_default_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                              ^^                           -----------
[INFO] [stdout]     |                                              |                            |       |
[INFO] [stdout]     |                                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 842 | fn reg_next_with_default_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:856:43
[INFO] [stdout]     |
[INFO] [stdout] 856 | fn instantiation_test_module_comb<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                           ^^                           -----------
[INFO] [stdout]     |                                           |                            |       |
[INFO] [stdout]     |                                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                           |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                           this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 856 | fn instantiation_test_module_comb<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:895:42
[INFO] [stdout]     |
[INFO] [stdout] 895 | fn instantiation_test_module_reg<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                          ^^                           -----------
[INFO] [stdout]     |                                          |                            |       |
[INFO] [stdout]     |                                          |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                          |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                          this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 895 | fn instantiation_test_module_reg<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                        ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]    Compiling sim-tests v0.1.0 (/opt/rustwide/workdir/sim-tests)
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:936:45
[INFO] [stdout]     |
[INFO] [stdout] 936 | fn nested_instantiation_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                                             ^^                           -----------
[INFO] [stdout]     |                                             |                            |       |
[INFO] [stdout]     |                                             |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                             |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                                             this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 936 | fn nested_instantiation_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> sim-tests/build.rs:993:30
[INFO] [stdout]     |
[INFO] [stdout] 993 | fn mem_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]     |                              ^^                           -----------
[INFO] [stdout]     |                              |                            |       |
[INFO] [stdout]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]     |                              this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 993 | fn mem_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1011:30
[INFO] [stdout]      |
[INFO] [stdout] 1011 | fn mem_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                              ^^                           -----------
[INFO] [stdout]      |                              |                            |       |
[INFO] [stdout]      |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1011 | fn mem_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1025:30
[INFO] [stdout]      |
[INFO] [stdout] 1025 | fn mem_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                              ^^                           -----------
[INFO] [stdout]      |                              |                            |       |
[INFO] [stdout]      |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                              this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1025 | fn mem_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                            ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1043:32
[INFO] [stdout]      |
[INFO] [stdout] 1043 | fn trace_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1043 | fn trace_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1055:32
[INFO] [stdout]      |
[INFO] [stdout] 1055 | fn trace_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1055 | fn trace_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1070:32
[INFO] [stdout]      |
[INFO] [stdout] 1070 | fn trace_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1070 | fn trace_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1108:32
[INFO] [stdout]      |
[INFO] [stdout] 1108 | fn trace_test_module_3<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                ^^                           -----------
[INFO] [stdout]      |                                |                            |       |
[INFO] [stdout]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1108 | fn trace_test_module_3<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]     --> sim-tests/build.rs:1126:35
[INFO] [stdout]      |
[INFO] [stdout] 1126 | fn deep_graph_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stdout]      |                                   ^^                           -----------
[INFO] [stdout]      |                                   |                            |       |
[INFO] [stdout]      |                                   |                            |       the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                   |                            the lifetimes get resolved as `'a`
[INFO] [stdout]      |                                   this lifetime flows to the output
[INFO] [stdout]      |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]      |
[INFO] [stdout] 1126 | fn deep_graph_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stdout]      |                                                                 ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2130:5
[INFO] [stdout]      |
[INFO] [stdout] 2130 |     __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6: T::SignalId,
[INFO] [stdout]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_address_6`
[INFO] [stdout]      |
[INFO] [stdout]      = note: `#[warn(non_snake_case)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2131:5
[INFO] [stdout]      |
[INFO] [stdout] 2131 |     __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7: T::SignalId,
[INFO] [stdout]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_enable_7`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2132:5
[INFO] [stdout]      |
[INFO] [stdout] 2132 |     __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8: T::SignalId,
[INFO] [stdout]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_address_8`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2133:5
[INFO] [stdout]      |
[INFO] [stdout] 2133 |     __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9: T::SignalId,
[INFO] [stdout]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_value_9`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2134:5
[INFO] [stdout]      |
[INFO] [stdout] 2134 |     __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10: T::SignalId,
[INFO] [stdout]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_enable_10`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2148:13
[INFO] [stdout]      |
[INFO] [stdout] 2148 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6 = trace.add_signal("__mem_trace_test_module_3_mem_0_r...
[INFO] [stdout]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_address_6`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2149:13
[INFO] [stdout]      |
[INFO] [stdout] 2149 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7 = trace.add_signal("__mem_trace_test_module_3_mem_0_re...
[INFO] [stdout]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_enable_7`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2150:13
[INFO] [stdout]      |
[INFO] [stdout] 2150 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8 = trace.add_signal("__mem_trace_test_module_3_mem_0_wr...
[INFO] [stdout]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_address_8`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2151:13
[INFO] [stdout]      |
[INFO] [stdout] 2151 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9 = trace.add_signal("__mem_trace_test_module_3_mem_0_writ...
[INFO] [stdout]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_value_9`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10` should have a snake case name
[INFO] [stdout]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2152:13
[INFO] [stdout]      |
[INFO] [stdout] 2152 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10 = trace.add_signal("__mem_trace_test_module_3_mem_0_wr...
[INFO] [stdout]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_enable_10`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]   --> kaze/src/graph/context.rs:44:16
[INFO] [stdout]    |
[INFO] [stdout] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module;
[INFO] [stdout]    |                ^^                                                                     -------
[INFO] [stdout]    |                |                                                                      ||
[INFO] [stdout]    |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]    |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]    |
[INFO] [stdout] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a>;
[INFO] [stdout]    |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/context.rs:105:16
[INFO] [stdout]     |
[INFO] [stdout] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stdout]     |                ^^                                                                     -------
[INFO] [stdout]     |                |                                                                      ||
[INFO] [stdout]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/mem.rs:137:10
[INFO] [stdout]     |
[INFO] [stdout] 137 |         &'a self,
[INFO] [stdout]     |          ^^ these lifetimes flow to the output
[INFO] [stdout] 138 |         address: &'a dyn Signal<'a>,
[INFO] [stdout]     |                   ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                   |
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout] 139 |         enable: &'a dyn Signal<'a>,
[INFO] [stdout]     |                  ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                  |
[INFO] [stdout]     |                  these lifetimes flow to the output
[INFO] [stdout] 140 |     ) -> &dyn Signal<'a> {
[INFO] [stdout]     |          ---------------
[INFO] [stdout]     |          |           |
[INFO] [stdout]     |          |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 140 |     ) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]   --> kaze/src/graph/module.rs:92:17
[INFO] [stdout]    |
[INFO] [stdout] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &dyn Signal<'a> {
[INFO] [stdout]    |                 ^^                                                      ---------------
[INFO] [stdout]    |                 |                                                       |           |
[INFO] [stdout]    |                 |                                                       |           the lifetimes get resolved as `'a`
[INFO] [stdout]    |                 this lifetime flows to the output                       the lifetimes get resolved as `'a`
[INFO] [stdout]    |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]    |
[INFO] [stdout] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &'a dyn Signal<'a> {
[INFO] [stdout]    |                                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:134:17
[INFO] [stdout]     |
[INFO] [stdout] 134 |     pub fn low(&'a self) -> &dyn Signal<'a> {
[INFO] [stdout]     |                 ^^          ---------------
[INFO] [stdout]     |                 |           |           |
[INFO] [stdout]     |                 |           |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 134 |     pub fn low(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:153:18
[INFO] [stdout]     |
[INFO] [stdout] 153 |     pub fn high(&'a self) -> &dyn Signal<'a> {
[INFO] [stdout]     |                  ^^          ---------------
[INFO] [stdout]     |                  |           |           |
[INFO] [stdout]     |                  |           |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                  |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                  this lifetime flows to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 153 |     pub fn high(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                               ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:174:19
[INFO] [stdout]     |
[INFO] [stdout] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &Input<'a> {
[INFO] [stdout]     |                   ^^                                                   ----------
[INFO] [stdout]     |                   |                                                    |      |
[INFO] [stdout]     |                   |                                                    |      the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Input<'a> {
[INFO] [stdout]     |                                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:228:20
[INFO] [stdout]     |
[INFO] [stdout] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &Output<'a> {
[INFO] [stdout]     |                    ^^                                         ^^            ^^      -----------
[INFO] [stdout]     |                    |                                          |             |       |       |
[INFO] [stdout]     |                    |                                          |             |       |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |                                          |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |                                          |             these lifetimes flow to the output
[INFO] [stdout]     |                    these lifetimes flow to the output         these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &'a Output<'a> {
[INFO] [stdout]     |                                                                                      ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:267:17
[INFO] [stdout]     |
[INFO] [stdout] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &Register<'a> {
[INFO] [stdout]     |                 ^^                                                   -------------
[INFO] [stdout]     |                 |                                                    |         |
[INFO] [stdout]     |                 |                                                    |         the lifetimes get resolved as `'a`
[INFO] [stdout]     |                 this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Register<'a> {
[INFO] [stdout]     |                                                                       ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:320:10
[INFO] [stdout]     |
[INFO] [stdout] 320 |         &'a self,
[INFO] [stdout]     |          ^^ these lifetimes flow to the output
[INFO] [stdout] 321 |         cond: &'a dyn Signal<'a>,
[INFO] [stdout]     |                ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                |
[INFO] [stdout]     |                these lifetimes flow to the output
[INFO] [stdout] 322 |         when_true: &'a dyn Signal<'a>,
[INFO] [stdout]     |                     ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                     |
[INFO] [stdout]     |                     these lifetimes flow to the output
[INFO] [stdout] 323 |         when_false: &'a dyn Signal<'a>,
[INFO] [stdout]     |                      ^^            ^^ these lifetimes flow to the output
[INFO] [stdout]     |                      |
[INFO] [stdout]     |                      these lifetimes flow to the output
[INFO] [stdout] 324 |     ) -> &dyn Signal<'a> {
[INFO] [stdout]     |          ---------------
[INFO] [stdout]     |          |           |
[INFO] [stdout]     |          |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 324 |     ) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:391:10
[INFO] [stdout]     |
[INFO] [stdout] 391 |         &'a self,
[INFO] [stdout]     |          ^^ this lifetime flows to the output
[INFO] [stdout] ...
[INFO] [stdout] 395 |     ) -> &Mem<'a> {
[INFO] [stdout]     |          --------
[INFO] [stdout]     |          |    |
[INFO] [stdout]     |          |    the lifetimes get resolved as `'a`
[INFO] [stdout]     |          the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 395 |     ) -> &'a Mem<'a> {
[INFO] [stdout]     |           ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/module.rs:441:16
[INFO] [stdout]     |
[INFO] [stdout] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stdout]     |                ^^                                                                     -------
[INFO] [stdout]     |                |                                                                      ||
[INFO] [stdout]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stdout]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stdout]     |                                                                                        ++       ++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:231:16
[INFO] [stdout]     |
[INFO] [stdout] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                |              |             |       |           |
[INFO] [stdout]     |                |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                |              |             these lifetimes flow to the output
[INFO] [stdout]     |                |              these lifetimes flow to the output
[INFO] [stdout]     |                these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                      ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:275:12
[INFO] [stdout]     |
[INFO] [stdout] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:322:12
[INFO] [stdout]     |
[INFO] [stdout] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:369:12
[INFO] [stdout]     |
[INFO] [stdout] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:416:12
[INFO] [stdout]     |
[INFO] [stdout] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:463:12
[INFO] [stdout]     |
[INFO] [stdout] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:510:12
[INFO] [stdout]     |
[INFO] [stdout] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |            ^^             ^^            ^^      ---------------
[INFO] [stdout]     |            |              |             |       |           |
[INFO] [stdout]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |            |              |             these lifetimes flow to the output
[INFO] [stdout]     |            |              these lifetimes flow to the output
[INFO] [stdout]     |            these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                  ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:557:19
[INFO] [stdout]     |
[INFO] [stdout] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:607:19
[INFO] [stdout]     |
[INFO] [stdout] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:657:19
[INFO] [stdout]     |
[INFO] [stdout] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:707:19
[INFO] [stdout]     |
[INFO] [stdout] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                   ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                   |              |             |       |           |
[INFO] [stdout]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                   |              |             these lifetimes flow to the output
[INFO] [stdout]     |                   |              these lifetimes flow to the output
[INFO] [stdout]     |                   these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                         ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:756:24
[INFO] [stdout]     |
[INFO] [stdout] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                        ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                        |              |             |       |           |
[INFO] [stdout]     |                        |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                        |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                        |              |             these lifetimes flow to the output
[INFO] [stdout]     |                        |              these lifetimes flow to the output
[INFO] [stdout]     |                        these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                              ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stdout]    --> kaze/src/graph/signal.rs:796:20
[INFO] [stdout]     |
[INFO] [stdout] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stdout]     |                    ^^             ^^            ^^      ---------------
[INFO] [stdout]     |                    |              |             |       |           |
[INFO] [stdout]     |                    |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |              |             |       the lifetimes get resolved as `'a`
[INFO] [stdout]     |                    |              |             these lifetimes flow to the output
[INFO] [stdout]     |                    |              these lifetimes flow to the output
[INFO] [stdout]     |                    these lifetimes flow to the output
[INFO] [stdout]     |
[INFO] [stdout] help: one option is to consistently use `'a`
[INFO] [stdout]     |
[INFO] [stdout] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stdout]     |                                                          ++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr]     Finished `test` profile [unoptimized + debuginfo] target(s) in 8.38s
[INFO] running `Command { std: "docker" "inspect" "c3b1c5a559a1c6ad98d509c76ed0643bc92bf4d391f78a22c08a9a845e4485ad", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "c3b1c5a559a1c6ad98d509c76ed0643bc92bf4d391f78a22c08a9a845e4485ad", kill_on_drop: false }`
[INFO] [stdout] c3b1c5a559a1c6ad98d509c76ed0643bc92bf4d391f78a22c08a9a845e4485ad
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-5-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid -Copt-level=3" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:e90291280db7d1fac5b66fc6dad9f9662629e7365a55743daf9bdf73ebc4ea79" "/opt/rustwide/cargo-home/bin/cargo" "+d98a5da813da67eb189387b8ccfb73cf481275d8" "test" "--frozen", kill_on_drop: false }`
[INFO] [stdout] 794a0e23eb5396daa00ccfcbd6aa957ea54f42334ef7666dbbd199094a1c383c
[INFO] running `Command { std: "docker" "start" "-a" "794a0e23eb5396daa00ccfcbd6aa957ea54f42334ef7666dbbd199094a1c383c", kill_on_drop: false }`
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]   --> kaze/src/graph/context.rs:44:16
[INFO] [stderr]    |
[INFO] [stderr] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module;
[INFO] [stderr]    |                ^^                                                                     -------
[INFO] [stderr]    |                |                                                                      ||
[INFO] [stderr]    |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stderr]    |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]    |
[INFO] [stderr] 44 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a>;
[INFO] [stderr]    |                                                                                        ++       ++++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/context.rs:105:16
[INFO] [stderr]     |
[INFO] [stderr] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stderr]     |                ^^                                                                     -------
[INFO] [stderr]     |                |                                                                      ||
[INFO] [stderr]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stderr]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 105 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                                        ++       ++++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/mem.rs:137:10
[INFO] [stderr]     |
[INFO] [stderr] 137 |         &'a self,
[INFO] [stderr]     |          ^^ these lifetimes flow to the output
[INFO] [stderr] 138 |         address: &'a dyn Signal<'a>,
[INFO] [stderr]     |                   ^^            ^^ these lifetimes flow to the output
[INFO] [stderr]     |                   |
[INFO] [stderr]     |                   these lifetimes flow to the output
[INFO] [stderr] 139 |         enable: &'a dyn Signal<'a>,
[INFO] [stderr]     |                  ^^            ^^ these lifetimes flow to the output
[INFO] [stderr]     |                  |
[INFO] [stderr]     |                  these lifetimes flow to the output
[INFO] [stderr] 140 |     ) -> &dyn Signal<'a> {
[INFO] [stderr]     |          ---------------
[INFO] [stderr]     |          |           |
[INFO] [stderr]     |          |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |          the lifetimes get resolved as `'a`
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 140 |     ) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |           ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]   --> kaze/src/graph/module.rs:92:17
[INFO] [stderr]    |
[INFO] [stderr] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &dyn Signal<'a> {
[INFO] [stderr]    |                 ^^                                                      ---------------
[INFO] [stderr]    |                 |                                                       |           |
[INFO] [stderr]    |                 |                                                       |           the lifetimes get resolved as `'a`
[INFO] [stderr]    |                 this lifetime flows to the output                       the lifetimes get resolved as `'a`
[INFO] [stderr]    |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]    |
[INFO] [stderr] 92 |     pub fn lit(&'a self, value: impl Into<Constant>, bit_width: u32) -> &'a dyn Signal<'a> {
[INFO] [stderr]    |                                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:134:17
[INFO] [stderr]     |
[INFO] [stderr] 134 |     pub fn low(&'a self) -> &dyn Signal<'a> {
[INFO] [stderr]     |                 ^^          ---------------
[INFO] [stderr]     |                 |           |           |
[INFO] [stderr]     |                 |           |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                 |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                 this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 134 |     pub fn low(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:153:18
[INFO] [stderr]     |
[INFO] [stderr] 153 |     pub fn high(&'a self) -> &dyn Signal<'a> {
[INFO] [stderr]     |                  ^^          ---------------
[INFO] [stderr]     |                  |           |           |
[INFO] [stderr]     |                  |           |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                  |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                  this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 153 |     pub fn high(&'a self) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                               ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:174:19
[INFO] [stderr]     |
[INFO] [stderr] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &Input<'a> {
[INFO] [stderr]     |                   ^^                                                   ----------
[INFO] [stderr]     |                   |                                                    |      |
[INFO] [stderr]     |                   |                                                    |      the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 174 |     pub fn input(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Input<'a> {
[INFO] [stderr]     |                                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:228:20
[INFO] [stderr]     |
[INFO] [stderr] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &Output<'a> {
[INFO] [stderr]     |                    ^^                                         ^^            ^^      -----------
[INFO] [stderr]     |                    |                                          |             |       |       |
[INFO] [stderr]     |                    |                                          |             |       |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                    |                                          |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                    |                                          |             these lifetimes flow to the output
[INFO] [stderr]     |                    these lifetimes flow to the output         these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 228 |     pub fn output(&'a self, name: impl Into<String>, source: &'a dyn Signal<'a>) -> &'a Output<'a> {
[INFO] [stderr]     |                                                                                      ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:267:17
[INFO] [stderr]     |
[INFO] [stderr] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &Register<'a> {
[INFO] [stderr]     |                 ^^                                                   -------------
[INFO] [stderr]     |                 |                                                    |         |
[INFO] [stderr]     |                 |                                                    |         the lifetimes get resolved as `'a`
[INFO] [stderr]     |                 this lifetime flows to the output                    the lifetimes get resolved as `'a`
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 267 |     pub fn reg(&'a self, name: impl Into<String>, bit_width: u32) -> &'a Register<'a> {
[INFO] [stderr]     |                                                                       ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:320:10
[INFO] [stderr]     |
[INFO] [stderr] 320 |         &'a self,
[INFO] [stderr]     |          ^^ these lifetimes flow to the output
[INFO] [stderr] 321 |         cond: &'a dyn Signal<'a>,
[INFO] [stderr]     |                ^^            ^^ these lifetimes flow to the output
[INFO] [stderr]     |                |
[INFO] [stderr]     |                these lifetimes flow to the output
[INFO] [stderr] 322 |         when_true: &'a dyn Signal<'a>,
[INFO] [stderr]     |                     ^^            ^^ these lifetimes flow to the output
[INFO] [stderr]     |                     |
[INFO] [stderr]     |                     these lifetimes flow to the output
[INFO] [stderr] 323 |         when_false: &'a dyn Signal<'a>,
[INFO] [stderr]     |                      ^^            ^^ these lifetimes flow to the output
[INFO] [stderr]     |                      |
[INFO] [stderr]     |                      these lifetimes flow to the output
[INFO] [stderr] 324 |     ) -> &dyn Signal<'a> {
[INFO] [stderr]     |          ---------------
[INFO] [stderr]     |          |           |
[INFO] [stderr]     |          |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |          the lifetimes get resolved as `'a`
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 324 |     ) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |           ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:391:10
[INFO] [stderr]     |
[INFO] [stderr] 391 |         &'a self,
[INFO] [stderr]     |          ^^ this lifetime flows to the output
[INFO] [stderr] ...
[INFO] [stderr] 395 |     ) -> &Mem<'a> {
[INFO] [stderr]     |          --------
[INFO] [stderr]     |          |    |
[INFO] [stderr]     |          |    the lifetimes get resolved as `'a`
[INFO] [stderr]     |          the lifetimes get resolved as `'a`
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 395 |     ) -> &'a Mem<'a> {
[INFO] [stderr]     |           ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/module.rs:441:16
[INFO] [stderr]     |
[INFO] [stderr] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &Module {
[INFO] [stderr]     |                ^^                                                                     -------
[INFO] [stderr]     |                |                                                                      ||
[INFO] [stderr]     |                |                                                                      |the lifetimes get resolved as `'a`
[INFO] [stderr]     |                this lifetime flows to the output                                      the lifetimes get resolved as `'a`
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 441 |     fn module(&'a self, instance_name: impl Into<String>, name: impl Into<String>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                                        ++       ++++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:231:16
[INFO] [stderr]     |
[INFO] [stderr] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |                ^^             ^^            ^^      ---------------
[INFO] [stderr]     |                |              |             |       |           |
[INFO] [stderr]     |                |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                |              |             these lifetimes flow to the output
[INFO] [stderr]     |                |              these lifetimes flow to the output
[INFO] [stderr]     |                these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 231 |     fn concat(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                      ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:275:12
[INFO] [stderr]     |
[INFO] [stderr] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |            ^^             ^^            ^^      ---------------
[INFO] [stderr]     |            |              |             |       |           |
[INFO] [stderr]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             these lifetimes flow to the output
[INFO] [stderr]     |            |              these lifetimes flow to the output
[INFO] [stderr]     |            these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 275 |     fn eq(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                  ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:322:12
[INFO] [stderr]     |
[INFO] [stderr] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |            ^^             ^^            ^^      ---------------
[INFO] [stderr]     |            |              |             |       |           |
[INFO] [stderr]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             these lifetimes flow to the output
[INFO] [stderr]     |            |              these lifetimes flow to the output
[INFO] [stderr]     |            these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 322 |     fn ne(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                  ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:369:12
[INFO] [stderr]     |
[INFO] [stderr] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |            ^^             ^^            ^^      ---------------
[INFO] [stderr]     |            |              |             |       |           |
[INFO] [stderr]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             these lifetimes flow to the output
[INFO] [stderr]     |            |              these lifetimes flow to the output
[INFO] [stderr]     |            these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 369 |     fn lt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                  ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:416:12
[INFO] [stderr]     |
[INFO] [stderr] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |            ^^             ^^            ^^      ---------------
[INFO] [stderr]     |            |              |             |       |           |
[INFO] [stderr]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             these lifetimes flow to the output
[INFO] [stderr]     |            |              these lifetimes flow to the output
[INFO] [stderr]     |            these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 416 |     fn le(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                  ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:463:12
[INFO] [stderr]     |
[INFO] [stderr] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |            ^^             ^^            ^^      ---------------
[INFO] [stderr]     |            |              |             |       |           |
[INFO] [stderr]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             these lifetimes flow to the output
[INFO] [stderr]     |            |              these lifetimes flow to the output
[INFO] [stderr]     |            these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 463 |     fn gt(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                  ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:510:12
[INFO] [stderr]     |
[INFO] [stderr] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |            ^^             ^^            ^^      ---------------
[INFO] [stderr]     |            |              |             |       |           |
[INFO] [stderr]     |            |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |            |              |             these lifetimes flow to the output
[INFO] [stderr]     |            |              these lifetimes flow to the output
[INFO] [stderr]     |            these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 510 |     fn ge(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                  ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:557:19
[INFO] [stderr]     |
[INFO] [stderr] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |                   ^^             ^^            ^^      ---------------
[INFO] [stderr]     |                   |              |             |       |           |
[INFO] [stderr]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             these lifetimes flow to the output
[INFO] [stderr]     |                   |              these lifetimes flow to the output
[INFO] [stderr]     |                   these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 557 |     fn lt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:607:19
[INFO] [stderr]     |
[INFO] [stderr] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |                   ^^             ^^            ^^      ---------------
[INFO] [stderr]     |                   |              |             |       |           |
[INFO] [stderr]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             these lifetimes flow to the output
[INFO] [stderr]     |                   |              these lifetimes flow to the output
[INFO] [stderr]     |                   these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 607 |     fn le_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:657:19
[INFO] [stderr]     |
[INFO] [stderr] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |                   ^^             ^^            ^^      ---------------
[INFO] [stderr]     |                   |              |             |       |           |
[INFO] [stderr]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             these lifetimes flow to the output
[INFO] [stderr]     |                   |              these lifetimes flow to the output
[INFO] [stderr]     |                   these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 657 |     fn gt_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:707:19
[INFO] [stderr]     |
[INFO] [stderr] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |                   ^^             ^^            ^^      ---------------
[INFO] [stderr]     |                   |              |             |       |           |
[INFO] [stderr]     |                   |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                   |              |             these lifetimes flow to the output
[INFO] [stderr]     |                   |              these lifetimes flow to the output
[INFO] [stderr]     |                   these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 707 |     fn ge_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:756:24
[INFO] [stderr]     |
[INFO] [stderr] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |                        ^^             ^^            ^^      ---------------
[INFO] [stderr]     |                        |              |             |       |           |
[INFO] [stderr]     |                        |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                        |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                        |              |             these lifetimes flow to the output
[INFO] [stderr]     |                        |              these lifetimes flow to the output
[INFO] [stderr]     |                        these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 756 |     fn shr_arithmetic(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> kaze/src/graph/signal.rs:796:20
[INFO] [stderr]     |
[INFO] [stderr] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &dyn Signal<'a> {
[INFO] [stderr]     |                    ^^             ^^            ^^      ---------------
[INFO] [stderr]     |                    |              |             |       |           |
[INFO] [stderr]     |                    |              |             |       |           the lifetimes get resolved as `'a`
[INFO] [stderr]     |                    |              |             |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                    |              |             these lifetimes flow to the output
[INFO] [stderr]     |                    |              these lifetimes flow to the output
[INFO] [stderr]     |                    these lifetimes flow to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 796 |     fn mul_signed(&'a self, rhs: &'a dyn Signal<'a>) -> &'a dyn Signal<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: `kaze` (lib) generated 25 warnings
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:256:26
[INFO] [stderr]     |
[INFO] [stderr] 256 | fn input_masking<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                          ^^                           -----------
[INFO] [stderr]     |                          |                            |       |
[INFO] [stderr]     |                          |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                          |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                          this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 256 | fn input_masking<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                        ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:264:25
[INFO] [stderr]     |
[INFO] [stderr] 264 | fn widest_input<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                         ^^                           -----------
[INFO] [stderr]     |                         |                            |       |
[INFO] [stderr]     |                         |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                         |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                         this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 264 | fn widest_input<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                       ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:272:28
[INFO] [stderr]     |
[INFO] [stderr] 272 | fn add_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 272 | fn add_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:302:28
[INFO] [stderr]     |
[INFO] [stderr] 302 | fn sub_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 302 | fn sub_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:332:28
[INFO] [stderr]     |
[INFO] [stderr] 332 | fn mul_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 332 | fn mul_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:366:35
[INFO] [stderr]     |
[INFO] [stderr] 366 | fn mul_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                   ^^                           -----------
[INFO] [stderr]     |                                   |                            |       |
[INFO] [stderr]     |                                   |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                   |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                   this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 366 | fn mul_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                 ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:400:28
[INFO] [stderr]     |
[INFO] [stderr] 400 | fn shl_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 400 | fn shl_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:442:28
[INFO] [stderr]     |
[INFO] [stderr] 442 | fn shr_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 442 | fn shr_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:484:39
[INFO] [stderr]     |
[INFO] [stderr] 484 | fn shr_arithmetic_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                       ^^                           -----------
[INFO] [stderr]     |                                       |                            |       |
[INFO] [stderr]     |                                       |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                       |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                       this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 484 | fn shr_arithmetic_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                     ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:526:32
[INFO] [stderr]     |
[INFO] [stderr] 526 | fn bit_and_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                ^^                           -----------
[INFO] [stderr]     |                                |                            |       |
[INFO] [stderr]     |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 526 | fn bit_and_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:536:31
[INFO] [stderr]     |
[INFO] [stderr] 536 | fn bit_or_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                               ^^                           -----------
[INFO] [stderr]     |                               |                            |       |
[INFO] [stderr]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 536 | fn bit_or_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                             ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:546:32
[INFO] [stderr]     |
[INFO] [stderr] 546 | fn bit_xor_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                ^^                           -----------
[INFO] [stderr]     |                                |                            |       |
[INFO] [stderr]     |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 546 | fn bit_xor_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:556:28
[INFO] [stderr]     |
[INFO] [stderr] 556 | fn not_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 556 | fn not_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:565:28
[INFO] [stderr]     |
[INFO] [stderr] 565 | fn reg_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 565 | fn reg_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:580:29
[INFO] [stderr]     |
[INFO] [stderr] 580 | fn simple_reg_delay<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                             ^^                           -----------
[INFO] [stderr]     |                             |                            |       |
[INFO] [stderr]     |                             |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                             |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                             this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 580 | fn simple_reg_delay<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                           ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:597:30
[INFO] [stderr]     |
[INFO] [stderr] 597 | fn bit_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                              ^^                           -----------
[INFO] [stderr]     |                              |                            |       |
[INFO] [stderr]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                              this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 597 | fn bit_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                            ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:606:30
[INFO] [stderr]     |
[INFO] [stderr] 606 | fn bit_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                              ^^                           -----------
[INFO] [stderr]     |                              |                            |       |
[INFO] [stderr]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                              this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 606 | fn bit_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                            ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:618:31
[INFO] [stderr]     |
[INFO] [stderr] 618 | fn bits_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                               ^^                           -----------
[INFO] [stderr]     |                               |                            |       |
[INFO] [stderr]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 618 | fn bits_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                             ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:632:31
[INFO] [stderr]     |
[INFO] [stderr] 632 | fn bits_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                               ^^                           -----------
[INFO] [stderr]     |                               |                            |       |
[INFO] [stderr]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 632 | fn bits_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                             ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:653:31
[INFO] [stderr]     |
[INFO] [stderr] 653 | fn repeat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                               ^^                           -----------
[INFO] [stderr]     |                               |                            |       |
[INFO] [stderr]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 653 | fn repeat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                             ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:671:31
[INFO] [stderr]     |
[INFO] [stderr] 671 | fn concat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                               ^^                           -----------
[INFO] [stderr]     |                               |                            |       |
[INFO] [stderr]     |                               |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                               this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 671 | fn concat_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                             ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:689:27
[INFO] [stderr]     |
[INFO] [stderr] 689 | fn eq_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                           ^^                           -----------
[INFO] [stderr]     |                           |                            |       |
[INFO] [stderr]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 689 | fn eq_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:700:27
[INFO] [stderr]     |
[INFO] [stderr] 700 | fn ne_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                           ^^                           -----------
[INFO] [stderr]     |                           |                            |       |
[INFO] [stderr]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 700 | fn ne_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:711:27
[INFO] [stderr]     |
[INFO] [stderr] 711 | fn lt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                           ^^                           -----------
[INFO] [stderr]     |                           |                            |       |
[INFO] [stderr]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 711 | fn lt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:722:27
[INFO] [stderr]     |
[INFO] [stderr] 722 | fn le_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                           ^^                           -----------
[INFO] [stderr]     |                           |                            |       |
[INFO] [stderr]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 722 | fn le_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:733:27
[INFO] [stderr]     |
[INFO] [stderr] 733 | fn gt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                           ^^                           -----------
[INFO] [stderr]     |                           |                            |       |
[INFO] [stderr]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 733 | fn gt_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:744:27
[INFO] [stderr]     |
[INFO] [stderr] 744 | fn ge_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                           ^^                           -----------
[INFO] [stderr]     |                           |                            |       |
[INFO] [stderr]     |                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                           this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 744 | fn ge_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:755:34
[INFO] [stderr]     |
[INFO] [stderr] 755 | fn lt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                  ^^                           -----------
[INFO] [stderr]     |                                  |                            |       |
[INFO] [stderr]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 755 | fn lt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:766:34
[INFO] [stderr]     |
[INFO] [stderr] 766 | fn le_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                  ^^                           -----------
[INFO] [stderr]     |                                  |                            |       |
[INFO] [stderr]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 766 | fn le_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:777:34
[INFO] [stderr]     |
[INFO] [stderr] 777 | fn gt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                  ^^                           -----------
[INFO] [stderr]     |                                  |                            |       |
[INFO] [stderr]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 777 | fn gt_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:788:34
[INFO] [stderr]     |
[INFO] [stderr] 788 | fn ge_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                  ^^                           -----------
[INFO] [stderr]     |                                  |                            |       |
[INFO] [stderr]     |                                  |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                  this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 788 | fn ge_signed_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:799:28
[INFO] [stderr]     |
[INFO] [stderr] 799 | fn mux_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                            ^^                           -----------
[INFO] [stderr]     |                            |                            |       |
[INFO] [stderr]     |                            |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                            this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 799 | fn mux_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                          ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:831:33
[INFO] [stderr]     |
[INFO] [stderr] 831 | fn reg_next_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                 ^^                           -----------
[INFO] [stderr]     |                                 |                            |       |
[INFO] [stderr]     |                                 |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                 |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                 this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 831 | fn reg_next_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                               ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:842:46
[INFO] [stderr]     |
[INFO] [stderr] 842 | fn reg_next_with_default_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                              ^^                           -----------
[INFO] [stderr]     |                                              |                            |       |
[INFO] [stderr]     |                                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                              |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                              this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 842 | fn reg_next_with_default_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                            ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:856:43
[INFO] [stderr]     |
[INFO] [stderr] 856 | fn instantiation_test_module_comb<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                           ^^                           -----------
[INFO] [stderr]     |                                           |                            |       |
[INFO] [stderr]     |                                           |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                           |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                           this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 856 | fn instantiation_test_module_comb<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                         ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:895:42
[INFO] [stderr]     |
[INFO] [stderr] 895 | fn instantiation_test_module_reg<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                          ^^                           -----------
[INFO] [stderr]     |                                          |                            |       |
[INFO] [stderr]     |                                          |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                          |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                          this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 895 | fn instantiation_test_module_reg<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                        ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:936:45
[INFO] [stderr]     |
[INFO] [stderr] 936 | fn nested_instantiation_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                                             ^^                           -----------
[INFO] [stderr]     |                                             |                            |       |
[INFO] [stderr]     |                                             |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                             |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                                             this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 936 | fn nested_instantiation_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                                           ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]    --> sim-tests/build.rs:993:30
[INFO] [stderr]     |
[INFO] [stderr] 993 | fn mem_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]     |                              ^^                           -----------
[INFO] [stderr]     |                              |                            |       |
[INFO] [stderr]     |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]     |                              |                            the lifetimes get resolved as `'a`
[INFO] [stderr]     |                              this lifetime flows to the output
[INFO] [stderr]     |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]     |
[INFO] [stderr] 993 | fn mem_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]     |                                                            ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]     --> sim-tests/build.rs:1011:30
[INFO] [stderr]      |
[INFO] [stderr] 1011 | fn mem_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]      |                              ^^                           -----------
[INFO] [stderr]      |                              |                            |       |
[INFO] [stderr]      |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]      |                              |                            the lifetimes get resolved as `'a`
[INFO] [stderr]      |                              this lifetime flows to the output
[INFO] [stderr]      |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]      |
[INFO] [stderr] 1011 | fn mem_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]      |                                                            ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]     --> sim-tests/build.rs:1025:30
[INFO] [stderr]      |
[INFO] [stderr] 1025 | fn mem_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]      |                              ^^                           -----------
[INFO] [stderr]      |                              |                            |       |
[INFO] [stderr]      |                              |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]      |                              |                            the lifetimes get resolved as `'a`
[INFO] [stderr]      |                              this lifetime flows to the output
[INFO] [stderr]      |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]      |
[INFO] [stderr] 1025 | fn mem_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]      |                                                            ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]     --> sim-tests/build.rs:1043:32
[INFO] [stderr]      |
[INFO] [stderr] 1043 | fn trace_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]      |                                ^^                           -----------
[INFO] [stderr]      |                                |                            |       |
[INFO] [stderr]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                this lifetime flows to the output
[INFO] [stderr]      |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]      |
[INFO] [stderr] 1043 | fn trace_test_module_0<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]      |                                                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]     --> sim-tests/build.rs:1055:32
[INFO] [stderr]      |
[INFO] [stderr] 1055 | fn trace_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]      |                                ^^                           -----------
[INFO] [stderr]      |                                |                            |       |
[INFO] [stderr]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                this lifetime flows to the output
[INFO] [stderr]      |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]      |
[INFO] [stderr] 1055 | fn trace_test_module_1<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]      |                                                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]     --> sim-tests/build.rs:1070:32
[INFO] [stderr]      |
[INFO] [stderr] 1070 | fn trace_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]      |                                ^^                           -----------
[INFO] [stderr]      |                                |                            |       |
[INFO] [stderr]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                this lifetime flows to the output
[INFO] [stderr]      |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]      |
[INFO] [stderr] 1070 | fn trace_test_module_2<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]      |                                                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]     --> sim-tests/build.rs:1108:32
[INFO] [stderr]      |
[INFO] [stderr] 1108 | fn trace_test_module_3<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]      |                                ^^                           -----------
[INFO] [stderr]      |                                |                            |       |
[INFO] [stderr]      |                                |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                |                            the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                this lifetime flows to the output
[INFO] [stderr]      |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]      |
[INFO] [stderr] 1108 | fn trace_test_module_3<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]      |                                                              ++
[INFO] [stderr] 
[INFO] [stderr] warning: lifetime flowing from input to output with different syntax can be confusing
[INFO] [stderr]     --> sim-tests/build.rs:1126:35
[INFO] [stderr]      |
[INFO] [stderr] 1126 | fn deep_graph_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &Module<'a> {
[INFO] [stderr]      |                                   ^^                           -----------
[INFO] [stderr]      |                                   |                            |       |
[INFO] [stderr]      |                                   |                            |       the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                   |                            the lifetimes get resolved as `'a`
[INFO] [stderr]      |                                   this lifetime flows to the output
[INFO] [stderr]      |
[INFO] [stderr] help: one option is to consistently use `'a`
[INFO] [stderr]      |
[INFO] [stderr] 1126 | fn deep_graph_test_module<'a>(p: &'a impl ModuleParent<'a>) -> &'a Module<'a> {
[INFO] [stderr]      |                                                                 ++
[INFO] [stderr] 
[INFO] [stderr] warning: `sim-tests` (build script) generated 45 warnings
[INFO] [stderr] warning: `kaze` (lib test) generated 25 warnings (25 duplicates)
[INFO] [stderr] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2130:5
[INFO] [stderr]      |
[INFO] [stderr] 2130 |     __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6: T::SignalId,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_address_6`
[INFO] [stderr]      |
[INFO] [stderr]      = note: `#[warn(non_snake_case)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2131:5
[INFO] [stderr]      |
[INFO] [stderr] 2131 |     __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7: T::SignalId,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_enable_7`
[INFO] [stderr] 
[INFO] [stderr] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2132:5
[INFO] [stderr]      |
[INFO] [stderr] 2132 |     __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8: T::SignalId,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_address_8`
[INFO] [stderr] 
[INFO] [stderr] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2133:5
[INFO] [stderr]      |
[INFO] [stderr] 2133 |     __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9: T::SignalId,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_value_9`
[INFO] [stderr] 
[INFO] [stderr] warning: structure field `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2134:5
[INFO] [stderr]      |
[INFO] [stderr] 2134 |     __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10: T::SignalId,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_enable_10`
[INFO] [stderr] 
[INFO] [stderr] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2148:13
[INFO] [stderr]      |
[INFO] [stderr] 2148 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_address_6 = trace.add_signal("__mem_trace_test_module_3_mem_0_r...
[INFO] [stderr]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_address_6`
[INFO] [stderr] 
[INFO] [stderr] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2149:13
[INFO] [stderr]      |
[INFO] [stderr] 2149 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_read_port_0_enable_7 = trace.add_signal("__mem_trace_test_module_3_mem_0_re...
[INFO] [stderr]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_read_port_0_enable_7`
[INFO] [stderr] 
[INFO] [stderr] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2150:13
[INFO] [stderr]      |
[INFO] [stderr] 2150 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_address_8 = trace.add_signal("__mem_trace_test_module_3_mem_0_wr...
[INFO] [stderr]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_address_8`
[INFO] [stderr] 
[INFO] [stderr] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2151:13
[INFO] [stderr]      |
[INFO] [stderr] 2151 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_value_9 = trace.add_signal("__mem_trace_test_module_3_mem_0_writ...
[INFO] [stderr]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_value_9`
[INFO] [stderr] 
[INFO] [stderr] warning: variable `__trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10` should have a snake case name
[INFO] [stderr]     --> /opt/rustwide/target/debug/build/sim-tests-0f35b15c5675ea37/out/modules.rs:2152:13
[INFO] [stderr]      |
[INFO] [stderr] 2152 |         let __trace_signal_id___mem_trace_test_module_3_mem_0_write_port_enable_10 = trace.add_signal("__mem_trace_test_module_3_mem_0_wr...
[INFO] [stderr]      |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: convert the identifier to snake case: `__trace_signal_id_mem_trace_test_module_3_mem_0_write_port_enable_10`
[INFO] [stderr] 
[INFO] [stderr] warning: `sim-tests` (lib test) generated 10 warnings
[INFO] [stderr]     Finished `test` profile [unoptimized + debuginfo] target(s) in 0.23s
[INFO] [stderr]      Running unittests src/lib.rs (/opt/rustwide/target/debug/deps/kaze-024e8ca3eb64df72)
[INFO] [stdout] 
[INFO] [stdout] running 111 tests
[INFO] [stdout] test graph::context::tests::new_context_has_no_modules ... ok
[INFO] [stdout] test graph::mem::tests::initial_contents_already_specified_error - should panic ... ok
[INFO] [stdout] test graph::mem::tests::initial_contents_element_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::mem::tests::read_port_address_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::mem::tests::initial_contents_length_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::lit_value_cannot_bit_into_bit_width_error_3 - should panic ... ok
[INFO] [stdout] test graph::mem::tests::write_port_value_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::input_drive_different_module_than_parent_module_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mem_address_bit_width_gt_max_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::input_width_gt_max_error - should panic ... ok
[INFO] [stdout] test graph::mem::tests::read_port_enable_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::lit_bit_width_gt_max_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mux_cond_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::mem::tests::write_port_enable_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::input_drive_already_driven_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mux_when_false_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::mem::tests::write_port_already_specified_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::lit_value_cannot_bit_into_bit_width_error_1 - should panic ... ok
[INFO] [stdout] test graph::module::tests::lit_value_cannot_bit_into_bit_width_error_2 - should panic ... ok
[INFO] [stdout] test graph::mem::tests::write_port_address_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::register::tests::default_value_cannot_bit_into_bit_width_error_1 - should panic ... ok
[INFO] [stdout] test graph::module::tests::input_drive_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::register::tests::default_value_cannot_bit_into_bit_width_error_3 - should panic ... ok
[INFO] [stdout] test graph::register::tests::drive_next_already_driven_error - should panic ... ok
[INFO] [stdout] test graph::register::tests::drive_next_incompatible_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::register::tests::drive_next_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::add_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::input_width_lt_min_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mux_cond_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mem_element_bit_width_lt_min_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bit_index_oob_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bitand_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bitor_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::reg_bit_width_gt_max_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bitor_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bits_range_low_gt_high_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::reg_bit_width_lt_min_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::lit_value_cannot_bit_into_bit_width_error_4 - should panic ... ok
[INFO] [stdout] test graph::register::tests::default_value_cannot_bit_into_bit_width_error_2 - should panic ... ok
[INFO] [stdout] test graph::signal::tests::concat_oob_error - should panic ... ok
[INFO] [stdout] test graph::register::tests::default_value_cannot_bit_into_bit_width_error_4 - should panic ... ok
[INFO] [stdout] test graph::module::tests::mem_address_bit_width_lt_min_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::output_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mem_element_bit_width_gt_max_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::add_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bitand_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mux_true_false_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::lit_bit_width_lt_min_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bits_range_high_oob_error - should panic ... ok
[INFO] [stdout] test graph::register::tests::default_value_already_specified_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bits_range_low_oob_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bitxor_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::bitxor_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::module::tests::mux_when_true_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::concat_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::ge_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::ge_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::ge_signed_bit_width_1_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::ge_signed_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::ge_signed_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::le_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::lt_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::gt_signed_bit_width_1_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::gt_signed_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::gt_signed_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mul_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::gt_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::le_signed_bit_width_1_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::le_signed_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::le_signed_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::gt_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::lt_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::lt_signed_bit_width_1_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::lt_signed_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::lt_signed_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::eq_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::le_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mul_oob_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mul_signed_oob_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mul_signed_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mux_cond_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::ne_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mux_true_false_bit_width_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mux_when_false_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mux_when_true_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::ne_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::mux_cond_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::repeat_count_oob_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::repeat_count_zero_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::shl_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::shr_separate_module_error - should panic ... ok
[INFO] [stdout] test graph::signal::tests::sub_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test sim::tests::mem_without_read_ports_error2 - should panic ... ok
[INFO] [stdout] test sim::tests::combinational_loop_error - should panic ... ok
[INFO] [stdout] test sim::tests::mem_without_initial_contents_or_write_port_error1 - should panic ... ok
[INFO] [stdout] test sim::tests::mem_without_read_ports_error1 - should panic ... ok
[INFO] [stdout] test verilog::tests::undriven_register_error1 - should panic ... ok
[INFO] [stdout] test graph::signal::tests::sub_separate_module_error - should panic ... ok
[INFO] [stdout] test sim::tests::undriven_instance_input_error - should panic ... ok
[INFO] [stdout] test sim::tests::undriven_register_error1 - should panic ... ok
[INFO] [stdout] test verilog::tests::combinational_loop_error - should panic ... ok
[INFO] [stdout] test verilog::tests::mem_without_initial_contents_or_write_port_error1 - should panic ... ok
[INFO] [stdout] test verilog::tests::mem_without_initial_contents_or_write_port_error2 - should panic ... ok
[INFO] [stdout] test graph::signal::tests::shr_arithmetic_separate_module_error - should panic ... ok
[INFO] [stdout] test verilog::tests::mem_without_read_ports_error2 - should panic ... ok
[INFO] [stdout] test verilog::tests::mem_without_read_ports_error1 - should panic ... ok
[INFO] [stdout] test graph::signal::tests::eq_incompatible_bit_widths_error - should panic ... ok
[INFO] [stdout] test sim::tests::mem_without_initial_contents_or_write_port_error2 - should panic ... ok
[INFO] [stdout] test verilog::tests::undriven_register_error2 - should panic ... ok
[INFO] [stdout] test sim::tests::undriven_register_error2 - should panic ... ok
[INFO] [stdout] test verilog::tests::undriven_instance_input_error - should panic ... ok
[INFO] [stdout] 
[INFO] [stdout] test result: ok. 111 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.08s
[INFO] [stdout] 
[INFO] [stderr]      Running unittests src/lib.rs (/opt/rustwide/target/debug/deps/sim_tests-874608764737161e)
[INFO] [stdout] 
[INFO] [stdout] running 45 tests
[INFO] [stdout] test tests::add_test_module ... ok
[INFO] [stdout] test tests::bit_and_test_module ... ok
[INFO] [stdout] test tests::bit_test_module_0 ... ok
[INFO] [stdout] test tests::bit_test_module_1 ... ok
[INFO] [stdout] test tests::bit_or_test_module ... ok
[INFO] [stdout] test tests::bit_xor_test_module ... ok
[INFO] [stdout] test tests::bits_test_module_1 ... ok
[INFO] [stdout] test tests::bits_test_module_0 ... ok
[INFO] [stdout] test tests::concat_test_module ... ok
[INFO] [stdout] test tests::eq_test_module ... ok
[INFO] [stdout] test tests::deep_graph_test_module ... ok
[INFO] [stdout] test tests::ge_signed_test_module ... ok
[INFO] [stdout] test tests::ge_test_module ... ok
[INFO] [stdout] test tests::gt_test_module ... ok
[INFO] [stdout] test tests::instantiation_test_module_comb ... ok
[INFO] [stdout] test tests::input_masking ... ok
[INFO] [stdout] test tests::instantiation_test_module_reg ... ok
[INFO] [stdout] test tests::le_signed_test_module ... ok
[INFO] [stdout] test tests::le_test_module ... ok
[INFO] [stdout] test tests::lt_signed_test_module ... ok
[INFO] [stdout] test tests::gt_signed_test_module ... ok
[INFO] [stdout] test tests::lt_test_module ... ok
[INFO] [stdout] test tests::mem_test_module_1 ... ok
[INFO] [stdout] test tests::mem_test_module_2 ... ok
[INFO] [stdout] test tests::mul_test_module ... ok
[INFO] [stdout] test tests::mux_test_module ... ok
[INFO] [stdout] test tests::ne_test_module ... ok
[INFO] [stdout] test tests::reg_next_test_module ... ok
[INFO] [stdout] test tests::reg_test_module ... ok
[INFO] [stdout] test tests::repeat_test_module ... ok
[INFO] [stdout] test tests::shr_arithmetic_test_module ... ok
[INFO] [stdout] test tests::shr_test_module ... ok
[INFO] [stdout] test tests::simple_reg_delay ... ok
[INFO] [stdout] test tests::mul_signed_test_module ... ok
[INFO] [stdout] test tests::nested_instantiation_test_module ... ok
[INFO] [stdout] test tests::shl_test_module ... ok
[INFO] [stdout] test tests::mem_test_module_0 ... ok
[INFO] [stdout] test tests::trace_test_module_0 ... ok
[INFO] [stdout] test tests::not_test_module ... ok
[INFO] [stdout] test tests::sub_test_module ... ok
[INFO] [stdout] test tests::trace_test_module_1 ... ok
[INFO] [stdout] test tests::reg_next_with_default_test_module ... ok
[INFO] [stdout] test tests::widest_input ... ok
[INFO] [stdout] test tests::trace_test_module_3 ... FAILED
[INFO] [stdout] test tests::trace_test_module_2 ... FAILED
[INFO] [stdout] 
[INFO] [stdout] failures:
[INFO] [stdout] 
[INFO] [stderr] error: test failed, to rerun pass `-p sim-tests --lib`
[INFO] [stdout] ---- tests::trace_test_module_3 stdout ----
[INFO] [stdout] 
[INFO] [stdout] thread 'tests::trace_test_module_3' panicked at sim-tests/src/lib.rs:2611:9:
[INFO] [stdout] assertion `left == right` failed
[INFO] [stdout]   left: module trace_test_module_3:
[INFO] [stdout]     children:
[INFO] [stdout]     signals:
[INFO] [stdout]         __mem_trace_test_module_3_mem_0_read_port_0_address: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         __mem_trace_test_module_3_mem_0_read_port_0_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(true)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         __mem_trace_test_module_3_mem_0_write_port_address: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         __mem_trace_test_module_3_mem_0_write_port_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         __mem_trace_test_module_3_mem_0_write_port_value: 4 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             2: U32(5)
[INFO] [stdout]             3: U32(5)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             4: U32(0)
[INFO] [stdout]             4: U32(12)
[INFO] [stdout]             5: U32(12)
[INFO] [stdout]         read_addr: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         read_data: 4 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             4: U32(5)
[INFO] [stdout]             4: U32(5)
[INFO] [stdout]             5: U32(5)
[INFO] [stdout]         read_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(true)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         write_addr: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         write_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         write_value: 4 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             2: U32(5)
[INFO] [stdout]             3: U32(5)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             4: U32(0)
[INFO] [stdout]             4: U32(12)
[INFO] [stdout]             5: U32(12)
[INFO] [stdout] 
[INFO] [stdout]  right: module trace_test_module_3:
[INFO] [stdout]     children:
[INFO] [stdout]     signals:
[INFO] [stdout]         mem_0_read_port_0_address: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         mem_0_read_port_0_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(true)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         mem_0_write_port_address: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         mem_0_write_port_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         mem_0_write_port_value: 4 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             2: U32(5)
[INFO] [stdout]             3: U32(5)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             4: U32(0)
[INFO] [stdout]             4: U32(12)
[INFO] [stdout]             5: U32(12)
[INFO] [stdout]         read_addr: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         read_data: 4 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             4: U32(5)
[INFO] [stdout]             4: U32(5)
[INFO] [stdout]             5: U32(5)
[INFO] [stdout]         read_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(true)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         write_addr: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             5: Bool(false)
[INFO] [stdout]         write_enable: 1 bit(s) (Bool)
[INFO] [stdout]             0: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             1: Bool(false)
[INFO] [stdout]             2: Bool(false)
[INFO] [stdout]             2: Bool(true)
[INFO] [stdout]             3: Bool(true)
[INFO] [stdout]             3: Bool(false)
[INFO] [stdout]             4: Bool(false)
[INFO] [stdout]             4: Bool(true)
[INFO] [stdout]             5: Bool(true)
[INFO] [stdout]         write_value: 4 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(0)
[INFO] [stdout]             2: U32(5)
[INFO] [stdout]             3: U32(5)
[INFO] [stdout]             3: U32(0)
[INFO] [stdout]             4: U32(0)
[INFO] [stdout]             4: U32(12)
[INFO] [stdout]             5: U32(12)
[INFO] [stdout] 
[INFO] [stdout] stack backtrace:
[INFO] [stdout]    0:     0x5f98b84e6732 - std::backtrace_rs::backtrace::libunwind::trace::hd39b1f53d3cf9745
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/../../backtrace/src/backtrace/libunwind.rs:117:9
[INFO] [stdout]    1:     0x5f98b84e6732 - std::backtrace_rs::backtrace::trace_unsynchronized::he91d9a75d4e3972b
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/../../backtrace/src/backtrace/mod.rs:66:14
[INFO] [stdout]    2:     0x5f98b84e6732 - std::sys::backtrace::_print_fmt::hca46938f8c6e22cf
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:66:9
[INFO] [stdout]    3:     0x5f98b84e6732 - <std::sys::backtrace::BacktraceLock::print::DisplayBacktrace as core::fmt::Display>::fmt::ha499add612cccf8e
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:39:26
[INFO] [stdout]    4:     0x5f98b850be83 - core::fmt::rt::Argument::fmt::hd21145b75a833b7a
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/fmt/rt.rs:173:76
[INFO] [stdout]    5:     0x5f98b850be83 - core::fmt::write::hb10c956f5235c8a4
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/fmt/mod.rs:1465:25
[INFO] [stdout]    6:     0x5f98b84e3913 - std::io::default_write_fmt::hdb7615052be2ba4d
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/io/mod.rs:639:11
[INFO] [stdout]    7:     0x5f98b84e3913 - std::io::Write::write_fmt::he1bcd251ec6e4153
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/io/mod.rs:1954:13
[INFO] [stdout]    8:     0x5f98b84e6582 - std::sys::backtrace::BacktraceLock::print::hb47c770ef659fd10
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:42:9
[INFO] [stdout]    9:     0x5f98b84e7cac - std::panicking::default_hook::{{closure}}::hdda8afb9d457a22c
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:300:27
[INFO] [stdout]   10:     0x5f98b84e7b02 - std::panicking::default_hook::h7c46b44874fe5c9a
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:324:9
[INFO] [stdout]   11:     0x5f98b84afaf4 - <alloc::boxed::Box<F,A> as core::ops::function::Fn<Args>>::call::h178a5fcedee41e2f
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1985:9
[INFO] [stdout]   12:     0x5f98b84afaf4 - test::test_main_with_exit_callback::{{closure}}::h951a41e0149d6d5d
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:145:21
[INFO] [stdout]   13:     0x5f98b84e878b - <alloc::boxed::Box<F,A> as core::ops::function::Fn<Args>>::call::h13602080f5b63276
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1985:9
[INFO] [stdout]   14:     0x5f98b84e878b - std::panicking::rust_panic_with_hook::ha6cb99ed099eb1c5
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:841:13
[INFO] [stdout]   15:     0x5f98b84e845a - std::panicking::begin_panic_handler::{{closure}}::he11808bc797ee921
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:706:13
[INFO] [stdout]   16:     0x5f98b84e6c39 - std::sys::backtrace::__rust_end_short_backtrace::h9418807cb7346258
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:168:18
[INFO] [stdout]   17:     0x5f98b84e80ed - __rustc[18fb429eef004894]::rust_begin_unwind
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:697:5
[INFO] [stdout]   18:     0x5f98b850a480 - core::panicking::panic_fmt::hd890aeb12c3a3fc3
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panicking.rs:75:14
[INFO] [stdout]   19:     0x5f98b850a6e7 - core::panicking::assert_failed_inner::h02e1528dd7bc6647
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panicking.rs:448:17
[INFO] [stdout]   20:     0x5f98b84714de - core::panicking::assert_failed::had31d9bd2a7ef962
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panicking.rs:403:5
[INFO] [stdout]   21:     0x5f98b846910f - sim_tests::tests::trace_test_module_3::hd1d12786c91acd59
[INFO] [stdout]                                at /opt/rustwide/workdir/sim-tests/src/lib.rs:2611:9
[INFO] [stdout]   22:     0x5f98b84709f9 - sim_tests::tests::trace_test_module_3::{{closure}}::hf48fb0c463fc26ca
[INFO] [stdout]                                at /opt/rustwide/workdir/sim-tests/src/lib.rs:2529:33
[INFO] [stdout]   23:     0x5f98b84709f9 - core::ops::function::FnOnce::call_once::h952ba58d8009e0ec
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/ops/function.rs:250:5
[INFO] [stdout]   24:     0x5f98b84b527b - core::ops::function::FnOnce::call_once::h2869fb5b0a2b0bdc
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/ops/function.rs:250:5
[INFO] [stdout]   25:     0x5f98b84b527b - test::__rust_begin_short_backtrace::h7dd7142bd62fa711
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:648:18
[INFO] [stdout]   26:     0x5f98b84b446e - test::run_test_in_process::{{closure}}::h43a753f038d36b3f
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:671:74
[INFO] [stdout]   27:     0x5f98b84b446e - <core::panic::unwind_safe::AssertUnwindSafe<F> as core::ops::function::FnOnce<()>>::call_once::h0ca95dd3e12d1e16
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panic/unwind_safe.rs:272:9
[INFO] [stdout]   28:     0x5f98b84b446e - std::panicking::catch_unwind::do_call::he308587d70ac34ba
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:589:40
[INFO] [stdout]   29:     0x5f98b84b446e - std::panicking::catch_unwind::h30dcba31973e8fb0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:552:19
[INFO] [stdout]   30:     0x5f98b84b446e - std::panic::catch_unwind::hfb68364e5621fbee
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panic.rs:359:14
[INFO] [stdout]   31:     0x5f98b84b446e - test::run_test_in_process::hcdcc2977903b998a
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:671:27
[INFO] [stdout]   32:     0x5f98b84b446e - test::run_test::{{closure}}::h544a6550958c5d14
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:592:43
[INFO] [stdout]   33:     0x5f98b8477fe4 - test::run_test::{{closure}}::hb172e48ebe2b92c7
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:622:41
[INFO] [stdout]   34:     0x5f98b8477fe4 - std::sys::backtrace::__rust_begin_short_backtrace::h7e79d8706638bea0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:152:18
[INFO] [stdout]   35:     0x5f98b847b9ba - std::thread::Builder::spawn_unchecked_::{{closure}}::{{closure}}::hc4a275f1e71b8ab0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/thread/mod.rs:559:17
[INFO] [stdout]   36:     0x5f98b847b9ba - <core::panic::unwind_safe::AssertUnwindSafe<F> as core::ops::function::FnOnce<()>>::call_once::h01ed0d242df78cfd
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panic/unwind_safe.rs:272:9
[INFO] [stdout]   37:     0x5f98b847b9ba - std::panicking::catch_unwind::do_call::h052f373fb905fee0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:589:40
[INFO] [stdout]   38:     0x5f98b847b9ba - std::panicking::catch_unwind::hb425d20c8ffb09c8
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:552:19
[INFO] [stdout]   39:     0x5f98b847b9ba - std::panic::catch_unwind::ha0d5dfbf18fdeda5
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panic.rs:359:14
[INFO] [stdout]   40:     0x5f98b847b9ba - std::thread::Builder::spawn_unchecked_::{{closure}}::hbe79182bd37949c7
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/thread/mod.rs:557:30
[INFO] [stdout]   41:     0x5f98b847b9ba - core::ops::function::FnOnce::call_once{{vtable.shim}}::hc096c4a06972fde5
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/ops/function.rs:250:5
[INFO] [stdout]   42:     0x5f98b84eb6e7 - <alloc::boxed::Box<F,A> as core::ops::function::FnOnce<Args>>::call_once::h47377e27fb938a26
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1971:9
[INFO] [stdout]   43:     0x5f98b84eb6e7 - <alloc::boxed::Box<F,A> as core::ops::function::FnOnce<Args>>::call_once::h72f1fe5d095abf57
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1971:9
[INFO] [stdout]   44:     0x5f98b84eb6e7 - std::sys::pal::unix::thread::Thread::new::thread_start::h0a4d8e1b9c0d38cf
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/pal/unix/thread.rs:97:17
[INFO] [stdout]   45:     0x7a26e89daaa4 - <unknown>
[INFO] [stdout]   46:     0x7a26e8a67a34 - clone
[INFO] [stdout]   47:                0x0 - <unknown>
[INFO] [stdout] 
[INFO] [stdout] ---- tests::trace_test_module_2 stdout ----
[INFO] [stdout] 
[INFO] [stdout] thread 'tests::trace_test_module_2' panicked at sim-tests/src/lib.rs:2378:9:
[INFO] [stdout] assertion `left == right` failed
[INFO] [stdout]   left: module trace_test_module_2:
[INFO] [stdout]     children:
[INFO] [stdout]         module inner1:
[INFO] [stdout]             children:
[INFO] [stdout]             signals:
[INFO] [stdout]                 i1: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(4294967295)
[INFO] [stdout]                     1: U32(4294967295)
[INFO] [stdout]                     2: U32(4294967295)
[INFO] [stdout]                 i2: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(4294901760)
[INFO] [stdout]                     1: U32(4294901760)
[INFO] [stdout]                     2: U32(4294901760)
[INFO] [stdout]                 o: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(4294901760)
[INFO] [stdout]                     2: U32(4294901760)
[INFO] [stdout]                 r: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(4294901760)
[INFO] [stdout]                     2: U32(4294901760)
[INFO] [stdout]         module inner2:
[INFO] [stdout]             children:
[INFO] [stdout]             signals:
[INFO] [stdout]                 i1: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(16711680)
[INFO] [stdout]                     1: U32(16711680)
[INFO] [stdout]                     2: U32(16711680)
[INFO] [stdout]                 i2: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(983040)
[INFO] [stdout]                     1: U32(983040)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]                 o: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(983040)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]                 r: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(983040)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]         module inner3:
[INFO] [stdout]             children:
[INFO] [stdout]             signals:
[INFO] [stdout]                 i1: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(4294901760)
[INFO] [stdout]                     2: U32(4294901760)
[INFO] [stdout]                 i2: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(983040)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]                 o: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(0)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]                 r: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(0)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]     signals:
[INFO] [stdout]         i1: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(4294967295)
[INFO] [stdout]             1: U32(4294967295)
[INFO] [stdout]             2: U32(4294967295)
[INFO] [stdout]         i2: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(4294901760)
[INFO] [stdout]             1: U32(4294901760)
[INFO] [stdout]             2: U32(4294901760)
[INFO] [stdout]         i3: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(16711680)
[INFO] [stdout]             1: U32(16711680)
[INFO] [stdout]             2: U32(16711680)
[INFO] [stdout]         i4: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(983040)
[INFO] [stdout]             1: U32(983040)
[INFO] [stdout]             2: U32(983040)
[INFO] [stdout]         o: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(983040)
[INFO] [stdout] 
[INFO] [stdout]  right: module trace_test_module_2:
[INFO] [stdout]     children:
[INFO] [stdout]         module inner1:
[INFO] [stdout]             children:
[INFO] [stdout]             signals:
[INFO] [stdout]                 r: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(4294901760)
[INFO] [stdout]                     2: U32(4294901760)
[INFO] [stdout]         module inner2:
[INFO] [stdout]             children:
[INFO] [stdout]             signals:
[INFO] [stdout]                 r: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(983040)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]         module inner3:
[INFO] [stdout]             children:
[INFO] [stdout]             signals:
[INFO] [stdout]                 r: 32 bit(s) (U32)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     0: U32(0)
[INFO] [stdout]                     1: U32(0)
[INFO] [stdout]                     2: U32(983040)
[INFO] [stdout]     signals:
[INFO] [stdout]         i1: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(4294967295)
[INFO] [stdout]             1: U32(4294967295)
[INFO] [stdout]             2: U32(4294967295)
[INFO] [stdout]         i2: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(4294901760)
[INFO] [stdout]             1: U32(4294901760)
[INFO] [stdout]             2: U32(4294901760)
[INFO] [stdout]         i3: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(16711680)
[INFO] [stdout]             1: U32(16711680)
[INFO] [stdout]             2: U32(16711680)
[INFO] [stdout]         i4: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(983040)
[INFO] [stdout]             1: U32(983040)
[INFO] [stdout]             2: U32(983040)
[INFO] [stdout]         o: 32 bit(s) (U32)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             0: U32(0)
[INFO] [stdout]             1: U32(0)
[INFO] [stdout]             2: U32(983040)
[INFO] [stdout] 
[INFO] [stdout] stack backtrace:
[INFO] [stdout]    0:     0x5f98b84e6732 - std::backtrace_rs::backtrace::libunwind::trace::hd39b1f53d3cf9745
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/../../backtrace/src/backtrace/libunwind.rs:117:9
[INFO] [stdout]    1:     0x5f98b84e6732 - std::backtrace_rs::backtrace::trace_unsynchronized::he91d9a75d4e3972b
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/../../backtrace/src/backtrace/mod.rs:66:14
[INFO] [stdout]    2:     0x5f98b84e6732 - std::sys::backtrace::_print_fmt::hca46938f8c6e22cf
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:66:9
[INFO] [stdout]    3:     0x5f98b84e6732 - <std::sys::backtrace::BacktraceLock::print::DisplayBacktrace as core::fmt::Display>::fmt::ha499add612cccf8e
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:39:26
[INFO] [stdout]    4:     0x5f98b850be83 - core::fmt::rt::Argument::fmt::hd21145b75a833b7a
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/fmt/rt.rs:173:76
[INFO] [stdout]    5:     0x5f98b850be83 - core::fmt::write::hb10c956f5235c8a4
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/fmt/mod.rs:1465:25
[INFO] [stdout]    6:     0x5f98b84e3913 - std::io::default_write_fmt::hdb7615052be2ba4d
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/io/mod.rs:639:11
[INFO] [stdout]    7:     0x5f98b84e3913 - std::io::Write::write_fmt::he1bcd251ec6e4153
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/io/mod.rs:1954:13
[INFO] [stdout]    8:     0x5f98b84e6582 - std::sys::backtrace::BacktraceLock::print::hb47c770ef659fd10
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:42:9
[INFO] [stdout]    9:     0x5f98b84e7cac - std::panicking::default_hook::{{closure}}::hdda8afb9d457a22c
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:300:27
[INFO] [stdout]   10:     0x5f98b84e7b02 - std::panicking::default_hook::h7c46b44874fe5c9a
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:324:9
[INFO] [stdout]   11:     0x5f98b84afaf4 - <alloc::boxed::Box<F,A> as core::ops::function::Fn<Args>>::call::h178a5fcedee41e2f
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1985:9
[INFO] [stdout]   12:     0x5f98b84afaf4 - test::test_main_with_exit_callback::{{closure}}::h951a41e0149d6d5d
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:145:21
[INFO] [stdout]   13:     0x5f98b84e878b - <alloc::boxed::Box<F,A> as core::ops::function::Fn<Args>>::call::h13602080f5b63276
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1985:9
[INFO] [stdout]   14:     0x5f98b84e878b - std::panicking::rust_panic_with_hook::ha6cb99ed099eb1c5
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:841:13
[INFO] [stdout]   15:     0x5f98b84e845a - std::panicking::begin_panic_handler::{{closure}}::he11808bc797ee921
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:706:13
[INFO] [stdout]   16:     0x5f98b84e6c39 - std::sys::backtrace::__rust_end_short_backtrace::h9418807cb7346258
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:168:18
[INFO] [stdout]   17:     0x5f98b84e80ed - __rustc[18fb429eef004894]::rust_begin_unwind
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:697:5
[INFO] [stdout]   18:     0x5f98b850a480 - core::panicking::panic_fmt::hd890aeb12c3a3fc3
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panicking.rs:75:14
[INFO] [stdout]   19:     0x5f98b850a6e7 - core::panicking::assert_failed_inner::h02e1528dd7bc6647
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panicking.rs:448:17
[INFO] [stdout]   20:     0x5f98b84714de - core::panicking::assert_failed::had31d9bd2a7ef962
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panicking.rs:403:5
[INFO] [stdout]   21:     0x5f98b84664fc - sim_tests::tests::trace_test_module_2::h687ff4bf2732809d
[INFO] [stdout]                                at /opt/rustwide/workdir/sim-tests/src/lib.rs:2378:9
[INFO] [stdout]   22:     0x5f98b8470979 - sim_tests::tests::trace_test_module_2::{{closure}}::hd9ae0c3be5d0a5f8
[INFO] [stdout]                                at /opt/rustwide/workdir/sim-tests/src/lib.rs:2346:33
[INFO] [stdout]   23:     0x5f98b8470979 - core::ops::function::FnOnce::call_once::h0e7d235b8e75f6d9
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/ops/function.rs:250:5
[INFO] [stdout]   24:     0x5f98b84b527b - core::ops::function::FnOnce::call_once::h2869fb5b0a2b0bdc
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/ops/function.rs:250:5
[INFO] [stdout]   25:     0x5f98b84b527b - test::__rust_begin_short_backtrace::h7dd7142bd62fa711
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:648:18
[INFO] [stdout]   26:     0x5f98b84b446e - test::run_test_in_process::{{closure}}::h43a753f038d36b3f
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:671:74
[INFO] [stdout]   27:     0x5f98b84b446e - <core::panic::unwind_safe::AssertUnwindSafe<F> as core::ops::function::FnOnce<()>>::call_once::h0ca95dd3e12d1e16
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panic/unwind_safe.rs:272:9
[INFO] [stdout]   28:     0x5f98b84b446e - std::panicking::catch_unwind::do_call::he308587d70ac34ba
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:589:40
[INFO] [stdout]   29:     0x5f98b84b446e - std::panicking::catch_unwind::h30dcba31973e8fb0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:552:19
[INFO] [stdout]   30:     0x5f98b84b446e - std::panic::catch_unwind::hfb68364e5621fbee
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panic.rs:359:14
[INFO] [stdout]   31:     0x5f98b84b446e - test::run_test_in_process::hcdcc2977903b998a
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:671:27
[INFO] [stdout]   32:     0x5f98b84b446e - test::run_test::{{closure}}::h544a6550958c5d14
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:592:43
[INFO] [stdout]   33:     0x5f98b8477fe4 - test::run_test::{{closure}}::hb172e48ebe2b92c7
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/test/src/lib.rs:622:41
[INFO] [stdout]   34:     0x5f98b8477fe4 - std::sys::backtrace::__rust_begin_short_backtrace::h7e79d8706638bea0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/backtrace.rs:152:18
[INFO] [stdout]   35:     0x5f98b847b9ba - std::thread::Builder::spawn_unchecked_::{{closure}}::{{closure}}::hc4a275f1e71b8ab0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/thread/mod.rs:559:17
[INFO] [stdout]   36:     0x5f98b847b9ba - <core::panic::unwind_safe::AssertUnwindSafe<F> as core::ops::function::FnOnce<()>>::call_once::h01ed0d242df78cfd
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/panic/unwind_safe.rs:272:9
[INFO] [stdout]   37:     0x5f98b847b9ba - std::panicking::catch_unwind::do_call::h052f373fb905fee0
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:589:40
[INFO] [stdout]   38:     0x5f98b847b9ba - std::panicking::catch_unwind::hb425d20c8ffb09c8
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panicking.rs:552:19
[INFO] [stdout]   39:     0x5f98b847b9ba - std::panic::catch_unwind::ha0d5dfbf18fdeda5
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/panic.rs:359:14
[INFO] [stdout]   40:     0x5f98b847b9ba - std::thread::Builder::spawn_unchecked_::{{closure}}::hbe79182bd37949c7
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/thread/mod.rs:557:30
[INFO] [stdout]   41:     0x5f98b847b9ba - core::ops::function::FnOnce::call_once{{vtable.shim}}::hc096c4a06972fde5
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/core/src/ops/function.rs:250:5
[INFO] [stdout]   42:     0x5f98b84eb6e7 - <alloc::boxed::Box<F,A> as core::ops::function::FnOnce<Args>>::call_once::h47377e27fb938a26
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1971:9
[INFO] [stdout]   43:     0x5f98b84eb6e7 - <alloc::boxed::Box<F,A> as core::ops::function::FnOnce<Args>>::call_once::h72f1fe5d095abf57
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/alloc/src/boxed.rs:1971:9
[INFO] [stdout]   44:     0x5f98b84eb6e7 - std::sys::pal::unix::thread::Thread::new::thread_start::h0a4d8e1b9c0d38cf
[INFO] [stdout]                                at /rustc/d98a5da813da67eb189387b8ccfb73cf481275d8/library/std/src/sys/pal/unix/thread.rs:97:17
[INFO] [stdout]   45:     0x7a26e89daaa4 - <unknown>
[INFO] [stdout]   46:     0x7a26e8a67a34 - clone
[INFO] [stdout]   47:                0x0 - <unknown>
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] failures:
[INFO] [stdout]     tests::trace_test_module_2
[INFO] [stdout]     tests::trace_test_module_3
[INFO] [stdout] 
[INFO] [stdout] test result: FAILED. 43 passed; 2 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.06s
[INFO] [stdout] 
[INFO] running `Command { std: "docker" "inspect" "794a0e23eb5396daa00ccfcbd6aa957ea54f42334ef7666dbbd199094a1c383c", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "794a0e23eb5396daa00ccfcbd6aa957ea54f42334ef7666dbbd199094a1c383c", kill_on_drop: false }`
[INFO] [stdout] 794a0e23eb5396daa00ccfcbd6aa957ea54f42334ef7666dbbd199094a1c383c
