[INFO] cloning repository https://github.com/915604903T/el2_code
[INFO] running `Command { std: "git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/915604903T/el2_code" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2F915604903T%2Fel2_code", kill_on_drop: false }`
[INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2F915604903T%2Fel2_code'...
[INFO] running `Command { std: "git" "rev-parse" "HEAD", kill_on_drop: false }`
[INFO] [stdout] 6c3040180e61d9082d24452e67bfb13e7ea0ede9
[INFO] building 915604903T/el2_code against try#334963c956d25708feab489a3816ae63f639355d for pr-135216
[INFO] running `Command { std: "git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2F915604903T%2Fel2_code" "/workspace/builds/worker-4-tc2/source", kill_on_drop: false }`
[INFO] [stderr] Cloning into '/workspace/builds/worker-4-tc2/source'...
[INFO] [stderr] done.
[INFO] validating manifest of git repo https://github.com/915604903T/el2_code on toolchain 334963c956d25708feab489a3816ae63f639355d
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+334963c956d25708feab489a3816ae63f639355d" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] removed /workspace/builds/worker-4-tc2/source/rust-toolchain.toml
[INFO] started tweaking git repo https://github.com/915604903T/el2_code
[INFO] finished tweaking git repo https://github.com/915604903T/el2_code
[INFO] tweaked toml for git repo https://github.com/915604903T/el2_code written to /workspace/builds/worker-4-tc2/source/Cargo.toml
[INFO] crate git repo https://github.com/915604903T/el2_code already has a lockfile, it will not be regenerated
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+334963c956d25708feab489a3816ae63f639355d" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:f3a9d4ad9d972b27faf3965f35b62e55ba32bbce8f20bc8fe909558a86702fde" "/opt/rustwide/cargo-home/bin/cargo" "+334963c956d25708feab489a3816ae63f639355d" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] bfdeb1e47a9d8e8f0b76c552e3a7ac622ca197c763d3ba55f0c8284ca063e813
[INFO] running `Command { std: "docker" "start" "-a" "bfdeb1e47a9d8e8f0b76c552e3a7ac622ca197c763d3ba55f0c8284ca063e813", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "bfdeb1e47a9d8e8f0b76c552e3a7ac622ca197c763d3ba55f0c8284ca063e813", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "bfdeb1e47a9d8e8f0b76c552e3a7ac622ca197c763d3ba55f0c8284ca063e813", kill_on_drop: false }`
[INFO] [stdout] bfdeb1e47a9d8e8f0b76c552e3a7ac622ca197c763d3ba55f0c8284ca063e813
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4-tc2/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:f3a9d4ad9d972b27faf3965f35b62e55ba32bbce8f20bc8fe909558a86702fde" "/opt/rustwide/cargo-home/bin/cargo" "+334963c956d25708feab489a3816ae63f639355d" "build" "--frozen" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] 7e81583b45538149aedee1b998a2deca23a963fa1f3d15ffc6eaf001a804ae79
[INFO] running `Command { std: "docker" "start" "-a" "7e81583b45538149aedee1b998a2deca23a963fa1f3d15ffc6eaf001a804ae79", kill_on_drop: false }`
[INFO] [stderr]    Compiling tock-registers v0.8.1
[INFO] [stderr]    Compiling cortex-a v8.1.1
[INFO] [stderr]    Compiling aarch64-cpu v9.4.0
[INFO] [stderr]    Compiling el2_code v0.1.0 (/opt/rustwide/workdir)
[INFO] [stdout] warning: unused import: `aarch64_cpu::registers::MIDR_EL1::Implementer::Infineon`
[INFO] [stdout]   --> src/sync.rs:11:5
[INFO] [stdout]    |
[INFO] [stdout] 11 | use aarch64_cpu::registers::MIDR_EL1::Implementer::Infineon;
[INFO] [stdout]    |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(unused_imports)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused imports: `asm::barrier`, `asm`, and `registers::*`
[INFO] [stdout]  --> src/hvc.rs:1:19
[INFO] [stdout]   |
[INFO] [stdout] 1 | use aarch64_cpu::{asm, asm::barrier, registers::*};
[INFO] [stdout]   |                   ^^^  ^^^^^^^^^^^^  ^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused import: `Readable`
[INFO] [stdout]  --> src/hvc.rs:3:49
[INFO] [stdout]   |
[INFO] [stdout] 3 | use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
[INFO] [stdout]   |                                                 ^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused import: `VTTBR_EL2`
[INFO] [stdout]    --> src/hvc.rs:100:44
[INFO] [stdout]     |
[INFO] [stdout] 100 |     use aarch64_cpu::registers::{VTCR_EL2, VTTBR_EL2};
[INFO] [stdout]     |                                            ^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x0`
[INFO] [stdout]    --> src/hvc.rs:148:5
[INFO] [stdout]     |
[INFO] [stdout] 148 |     x0: usize, 
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x0`
[INFO] [stdout]     |
[INFO] [stdout]     = note: `#[warn(unused_variables)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x1`
[INFO] [stdout]    --> src/hvc.rs:149:5
[INFO] [stdout]     |
[INFO] [stdout] 149 |     x1: usize, 
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x1`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x2`
[INFO] [stdout]    --> src/hvc.rs:150:5
[INFO] [stdout]     |
[INFO] [stdout] 150 |     x2: usize, 
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x2`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x3`
[INFO] [stdout]    --> src/hvc.rs:151:5
[INFO] [stdout]     |
[INFO] [stdout] 151 |     x3: usize, 
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x3`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x4`
[INFO] [stdout]    --> src/hvc.rs:152:5
[INFO] [stdout]     |
[INFO] [stdout] 152 |     x4: usize,
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x4`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x5`
[INFO] [stdout]    --> src/hvc.rs:153:5
[INFO] [stdout]     |
[INFO] [stdout] 153 |     x5: usize,
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x5`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x6`
[INFO] [stdout]    --> src/hvc.rs:154:5
[INFO] [stdout]     |
[INFO] [stdout] 154 |     x6: usize,
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x6`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unused variable: `x7`
[INFO] [stdout]    --> src/hvc.rs:155:5
[INFO] [stdout]     |
[INFO] [stdout] 155 |     x7: usize,
[INFO] [stdout]     |     ^^ help: if this is intentional, prefix it with an underscore: `_x7`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: variable does not need to be mutable
[INFO] [stdout]    --> src/hvc.rs:157:9
[INFO] [stdout]     |
[INFO] [stdout] 157 |     let mut r0: usize = 0;
[INFO] [stdout]     |         ----^^
[INFO] [stdout]     |         |
[INFO] [stdout]     |         help: remove this `mut`
[INFO] [stdout]     |
[INFO] [stdout]     = note: `#[warn(unused_mut)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: associated function `default` is never used
[INFO] [stdout]   --> src/context_frame.rs:78:12
[INFO] [stdout]    |
[INFO] [stdout] 77 | impl Aarch64ContextFrame {
[INFO] [stdout]    | ------------------------ associated function in this implementation
[INFO] [stdout] 78 |     pub fn default() -> Aarch64ContextFrame {
[INFO] [stdout]    |            ^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout]    = note: `#[warn(dead_code)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: associated items `default` and `reset` are never used
[INFO] [stdout]    --> src/context_frame.rs:103:12
[INFO] [stdout]     |
[INFO] [stdout] 102 | impl VmCtxFpsimd {
[INFO] [stdout]     | ---------------- associated items in this implementation
[INFO] [stdout] 103 |     pub fn default() -> VmCtxFpsimd {
[INFO] [stdout]     |            ^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 111 |     pub fn reset(&mut self) {
[INFO] [stdout]     |            ^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: associated items `default`, `reset`, and `ext_regs_store` are never used
[INFO] [stdout]    --> src/context_frame.rs:177:12
[INFO] [stdout]     |
[INFO] [stdout] 176 | impl VmContext {
[INFO] [stdout]     | -------------- associated items in this implementation
[INFO] [stdout] 177 |     pub fn default() -> VmContext {
[INFO] [stdout]     |            ^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 231 |     pub fn reset(&mut self) {
[INFO] [stdout]     |            ^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 270 |     pub fn ext_regs_store(&mut self) {
[INFO] [stdout]     |            ^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `exception_esr_el1` is never used
[INFO] [stdout]   --> src/exception.rs:28:8
[INFO] [stdout]    |
[INFO] [stdout] 28 | pub fn exception_esr_el1() -> usize {
[INFO] [stdout]    |        ^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `exception_data_abort_access_width` is never used
[INFO] [stdout]    --> src/exception.rs:135:8
[INFO] [stdout]     |
[INFO] [stdout] 135 | pub fn exception_data_abort_access_width() -> usize {
[INFO] [stdout]     |        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `exception_data_abort_access_is_write` is never used
[INFO] [stdout]    --> src/exception.rs:140:8
[INFO] [stdout]     |
[INFO] [stdout] 140 | pub fn exception_data_abort_access_is_write() -> bool {
[INFO] [stdout]     |        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `exception_data_abort_access_in_stage2` is never used
[INFO] [stdout]    --> src/exception.rs:145:8
[INFO] [stdout]     |
[INFO] [stdout] 145 | pub fn exception_data_abort_access_in_stage2() -> bool {
[INFO] [stdout]     |        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `exception_data_abort_access_reg` is never used
[INFO] [stdout]    --> src/exception.rs:150:8
[INFO] [stdout]     |
[INFO] [stdout] 150 | pub fn exception_data_abort_access_reg() -> usize {
[INFO] [stdout]     |        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `exception_data_abort_access_reg_width` is never used
[INFO] [stdout]    --> src/exception.rs:155:8
[INFO] [stdout]     |
[INFO] [stdout] 155 | pub fn exception_data_abort_access_reg_width() -> usize {
[INFO] [stdout]     |        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `exception_data_abort_access_is_sign_ext` is never used
[INFO] [stdout]    --> src/exception.rs:160:8
[INFO] [stdout]     |
[INFO] [stdout] 160 | pub fn exception_data_abort_access_is_sign_ext() -> bool {
[INFO] [stdout]     |        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: struct `HvcDefaultMsg` is never constructed
[INFO] [stdout]   --> src/hvc.rs:14:12
[INFO] [stdout]    |
[INFO] [stdout] 14 | pub struct HvcDefaultMsg {
[INFO] [stdout]    |            ^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `run_guest_by_trap2el2` is never used
[INFO] [stdout]   --> src/hvc.rs:39:8
[INFO] [stdout]    |
[INFO] [stdout] 39 | pub fn run_guest_by_trap2el2(token: usize, regs_addr: usize) -> usize {
[INFO] [stdout]    |        ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: function `hvc_call` is never used
[INFO] [stdout]    --> src/hvc.rs:147:4
[INFO] [stdout]     |
[INFO] [stdout] 147 | fn hvc_call(
[INFO] [stdout]     |    ^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr CNTV_CVAL_EL0, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:33:30
[INFO] [stdout]    |
[INFO] [stdout] 33 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0:", $asm_width, "}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr CNTKCTL_EL1, ax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:33:30
[INFO] [stdout]    |
[INFO] [stdout] 33 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0:", $asm_width, "}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr CNTV_CTL_EL0, ax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr SP_EL0, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr SP_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr ELR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:33:30
[INFO] [stdout]    |
[INFO] [stdout] 33 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0:", $asm_width, "}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr SPSR_EL1, ax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:33:30
[INFO] [stdout]    |
[INFO] [stdout] 33 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0:", $asm_width, "}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr SCTLR_EL1, ax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:33:30
[INFO] [stdout]    |
[INFO] [stdout] 33 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0:", $asm_width, "}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr CPACR_EL1, ax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr TTBR0_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr TTBR1_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr TCR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:33:30
[INFO] [stdout]    |
[INFO] [stdout] 33 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0:", $asm_width, "}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr ESR_EL1, ax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr FAR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr PAR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr MAIR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr AMAIR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr VBAR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:33:30
[INFO] [stdout]    |
[INFO] [stdout] 33 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0:", $asm_width, "}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr CONTEXTIDR_EL1, ax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr TPIDR_EL0, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr TPIDR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr TPIDRRO_EL0, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr PMCR_EL0, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr ACTLR_EL1, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr VTCR_EL2, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr HCR_EL2, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr VMPIDR_EL2, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr CNTVOFF_EL2, rax
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'at'
[INFO] [stdout]   --> src/exception.rs:57:30
[INFO] [stdout]    |
[INFO] [stdout] 57 |             core::arch::asm!(concat!("AT ", $at_op, ", {0}"), in(reg) $addr, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     AT s1e1r, rdi
[INFO] [stdout]    |     ^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'isb'
[INFO] [stdout]   --> src/exception.rs:58:31
[INFO] [stdout]    |
[INFO] [stdout] 58 |             core::arch::asm!("isb");
[INFO] [stdout]    |                               ^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     isb
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]   |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]  --> <inline asm>:2:2
[INFO] [stdout]   |
[INFO] [stdout] 2 |     mrs rax, HPFAR_EL2
[INFO] [stdout]   |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'mrs'
[INFO] [stdout]   --> src/lib.rs:22:30
[INFO] [stdout]    |
[INFO] [stdout] 22 |             core::arch::asm!(concat!("mrs {0}, ", stringify!($reg)), out(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     mrs rax, HPFAR_EL2
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid operand for instruction
[INFO] [stdout]   --> src/hvc.rs:65:13
[INFO] [stdout]    |
[INFO] [stdout] 65 |             mov x3, xzr           // Trap nothing from EL1 to El2.
[INFO] [stdout]    |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:3:13
[INFO] [stdout]    |
[INFO] [stdout] 3  |             mov x3, xzr           // Trap nothing from EL1 to El2.
[INFO] [stdout]    |             ^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/hvc.rs:66:13
[INFO] [stdout]    |
[INFO] [stdout] 66 |             msr cptr_el2, x3
[INFO] [stdout]    |             ^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:4:13
[INFO] [stdout]    |
[INFO] [stdout] 4  |             msr cptr_el2, x3
[INFO] [stdout]    |             ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'bl'
[INFO] [stdout]   --> src/hvc.rs:68:13
[INFO] [stdout]    |
[INFO] [stdout] 68 |             bl {init_page_table}  // init vtcr_el2 and vttbr_el2. x0 is vttbr value
[INFO] [stdout]    |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:6:13
[INFO] [stdout]    |
[INFO] [stdout] 6  |             bl _ZN8el2_code3hvc15init_page_table17h7f138212f96b71d8E  // init vtcr_el2 and vttbr_el2. x0 is vttbr value
[INFO] [stdout]    |             ^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'bl'
[INFO] [stdout]   --> src/hvc.rs:69:13
[INFO] [stdout]    |
[INFO] [stdout] 69 |             bl {init_sysregs}
[INFO] [stdout]    |             ^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:7:13
[INFO] [stdout]    |
[INFO] [stdout] 7  |             bl _ZN8el2_code3hvc12init_sysregs17h4d2fd32f9d225493E
[INFO] [stdout]    |             ^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'tlbi'
[INFO] [stdout]   --> src/hvc.rs:71:13
[INFO] [stdout]    |
[INFO] [stdout] 71 |             tlbi    alle2         // Flush tlb
[INFO] [stdout]    |             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:9:13
[INFO] [stdout]    |
[INFO] [stdout] 9  |             tlbi    alle2         // Flush tlb
[INFO] [stdout]    |             ^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'dsb'
[INFO] [stdout]   --> src/hvc.rs:72:10
[INFO] [stdout]    |
[INFO] [stdout] 72 |             dsb    nsh
[INFO] [stdout]    |             ^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:10:10
[INFO] [stdout]    |
[INFO] [stdout] 10 |             dsb    nsh
[INFO] [stdout]    |             ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'isb'
[INFO] [stdout]   --> src/hvc.rs:73:10
[INFO] [stdout]    |
[INFO] [stdout] 73 |             isb",
[INFO] [stdout]    |             ^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:11:10
[INFO] [stdout]    |
[INFO] [stdout] 11 |             isb
[INFO] [stdout]    |             ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid instruction mnemonic 'msr'
[INFO] [stdout]   --> src/lib.rs:38:30
[INFO] [stdout]    |
[INFO] [stdout] 38 |             core::arch::asm!(concat!("msr ", stringify!($reg), ", {0}"), in(reg) $val, options(nomem, nostack));
[INFO] [stdout]    |                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]    |
[INFO] [stdout] note: instantiated into assembly here
[INFO] [stdout]   --> <inline asm>:2:2
[INFO] [stdout]    |
[INFO] [stdout] 2  |     msr VTTBR_EL2, rdi
[INFO] [stdout]    |     ^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stderr] error: could not compile `el2_code` (lib) due to 40 previous errors; 26 warnings emitted
[INFO] [stderr] warning: build failed, waiting for other jobs to finish...
[INFO] running `Command { std: "docker" "inspect" "7e81583b45538149aedee1b998a2deca23a963fa1f3d15ffc6eaf001a804ae79", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "7e81583b45538149aedee1b998a2deca23a963fa1f3d15ffc6eaf001a804ae79", kill_on_drop: false }`
[INFO] [stdout] 7e81583b45538149aedee1b998a2deca23a963fa1f3d15ffc6eaf001a804ae79
