[INFO] fetching crate compressed_map 0.1.0...
[INFO] checking compressed_map-0.1.0 against master#39cb3386ddc6c71657418be28dbb3987eea4aa4b for pr-133536
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[INFO] [stdout] error[E0412]: cannot find type `SkipFixedArrayLength` in this scope
[INFO] [stdout]     --> src/uniform.rs:1157:66
[INFO] [stdout]      |
[INFO] [stdout] 1157 | pub const STD_BINCODE_CONFIG : Configuration<LittleEndian,Fixint,SkipFixedArrayLength,NoLimit>
[INFO] [stdout]      |                                                                  ^^^^^^^^^^^^^^^^^^^^ not found in this scope
[INFO] [stdout]      |
[INFO] [stdout] help: you might be missing a type parameter
[INFO] [stdout]      |
[INFO] [stdout] 1157 | pub const STD_BINCODE_CONFIG<SkipFixedArrayLength> : Configuration<LittleEndian,Fixint,SkipFixedArrayLength,NoLimit>
[INFO] [stdout]      |                             ++++++++++++++++++++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition name: `bench`
[INFO] [stdout]    --> src/lib.rs:274:7
[INFO] [stdout]     |
[INFO] [stdout] 274 | #[cfg(bench)]
[INFO] [stdout]     |       ^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = help: expected names are: `clippy`, `debug_assertions`, `doc`, `docsrs`, `doctest`, `feature`, `fmt_debug`, `miri`, `overflow_checks`, `panic`, `proc_macro`, `relocation_model`, `rustfmt`, `sanitize`, `sanitizer_cfi_generalize_pointers`, `sanitizer_cfi_normalize_integers`, `target_abi`, `target_arch`, `target_endian`, `target_env`, `target_family`, `target_feature`, `target_has_atomic`, `target_has_atomic_equal_alignment`, `target_has_atomic_load_store`, `target_os`, `target_pointer_width`, `target_thread_local`, `target_vendor`, `test`, `ub_checks`, `unix`, and `windows`
[INFO] [stdout]     = help: consider using a Cargo feature instead
[INFO] [stdout]     = help: or consider adding in `Cargo.toml` the `check-cfg` lint config for the lint:
[INFO] [stdout]              [lints.rust]
[INFO] [stdout]              unexpected_cfgs = { level = "warn", check-cfg = ['cfg(bench)'] }
[INFO] [stdout]     = help: or consider adding `println!("cargo::rustc-check-cfg=cfg(bench)");` to the top of the `build.rs`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: `#[warn(unexpected_cfgs)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition name: `bench`
[INFO] [stdout]    --> src/lib.rs:277:11
[INFO] [stdout]     |
[INFO] [stdout] 277 | #[cfg(not(bench))]
[INFO] [stdout]     |           ^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = help: consider using a Cargo feature instead
[INFO] [stdout]     = help: or consider adding in `Cargo.toml` the `check-cfg` lint config for the lint:
[INFO] [stdout]              [lints.rust]
[INFO] [stdout]              unexpected_cfgs = { level = "warn", check-cfg = ['cfg(bench)'] }
[INFO] [stdout]     = help: or consider adding `println!("cargo::rustc-check-cfg=cfg(bench)");` to the top of the `build.rs`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:788:33
[INFO] [stdout]     |
[INFO] [stdout] 788 | #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                 ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 534 | / accelerated!(pub fn row_mul_acc(c:&mut [Tile], a:Tile, b:&[Tile]) {
[INFO] [stdout] 535 | |     /* Row operation: c += a*b, where a is a single tile, and (b,c) are vectors */
[INFO] [stdout] 536 | |     let len = min(b.len(),c.len());
[INFO] [stdout] 537 | |     if !a.is_zero() {
[INFO] [stdout] ...   |
[INFO] [stdout] 540 | |     }
[INFO] [stdout] 541 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 534 | / accelerated!(pub fn row_mul_acc(c:&mut [Tile], a:Tile, b:&[Tile]) {
[INFO] [stdout] 535 | |     /* Row operation: c += a*b, where a is a single tile, and (b,c) are vectors */
[INFO] [stdout] 536 | |     let len = min(b.len(),c.len());
[INFO] [stdout] 537 | |     if !a.is_zero() {
[INFO] [stdout] ...   |
[INFO] [stdout] 540 | |     }
[INFO] [stdout] 541 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 534 | / accelerated!(pub fn row_mul_acc(c:&mut [Tile], a:Tile, b:&[Tile]) {
[INFO] [stdout] 535 | |     /* Row operation: c += a*b, where a is a single tile, and (b,c) are vectors */
[INFO] [stdout] 536 | |     let len = min(b.len(),c.len());
[INFO] [stdout] 537 | |     if !a.is_zero() {
[INFO] [stdout] ...   |
[INFO] [stdout] 540 | |     }
[INFO] [stdout] 541 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 543 | / accelerated!(pub fn row_mul(a:Tile, b:&mut [Tile]) {
[INFO] [stdout] 544 | |     /* Row operation: b = a*b, where a is a single tile, and b is a vector */
[INFO] [stdout] 545 | |     if a.is_zero() {
[INFO] [stdout] 546 | |         for i in 0..b.len() { b[i] = Tile::ZERO; }
[INFO] [stdout] ...   |
[INFO] [stdout] 550 | |     }
[INFO] [stdout] 551 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 543 | / accelerated!(pub fn row_mul(a:Tile, b:&mut [Tile]) {
[INFO] [stdout] 544 | |     /* Row operation: b = a*b, where a is a single tile, and b is a vector */
[INFO] [stdout] 545 | |     if a.is_zero() {
[INFO] [stdout] 546 | |         for i in 0..b.len() { b[i] = Tile::ZERO; }
[INFO] [stdout] ...   |
[INFO] [stdout] 550 | |     }
[INFO] [stdout] 551 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 543 | / accelerated!(pub fn row_mul(a:Tile, b:&mut [Tile]) {
[INFO] [stdout] 544 | |     /* Row operation: b = a*b, where a is a single tile, and b is a vector */
[INFO] [stdout] 545 | |     if a.is_zero() {
[INFO] [stdout] 546 | |         for i in 0..b.len() { b[i] = Tile::ZERO; }
[INFO] [stdout] ...   |
[INFO] [stdout] 550 | |     }
[INFO] [stdout] 551 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 553 | / accelerated!(pub fn bulk_swap2_rows(a: &mut [Tile], b: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 554 | |     /* Double-row operation: swap rows ra..ra+nrows from a with rb..rb+nrows from b */
[INFO] [stdout] 555 | |     let ab = Tile::IDENTITY.extract_cols(rb,ra,nrows);
[INFO] [stdout] 556 | |     let ba = Tile::IDENTITY.extract_cols(ra,rb,nrows);
[INFO] [stdout] ...   |
[INFO] [stdout] 559 | |     row_mul_acc::with_accel::<Accel>(a,ab,b);
[INFO] [stdout] 560 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 553 | / accelerated!(pub fn bulk_swap2_rows(a: &mut [Tile], b: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 554 | |     /* Double-row operation: swap rows ra..ra+nrows from a with rb..rb+nrows from b */
[INFO] [stdout] 555 | |     let ab = Tile::IDENTITY.extract_cols(rb,ra,nrows);
[INFO] [stdout] 556 | |     let ba = Tile::IDENTITY.extract_cols(ra,rb,nrows);
[INFO] [stdout] ...   |
[INFO] [stdout] 559 | |     row_mul_acc::with_accel::<Accel>(a,ab,b);
[INFO] [stdout] 560 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 553 | / accelerated!(pub fn bulk_swap2_rows(a: &mut [Tile], b: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 554 | |     /* Double-row operation: swap rows ra..ra+nrows from a with rb..rb+nrows from b */
[INFO] [stdout] 555 | |     let ab = Tile::IDENTITY.extract_cols(rb,ra,nrows);
[INFO] [stdout] 556 | |     let ba = Tile::IDENTITY.extract_cols(ra,rb,nrows);
[INFO] [stdout] ...   |
[INFO] [stdout] 559 | |     row_mul_acc::with_accel::<Accel>(a,ab,b);
[INFO] [stdout] 560 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 562 | / accelerated!(pub fn bulk_swap_rows(a: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 563 | |     /* Single-row operation: swap rows ra..ra+nrows with rb..rb+nrows from b */
[INFO] [stdout] 564 | |     /* Permute columns of the identity; it's equivalent to swapping rows
[INFO] [stdout] 565 | |      * PERF: could probably accelerate making this permutation
[INFO] [stdout] ...   |
[INFO] [stdout] 580 | |     for i in 0..a.len() { a[i] = Accel::precomputed_mul(&study, a[i]); }
[INFO] [stdout] 581 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 562 | / accelerated!(pub fn bulk_swap_rows(a: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 563 | |     /* Single-row operation: swap rows ra..ra+nrows with rb..rb+nrows from b */
[INFO] [stdout] 564 | |     /* Permute columns of the identity; it's equivalent to swapping rows
[INFO] [stdout] 565 | |      * PERF: could probably accelerate making this permutation
[INFO] [stdout] ...   |
[INFO] [stdout] 580 | |     for i in 0..a.len() { a[i] = Accel::precomputed_mul(&study, a[i]); }
[INFO] [stdout] 581 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 562 | / accelerated!(pub fn bulk_swap_rows(a: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 563 | |     /* Single-row operation: swap rows ra..ra+nrows with rb..rb+nrows from b */
[INFO] [stdout] 564 | |     /* Permute columns of the identity; it's equivalent to swapping rows
[INFO] [stdout] 565 | |      * PERF: could probably accelerate making this permutation
[INFO] [stdout] ...   |
[INFO] [stdout] 580 | |     for i in 0..a.len() { a[i] = Accel::precomputed_mul(&study, a[i]); }
[INFO] [stdout] 581 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 583 | / accelerated!(fn tile_mut_permute_columns(t: &mut Tile, p:&Permutation) {
[INFO] [stdout] 584 | |     /* Permute the columns of t */
[INFO] [stdout] 585 | |     Accel::mut_permute_columns(t,p);
[INFO] [stdout] 586 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 583 | / accelerated!(fn tile_mut_permute_columns(t: &mut Tile, p:&Permutation) {
[INFO] [stdout] 584 | |     /* Permute the columns of t */
[INFO] [stdout] 585 | |     Accel::mut_permute_columns(t,p);
[INFO] [stdout] 586 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0412]: cannot find type `SkipFixedArrayLength` in this scope
[INFO] [stdout]     --> src/uniform.rs:1157:66
[INFO] [stdout]      |
[INFO] [stdout] 1157 | pub const STD_BINCODE_CONFIG : Configuration<LittleEndian,Fixint,SkipFixedArrayLength,NoLimit>
[INFO] [stdout]      |                                                                  ^^^^^^^^^^^^^^^^^^^^ not found in this scope
[INFO] [stdout]      |
[INFO] [stdout] help: you might be missing a type parameter
[INFO] [stdout]      |
[INFO] [stdout] 1157 | pub const STD_BINCODE_CONFIG<SkipFixedArrayLength> : Configuration<LittleEndian,Fixint,SkipFixedArrayLength,NoLimit>
[INFO] [stdout]      |                             ++++++++++++++++++++++
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 583 | / accelerated!(fn tile_mut_permute_columns(t: &mut Tile, p:&Permutation) {
[INFO] [stdout] 584 | |     /* Permute the columns of t */
[INFO] [stdout] 585 | |     Accel::mut_permute_columns(t,p);
[INFO] [stdout] 586 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 588 | / accelerated!(pub fn bulk_permute_accum_columns(
[INFO] [stdout] 589 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 590 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 591 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 601 | |     }
[INFO] [stdout] 602 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 588 | / accelerated!(pub fn bulk_permute_accum_columns(
[INFO] [stdout] 589 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 590 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 591 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 601 | |     }
[INFO] [stdout] 602 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 588 | / accelerated!(pub fn bulk_permute_accum_columns(
[INFO] [stdout] 589 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 590 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 591 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 601 | |     }
[INFO] [stdout] 602 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 604 | / accelerated!(pub fn bulk_permute_set_columns(
[INFO] [stdout] 605 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 606 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 607 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 617 | |     }
[INFO] [stdout] 618 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 604 | / accelerated!(pub fn bulk_permute_set_columns(
[INFO] [stdout] 605 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 606 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 607 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 617 | |     }
[INFO] [stdout] 618 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 604 | / accelerated!(pub fn bulk_permute_set_columns(
[INFO] [stdout] 605 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 606 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 607 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 617 | |     }
[INFO] [stdout] 618 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 621 | / accelerated!(pub fn bulk_permute_accum2_columns(
[INFO] [stdout] 622 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 623 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 624 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 640 | |     }
[INFO] [stdout] 641 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 621 | / accelerated!(pub fn bulk_permute_accum2_columns(
[INFO] [stdout] 622 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 623 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 624 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 640 | |     }
[INFO] [stdout] 641 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 621 | / accelerated!(pub fn bulk_permute_accum2_columns(
[INFO] [stdout] 622 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 623 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 624 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 640 | |     }
[INFO] [stdout] 641 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:447:1
[INFO] [stdout]     |
[INFO] [stdout] 447 | / tile::simd::accelerated!(fn matrix_accum_mul(dst: &mut Matrix, a: &Matrix, b: &Matrix) {
[INFO] [stdout] 448 | |     let trows    = tiles_spanning(min(dst.rows,a.rows));
[INFO] [stdout] 449 | |     let mut taug = tiles_spanning(min(dst.cols_aug,b.cols_aug));
[INFO] [stdout] 450 | |     let taug_a   = tiles_spanning(min(dst.cols_aug,a.cols_aug));
[INFO] [stdout] ...   |
[INFO] [stdout] 473 | |     }
[INFO] [stdout] 474 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:447:1
[INFO] [stdout]     |
[INFO] [stdout] 447 | / tile::simd::accelerated!(fn matrix_accum_mul(dst: &mut Matrix, a: &Matrix, b: &Matrix) {
[INFO] [stdout] 448 | |     let trows    = tiles_spanning(min(dst.rows,a.rows));
[INFO] [stdout] 449 | |     let mut taug = tiles_spanning(min(dst.cols_aug,b.cols_aug));
[INFO] [stdout] 450 | |     let taug_a   = tiles_spanning(min(dst.cols_aug,a.cols_aug));
[INFO] [stdout] ...   |
[INFO] [stdout] 473 | |     }
[INFO] [stdout] 474 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:447:1
[INFO] [stdout]     |
[INFO] [stdout] 447 | / tile::simd::accelerated!(fn matrix_accum_mul(dst: &mut Matrix, a: &Matrix, b: &Matrix) {
[INFO] [stdout] 448 | |     let trows    = tiles_spanning(min(dst.rows,a.rows));
[INFO] [stdout] 449 | |     let mut taug = tiles_spanning(min(dst.cols_aug,b.cols_aug));
[INFO] [stdout] 450 | |     let taug_a   = tiles_spanning(min(dst.cols_aug,a.cols_aug));
[INFO] [stdout] ...   |
[INFO] [stdout] 473 | |     }
[INFO] [stdout] 474 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:476:1
[INFO] [stdout]     |
[INFO] [stdout] 476 | / tile::simd::accelerated!(pub fn matrix_rref(matrix: &mut Matrix) -> (usize, BitSet) {
[INFO] [stdout] 477 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 478 | |     let rows = matrix.rows;
[INFO] [stdout] 479 | |     let cols = matrix.cols_main;
[INFO] [stdout] ...   |
[INFO] [stdout] 596 | |     (rank, column_is_in_echelon)
[INFO] [stdout] 597 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:476:1
[INFO] [stdout]     |
[INFO] [stdout] 476 | / tile::simd::accelerated!(pub fn matrix_rref(matrix: &mut Matrix) -> (usize, BitSet) {
[INFO] [stdout] 477 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 478 | |     let rows = matrix.rows;
[INFO] [stdout] 479 | |     let cols = matrix.cols_main;
[INFO] [stdout] ...   |
[INFO] [stdout] 596 | |     (rank, column_is_in_echelon)
[INFO] [stdout] 597 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:476:1
[INFO] [stdout]     |
[INFO] [stdout] 476 | / tile::simd::accelerated!(pub fn matrix_rref(matrix: &mut Matrix) -> (usize, BitSet) {
[INFO] [stdout] 477 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 478 | |     let rows = matrix.rows;
[INFO] [stdout] 479 | |     let cols = matrix.cols_main;
[INFO] [stdout] ...   |
[INFO] [stdout] 596 | |     (rank, column_is_in_echelon)
[INFO] [stdout] 597 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:599:1
[INFO] [stdout]     |
[INFO] [stdout] 599 | / tile::simd::accelerated!(fn matrix_partition_rows(matrix: &Matrix, rows: &BitSet) -> (Matrix,Matrix) {
[INFO] [stdout] 600 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 601 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] 602 | |     let tcols = tiles_spanning(matrix.cols_main) + tiles_spanning(matrix.cols_aug);
[INFO] [stdout] ...   |
[INFO] [stdout] 638 | |     (yes,no)
[INFO] [stdout] 639 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:599:1
[INFO] [stdout]     |
[INFO] [stdout] 599 | / tile::simd::accelerated!(fn matrix_partition_rows(matrix: &Matrix, rows: &BitSet) -> (Matrix,Matrix) {
[INFO] [stdout] 600 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 601 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] 602 | |     let tcols = tiles_spanning(matrix.cols_main) + tiles_spanning(matrix.cols_aug);
[INFO] [stdout] ...   |
[INFO] [stdout] 638 | |     (yes,no)
[INFO] [stdout] 639 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:599:1
[INFO] [stdout]     |
[INFO] [stdout] 599 | / tile::simd::accelerated!(fn matrix_partition_rows(matrix: &Matrix, rows: &BitSet) -> (Matrix,Matrix) {
[INFO] [stdout] 600 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 601 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] 602 | |     let tcols = tiles_spanning(matrix.cols_main) + tiles_spanning(matrix.cols_aug);
[INFO] [stdout] ...   |
[INFO] [stdout] 638 | |     (yes,no)
[INFO] [stdout] 639 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:641:1
[INFO] [stdout]     |
[INFO] [stdout] 641 | / tile::simd::accelerated!(fn matrix_interleave_rows(matrix: &Matrix, other: &Matrix, take_from_self: &BitSet) -> Matrix {
[INFO] [stdout] 642 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 643 | |     // debug_assert!(other.is_valid());
[INFO] [stdout] 644 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] ...   |
[INFO] [stdout] 683 | |     result
[INFO] [stdout] 684 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:641:1
[INFO] [stdout]     |
[INFO] [stdout] 641 | / tile::simd::accelerated!(fn matrix_interleave_rows(matrix: &Matrix, other: &Matrix, take_from_self: &BitSet) -> Matrix {
[INFO] [stdout] 642 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 643 | |     // debug_assert!(other.is_valid());
[INFO] [stdout] 644 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] ...   |
[INFO] [stdout] 683 | |     result
[INFO] [stdout] 684 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:641:1
[INFO] [stdout]     |
[INFO] [stdout] 641 | / tile::simd::accelerated!(fn matrix_interleave_rows(matrix: &Matrix, other: &Matrix, take_from_self: &BitSet) -> Matrix {
[INFO] [stdout] 642 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 643 | |     // debug_assert!(other.is_valid());
[INFO] [stdout] 644 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] ...   |
[INFO] [stdout] 683 | |     result
[INFO] [stdout] 684 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:686:1
[INFO] [stdout]     |
[INFO] [stdout] 686 | / tile::simd::accelerated!(fn matrix_append_columns(matrix: &Matrix, rhs: &Matrix) -> Matrix {
[INFO] [stdout] 687 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 688 | |     // debug_assert!(rhs.is_valid());
[INFO] [stdout] 689 | |     assert!(matrix.rows == rhs.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 741 | |     ret
[INFO] [stdout] 742 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:686:1
[INFO] [stdout]     |
[INFO] [stdout] 686 | / tile::simd::accelerated!(fn matrix_append_columns(matrix: &Matrix, rhs: &Matrix) -> Matrix {
[INFO] [stdout] 687 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 688 | |     // debug_assert!(rhs.is_valid());
[INFO] [stdout] 689 | |     assert!(matrix.rows == rhs.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 741 | |     ret
[INFO] [stdout] 742 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:686:1
[INFO] [stdout]     |
[INFO] [stdout] 686 | / tile::simd::accelerated!(fn matrix_append_columns(matrix: &Matrix, rhs: &Matrix) -> Matrix {
[INFO] [stdout] 687 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 688 | |     // debug_assert!(rhs.is_valid());
[INFO] [stdout] 689 | |     assert!(matrix.rows == rhs.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 741 | |     ret
[INFO] [stdout] 742 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition name: `bench`
[INFO] [stdout]    --> src/lib.rs:274:7
[INFO] [stdout]     |
[INFO] [stdout] 274 | #[cfg(bench)]
[INFO] [stdout]     |       ^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = help: expected names are: `clippy`, `debug_assertions`, `doc`, `docsrs`, `doctest`, `feature`, `fmt_debug`, `miri`, `overflow_checks`, `panic`, `proc_macro`, `relocation_model`, `rustfmt`, `sanitize`, `sanitizer_cfi_generalize_pointers`, `sanitizer_cfi_normalize_integers`, `target_abi`, `target_arch`, `target_endian`, `target_env`, `target_family`, `target_feature`, `target_has_atomic`, `target_has_atomic_equal_alignment`, `target_has_atomic_load_store`, `target_os`, `target_pointer_width`, `target_thread_local`, `target_vendor`, `test`, `ub_checks`, `unix`, and `windows`
[INFO] [stdout]     = help: consider using a Cargo feature instead
[INFO] [stdout]     = help: or consider adding in `Cargo.toml` the `check-cfg` lint config for the lint:
[INFO] [stdout]              [lints.rust]
[INFO] [stdout]              unexpected_cfgs = { level = "warn", check-cfg = ['cfg(bench)'] }
[INFO] [stdout]     = help: or consider adding `println!("cargo::rustc-check-cfg=cfg(bench)");` to the top of the `build.rs`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: `#[warn(unexpected_cfgs)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:744:1
[INFO] [stdout]     |
[INFO] [stdout] 744 | / tile::simd::accelerated!(fn matrix_swap_rows(matrix: &mut Matrix, ra:usize, rb:usize, nrows:usize, start:usize) {
[INFO] [stdout] 745 | |     let mut nrows = nrows;
[INFO] [stdout] 746 | |     if ra == rb { return };
[INFO] [stdout] 747 | |     let (mut ra, mut rb) = (min(ra,rb), max(ra,rb));
[INFO] [stdout] ...   |
[INFO] [stdout] 763 | |     }
[INFO] [stdout] 764 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition name: `bench`
[INFO] [stdout]    --> src/lib.rs:277:11
[INFO] [stdout]     |
[INFO] [stdout] 277 | #[cfg(not(bench))]
[INFO] [stdout]     |           ^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = help: consider using a Cargo feature instead
[INFO] [stdout]     = help: or consider adding in `Cargo.toml` the `check-cfg` lint config for the lint:
[INFO] [stdout]              [lints.rust]
[INFO] [stdout]              unexpected_cfgs = { level = "warn", check-cfg = ['cfg(bench)'] }
[INFO] [stdout]     = help: or consider adding `println!("cargo::rustc-check-cfg=cfg(bench)");` to the top of the `build.rs`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:788:33
[INFO] [stdout]     |
[INFO] [stdout] 788 | #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                 ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:744:1
[INFO] [stdout]     |
[INFO] [stdout] 744 | / tile::simd::accelerated!(fn matrix_swap_rows(matrix: &mut Matrix, ra:usize, rb:usize, nrows:usize, start:usize) {
[INFO] [stdout] 745 | |     let mut nrows = nrows;
[INFO] [stdout] 746 | |     if ra == rb { return };
[INFO] [stdout] 747 | |     let (mut ra, mut rb) = (min(ra,rb), max(ra,rb));
[INFO] [stdout] ...   |
[INFO] [stdout] 763 | |     }
[INFO] [stdout] 764 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 534 | / accelerated!(pub fn row_mul_acc(c:&mut [Tile], a:Tile, b:&[Tile]) {
[INFO] [stdout] 535 | |     /* Row operation: c += a*b, where a is a single tile, and (b,c) are vectors */
[INFO] [stdout] 536 | |     let len = min(b.len(),c.len());
[INFO] [stdout] 537 | |     if !a.is_zero() {
[INFO] [stdout] ...   |
[INFO] [stdout] 540 | |     }
[INFO] [stdout] 541 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:744:1
[INFO] [stdout]     |
[INFO] [stdout] 744 | / tile::simd::accelerated!(fn matrix_swap_rows(matrix: &mut Matrix, ra:usize, rb:usize, nrows:usize, start:usize) {
[INFO] [stdout] 745 | |     let mut nrows = nrows;
[INFO] [stdout] 746 | |     if ra == rb { return };
[INFO] [stdout] 747 | |     let (mut ra, mut rb) = (min(ra,rb), max(ra,rb));
[INFO] [stdout] ...   |
[INFO] [stdout] 763 | |     }
[INFO] [stdout] 764 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 534 | / accelerated!(pub fn row_mul_acc(c:&mut [Tile], a:Tile, b:&[Tile]) {
[INFO] [stdout] 535 | |     /* Row operation: c += a*b, where a is a single tile, and (b,c) are vectors */
[INFO] [stdout] 536 | |     let len = min(b.len(),c.len());
[INFO] [stdout] 537 | |     if !a.is_zero() {
[INFO] [stdout] ...   |
[INFO] [stdout] 540 | |     }
[INFO] [stdout] 541 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:766:1
[INFO] [stdout]     |
[INFO] [stdout] 766 | / tile::simd::accelerated!(fn matrix_split_at_row(matrix: Matrix, row:usize) -> (Matrix, Matrix) {
[INFO] [stdout] 767 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 768 | |     debug_assert!(row <= matrix.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 815 | |     (top,bot)
[INFO] [stdout] 816 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 534 | / accelerated!(pub fn row_mul_acc(c:&mut [Tile], a:Tile, b:&[Tile]) {
[INFO] [stdout] 535 | |     /* Row operation: c += a*b, where a is a single tile, and (b,c) are vectors */
[INFO] [stdout] 536 | |     let len = min(b.len(),c.len());
[INFO] [stdout] 537 | |     if !a.is_zero() {
[INFO] [stdout] ...   |
[INFO] [stdout] 540 | |     }
[INFO] [stdout] 541 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 543 | / accelerated!(pub fn row_mul(a:Tile, b:&mut [Tile]) {
[INFO] [stdout] 544 | |     /* Row operation: b = a*b, where a is a single tile, and b is a vector */
[INFO] [stdout] 545 | |     if a.is_zero() {
[INFO] [stdout] 546 | |         for i in 0..b.len() { b[i] = Tile::ZERO; }
[INFO] [stdout] ...   |
[INFO] [stdout] 550 | |     }
[INFO] [stdout] 551 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:766:1
[INFO] [stdout]     |
[INFO] [stdout] 766 | / tile::simd::accelerated!(fn matrix_split_at_row(matrix: Matrix, row:usize) -> (Matrix, Matrix) {
[INFO] [stdout] 767 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 768 | |     debug_assert!(row <= matrix.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 815 | |     (top,bot)
[INFO] [stdout] 816 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 543 | / accelerated!(pub fn row_mul(a:Tile, b:&mut [Tile]) {
[INFO] [stdout] 544 | |     /* Row operation: b = a*b, where a is a single tile, and b is a vector */
[INFO] [stdout] 545 | |     if a.is_zero() {
[INFO] [stdout] 546 | |         for i in 0..b.len() { b[i] = Tile::ZERO; }
[INFO] [stdout] ...   |
[INFO] [stdout] 550 | |     }
[INFO] [stdout] 551 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 543 | / accelerated!(pub fn row_mul(a:Tile, b:&mut [Tile]) {
[INFO] [stdout] 544 | |     /* Row operation: b = a*b, where a is a single tile, and b is a vector */
[INFO] [stdout] 545 | |     if a.is_zero() {
[INFO] [stdout] 546 | |         for i in 0..b.len() { b[i] = Tile::ZERO; }
[INFO] [stdout] ...   |
[INFO] [stdout] 550 | |     }
[INFO] [stdout] 551 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:766:1
[INFO] [stdout]     |
[INFO] [stdout] 766 | / tile::simd::accelerated!(fn matrix_split_at_row(matrix: Matrix, row:usize) -> (Matrix, Matrix) {
[INFO] [stdout] 767 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 768 | |     debug_assert!(row <= matrix.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 815 | |     (top,bot)
[INFO] [stdout] 816 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 553 | / accelerated!(pub fn bulk_swap2_rows(a: &mut [Tile], b: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 554 | |     /* Double-row operation: swap rows ra..ra+nrows from a with rb..rb+nrows from b */
[INFO] [stdout] 555 | |     let ab = Tile::IDENTITY.extract_cols(rb,ra,nrows);
[INFO] [stdout] 556 | |     let ba = Tile::IDENTITY.extract_cols(ra,rb,nrows);
[INFO] [stdout] ...   |
[INFO] [stdout] 559 | |     row_mul_acc::with_accel::<Accel>(a,ab,b);
[INFO] [stdout] 560 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 553 | / accelerated!(pub fn bulk_swap2_rows(a: &mut [Tile], b: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 554 | |     /* Double-row operation: swap rows ra..ra+nrows from a with rb..rb+nrows from b */
[INFO] [stdout] 555 | |     let ab = Tile::IDENTITY.extract_cols(rb,ra,nrows);
[INFO] [stdout] 556 | |     let ba = Tile::IDENTITY.extract_cols(ra,rb,nrows);
[INFO] [stdout] ...   |
[INFO] [stdout] 559 | |     row_mul_acc::with_accel::<Accel>(a,ab,b);
[INFO] [stdout] 560 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 553 | / accelerated!(pub fn bulk_swap2_rows(a: &mut [Tile], b: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 554 | |     /* Double-row operation: swap rows ra..ra+nrows from a with rb..rb+nrows from b */
[INFO] [stdout] 555 | |     let ab = Tile::IDENTITY.extract_cols(rb,ra,nrows);
[INFO] [stdout] 556 | |     let ba = Tile::IDENTITY.extract_cols(ra,rb,nrows);
[INFO] [stdout] ...   |
[INFO] [stdout] 559 | |     row_mul_acc::with_accel::<Accel>(a,ab,b);
[INFO] [stdout] 560 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 562 | / accelerated!(pub fn bulk_swap_rows(a: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 563 | |     /* Single-row operation: swap rows ra..ra+nrows with rb..rb+nrows from b */
[INFO] [stdout] 564 | |     /* Permute columns of the identity; it's equivalent to swapping rows
[INFO] [stdout] 565 | |      * PERF: could probably accelerate making this permutation
[INFO] [stdout] ...   |
[INFO] [stdout] 580 | |     for i in 0..a.len() { a[i] = Accel::precomputed_mul(&study, a[i]); }
[INFO] [stdout] 581 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 562 | / accelerated!(pub fn bulk_swap_rows(a: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 563 | |     /* Single-row operation: swap rows ra..ra+nrows with rb..rb+nrows from b */
[INFO] [stdout] 564 | |     /* Permute columns of the identity; it's equivalent to swapping rows
[INFO] [stdout] 565 | |      * PERF: could probably accelerate making this permutation
[INFO] [stdout] ...   |
[INFO] [stdout] 580 | |     for i in 0..a.len() { a[i] = Accel::precomputed_mul(&study, a[i]); }
[INFO] [stdout] 581 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 562 | / accelerated!(pub fn bulk_swap_rows(a: &mut [Tile], ra:Index, rb:Index, nrows: usize) {
[INFO] [stdout] 563 | |     /* Single-row operation: swap rows ra..ra+nrows with rb..rb+nrows from b */
[INFO] [stdout] 564 | |     /* Permute columns of the identity; it's equivalent to swapping rows
[INFO] [stdout] 565 | |      * PERF: could probably accelerate making this permutation
[INFO] [stdout] ...   |
[INFO] [stdout] 580 | |     for i in 0..a.len() { a[i] = Accel::precomputed_mul(&study, a[i]); }
[INFO] [stdout] 581 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 583 | / accelerated!(fn tile_mut_permute_columns(t: &mut Tile, p:&Permutation) {
[INFO] [stdout] 584 | |     /* Permute the columns of t */
[INFO] [stdout] 585 | |     Accel::mut_permute_columns(t,p);
[INFO] [stdout] 586 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 583 | / accelerated!(fn tile_mut_permute_columns(t: &mut Tile, p:&Permutation) {
[INFO] [stdout] 584 | |     /* Permute the columns of t */
[INFO] [stdout] 585 | |     Accel::mut_permute_columns(t,p);
[INFO] [stdout] 586 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 583 | / accelerated!(fn tile_mut_permute_columns(t: &mut Tile, p:&Permutation) {
[INFO] [stdout] 584 | |     /* Permute the columns of t */
[INFO] [stdout] 585 | |     Accel::mut_permute_columns(t,p);
[INFO] [stdout] 586 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 588 | / accelerated!(pub fn bulk_permute_accum_columns(
[INFO] [stdout] 589 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 590 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 591 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 601 | |     }
[INFO] [stdout] 602 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 588 | / accelerated!(pub fn bulk_permute_accum_columns(
[INFO] [stdout] 589 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 590 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 591 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 601 | |     }
[INFO] [stdout] 602 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 588 | / accelerated!(pub fn bulk_permute_accum_columns(
[INFO] [stdout] 589 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 590 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 591 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 601 | |     }
[INFO] [stdout] 602 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 604 | / accelerated!(pub fn bulk_permute_set_columns(
[INFO] [stdout] 605 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 606 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 607 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 617 | |     }
[INFO] [stdout] 618 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 604 | / accelerated!(pub fn bulk_permute_set_columns(
[INFO] [stdout] 605 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 606 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 607 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 617 | |     }
[INFO] [stdout] 618 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 604 | / accelerated!(pub fn bulk_permute_set_columns(
[INFO] [stdout] 605 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 606 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 607 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 617 | |     }
[INFO] [stdout] 618 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 621 | / accelerated!(pub fn bulk_permute_accum2_columns(
[INFO] [stdout] 622 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 623 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 624 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 640 | |     }
[INFO] [stdout] 641 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 621 | / accelerated!(pub fn bulk_permute_accum2_columns(
[INFO] [stdout] 622 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 623 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 624 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 640 | |     }
[INFO] [stdout] 641 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] ...
[INFO] [stdout] 621 | / accelerated!(pub fn bulk_permute_accum2_columns(
[INFO] [stdout] 622 | |     dst: &mut [Tile], dst_stride:usize,
[INFO] [stdout] 623 | |     src: &[Tile], src_stride:usize,
[INFO] [stdout] 624 | |     ntiles: usize,
[INFO] [stdout] ...   |
[INFO] [stdout] 640 | |     }
[INFO] [stdout] 641 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:447:1
[INFO] [stdout]     |
[INFO] [stdout] 447 | / tile::simd::accelerated!(fn matrix_accum_mul(dst: &mut Matrix, a: &Matrix, b: &Matrix) {
[INFO] [stdout] 448 | |     let trows    = tiles_spanning(min(dst.rows,a.rows));
[INFO] [stdout] 449 | |     let mut taug = tiles_spanning(min(dst.cols_aug,b.cols_aug));
[INFO] [stdout] 450 | |     let taug_a   = tiles_spanning(min(dst.cols_aug,a.cols_aug));
[INFO] [stdout] ...   |
[INFO] [stdout] 473 | |     }
[INFO] [stdout] 474 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:447:1
[INFO] [stdout]     |
[INFO] [stdout] 447 | / tile::simd::accelerated!(fn matrix_accum_mul(dst: &mut Matrix, a: &Matrix, b: &Matrix) {
[INFO] [stdout] 448 | |     let trows    = tiles_spanning(min(dst.rows,a.rows));
[INFO] [stdout] 449 | |     let mut taug = tiles_spanning(min(dst.cols_aug,b.cols_aug));
[INFO] [stdout] 450 | |     let taug_a   = tiles_spanning(min(dst.cols_aug,a.cols_aug));
[INFO] [stdout] ...   |
[INFO] [stdout] 473 | |     }
[INFO] [stdout] 474 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:447:1
[INFO] [stdout]     |
[INFO] [stdout] 447 | / tile::simd::accelerated!(fn matrix_accum_mul(dst: &mut Matrix, a: &Matrix, b: &Matrix) {
[INFO] [stdout] 448 | |     let trows    = tiles_spanning(min(dst.rows,a.rows));
[INFO] [stdout] 449 | |     let mut taug = tiles_spanning(min(dst.cols_aug,b.cols_aug));
[INFO] [stdout] 450 | |     let taug_a   = tiles_spanning(min(dst.cols_aug,a.cols_aug));
[INFO] [stdout] ...   |
[INFO] [stdout] 473 | |     }
[INFO] [stdout] 474 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:476:1
[INFO] [stdout]     |
[INFO] [stdout] 476 | / tile::simd::accelerated!(pub fn matrix_rref(matrix: &mut Matrix) -> (usize, BitSet) {
[INFO] [stdout] 477 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 478 | |     let rows = matrix.rows;
[INFO] [stdout] 479 | |     let cols = matrix.cols_main;
[INFO] [stdout] ...   |
[INFO] [stdout] 596 | |     (rank, column_is_in_echelon)
[INFO] [stdout] 597 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:476:1
[INFO] [stdout]     |
[INFO] [stdout] 476 | / tile::simd::accelerated!(pub fn matrix_rref(matrix: &mut Matrix) -> (usize, BitSet) {
[INFO] [stdout] 477 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 478 | |     let rows = matrix.rows;
[INFO] [stdout] 479 | |     let cols = matrix.cols_main;
[INFO] [stdout] ...   |
[INFO] [stdout] 596 | |     (rank, column_is_in_echelon)
[INFO] [stdout] 597 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:476:1
[INFO] [stdout]     |
[INFO] [stdout] 476 | / tile::simd::accelerated!(pub fn matrix_rref(matrix: &mut Matrix) -> (usize, BitSet) {
[INFO] [stdout] 477 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 478 | |     let rows = matrix.rows;
[INFO] [stdout] 479 | |     let cols = matrix.cols_main;
[INFO] [stdout] ...   |
[INFO] [stdout] 596 | |     (rank, column_is_in_echelon)
[INFO] [stdout] 597 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:599:1
[INFO] [stdout]     |
[INFO] [stdout] 599 | / tile::simd::accelerated!(fn matrix_partition_rows(matrix: &Matrix, rows: &BitSet) -> (Matrix,Matrix) {
[INFO] [stdout] 600 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 601 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] 602 | |     let tcols = tiles_spanning(matrix.cols_main) + tiles_spanning(matrix.cols_aug);
[INFO] [stdout] ...   |
[INFO] [stdout] 638 | |     (yes,no)
[INFO] [stdout] 639 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:599:1
[INFO] [stdout]     |
[INFO] [stdout] 599 | / tile::simd::accelerated!(fn matrix_partition_rows(matrix: &Matrix, rows: &BitSet) -> (Matrix,Matrix) {
[INFO] [stdout] 600 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 601 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] 602 | |     let tcols = tiles_spanning(matrix.cols_main) + tiles_spanning(matrix.cols_aug);
[INFO] [stdout] ...   |
[INFO] [stdout] 638 | |     (yes,no)
[INFO] [stdout] 639 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:599:1
[INFO] [stdout]     |
[INFO] [stdout] 599 | / tile::simd::accelerated!(fn matrix_partition_rows(matrix: &Matrix, rows: &BitSet) -> (Matrix,Matrix) {
[INFO] [stdout] 600 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 601 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] 602 | |     let tcols = tiles_spanning(matrix.cols_main) + tiles_spanning(matrix.cols_aug);
[INFO] [stdout] ...   |
[INFO] [stdout] 638 | |     (yes,no)
[INFO] [stdout] 639 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:641:1
[INFO] [stdout]     |
[INFO] [stdout] 641 | / tile::simd::accelerated!(fn matrix_interleave_rows(matrix: &Matrix, other: &Matrix, take_from_self: &BitSet) -> Matrix {
[INFO] [stdout] 642 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 643 | |     // debug_assert!(other.is_valid());
[INFO] [stdout] 644 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] ...   |
[INFO] [stdout] 683 | |     result
[INFO] [stdout] 684 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:641:1
[INFO] [stdout]     |
[INFO] [stdout] 641 | / tile::simd::accelerated!(fn matrix_interleave_rows(matrix: &Matrix, other: &Matrix, take_from_self: &BitSet) -> Matrix {
[INFO] [stdout] 642 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 643 | |     // debug_assert!(other.is_valid());
[INFO] [stdout] 644 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] ...   |
[INFO] [stdout] 683 | |     result
[INFO] [stdout] 684 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:641:1
[INFO] [stdout]     |
[INFO] [stdout] 641 | / tile::simd::accelerated!(fn matrix_interleave_rows(matrix: &Matrix, other: &Matrix, take_from_self: &BitSet) -> Matrix {
[INFO] [stdout] 642 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 643 | |     // debug_assert!(other.is_valid());
[INFO] [stdout] 644 | |     const EBITS:usize = Tile::EDGE_BITS as usize;
[INFO] [stdout] ...   |
[INFO] [stdout] 683 | |     result
[INFO] [stdout] 684 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:686:1
[INFO] [stdout]     |
[INFO] [stdout] 686 | / tile::simd::accelerated!(fn matrix_append_columns(matrix: &Matrix, rhs: &Matrix) -> Matrix {
[INFO] [stdout] 687 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 688 | |     // debug_assert!(rhs.is_valid());
[INFO] [stdout] 689 | |     assert!(matrix.rows == rhs.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 741 | |     ret
[INFO] [stdout] 742 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:686:1
[INFO] [stdout]     |
[INFO] [stdout] 686 | / tile::simd::accelerated!(fn matrix_append_columns(matrix: &Matrix, rhs: &Matrix) -> Matrix {
[INFO] [stdout] 687 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 688 | |     // debug_assert!(rhs.is_valid());
[INFO] [stdout] 689 | |     assert!(matrix.rows == rhs.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 741 | |     ret
[INFO] [stdout] 742 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:686:1
[INFO] [stdout]     |
[INFO] [stdout] 686 | / tile::simd::accelerated!(fn matrix_append_columns(matrix: &Matrix, rhs: &Matrix) -> Matrix {
[INFO] [stdout] 687 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 688 | |     // debug_assert!(rhs.is_valid());
[INFO] [stdout] 689 | |     assert!(matrix.rows == rhs.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 741 | |     ret
[INFO] [stdout] 742 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:744:1
[INFO] [stdout]     |
[INFO] [stdout] 744 | / tile::simd::accelerated!(fn matrix_swap_rows(matrix: &mut Matrix, ra:usize, rb:usize, nrows:usize, start:usize) {
[INFO] [stdout] 745 | |     let mut nrows = nrows;
[INFO] [stdout] 746 | |     if ra == rb { return };
[INFO] [stdout] 747 | |     let (mut ra, mut rb) = (min(ra,rb), max(ra,rb));
[INFO] [stdout] ...   |
[INFO] [stdout] 763 | |     }
[INFO] [stdout] 764 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:744:1
[INFO] [stdout]     |
[INFO] [stdout] 744 | / tile::simd::accelerated!(fn matrix_swap_rows(matrix: &mut Matrix, ra:usize, rb:usize, nrows:usize, start:usize) {
[INFO] [stdout] 745 | |     let mut nrows = nrows;
[INFO] [stdout] 746 | |     if ra == rb { return };
[INFO] [stdout] 747 | |     let (mut ra, mut rb) = (min(ra,rb), max(ra,rb));
[INFO] [stdout] ...   |
[INFO] [stdout] 763 | |     }
[INFO] [stdout] 764 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:744:1
[INFO] [stdout]     |
[INFO] [stdout] 744 | / tile::simd::accelerated!(fn matrix_swap_rows(matrix: &mut Matrix, ra:usize, rb:usize, nrows:usize, start:usize) {
[INFO] [stdout] 745 | |     let mut nrows = nrows;
[INFO] [stdout] 746 | |     if ra == rb { return };
[INFO] [stdout] 747 | |     let (mut ra, mut rb) = (min(ra,rb), max(ra,rb));
[INFO] [stdout] ...   |
[INFO] [stdout] 763 | |     }
[INFO] [stdout] 764 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:461:41
[INFO] [stdout]     |
[INFO] [stdout] 461 |           #[cfg(any(target_arch="aarch64",target_arch="armv7"))]
[INFO] [stdout]     |                                           ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:766:1
[INFO] [stdout]     |
[INFO] [stdout] 766 | / tile::simd::accelerated!(fn matrix_split_at_row(matrix: Matrix, row:usize) -> (Matrix, Matrix) {
[INFO] [stdout] 767 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 768 | |     debug_assert!(row <= matrix.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 815 | |     (top,bot)
[INFO] [stdout] 816 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:502:19
[INFO] [stdout]     |
[INFO] [stdout] 502 |           #[cfg(any(target_arch="armv7"))]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:766:1
[INFO] [stdout]     |
[INFO] [stdout] 766 | / tile::simd::accelerated!(fn matrix_split_at_row(matrix: Matrix, row:usize) -> (Matrix, Matrix) {
[INFO] [stdout] 767 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 768 | |     debug_assert!(row <= matrix.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 815 | |     (top,bot)
[INFO] [stdout] 816 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: unexpected `cfg` condition value: `armv7`
[INFO] [stdout]    --> src/tilematrix/tile.rs:511:19
[INFO] [stdout]     |
[INFO] [stdout] 511 |               #[cfg(target_arch="armv7")]
[INFO] [stdout]     |                     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout]     |
[INFO] [stdout]    ::: src/tilematrix/matrix.rs:766:1
[INFO] [stdout]     |
[INFO] [stdout] 766 | / tile::simd::accelerated!(fn matrix_split_at_row(matrix: Matrix, row:usize) -> (Matrix, Matrix) {
[INFO] [stdout] 767 | |     // debug_assert!(matrix.is_valid());
[INFO] [stdout] 768 | |     debug_assert!(row <= matrix.rows);
[INFO] [stdout] ...   |
[INFO] [stdout] 815 | |     (top,bot)
[INFO] [stdout] 816 | | });
[INFO] [stdout]     | |__- in this macro invocation
[INFO] [stdout]     |
[INFO] [stdout]     = note: expected values for `target_arch` are: `aarch64`, `arm`, `arm64ec`, `avr`, `bpf`, `csky`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`, and `xtensa`
[INFO] [stdout]     = note: see <https://doc.rust-lang.org/nightly/rustc/check-cfg/cargo-specifics.html> for more information about checking conditional configuration
[INFO] [stdout]     = note: this warning originates in the macro `tile::simd::accelerated` (in Nightly builds, run with -Z macro-backtrace for more info)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0107]: struct takes at most 3 generic arguments but 4 generic arguments were supplied
[INFO] [stdout]     --> src/uniform.rs:1157:32
[INFO] [stdout]      |
[INFO] [stdout] 1157 | pub const STD_BINCODE_CONFIG : Configuration<LittleEndian,Fixint,SkipFixedArrayLength,NoLimit>
[INFO] [stdout]      |                                ^^^^^^^^^^^^^ expected at most 3 generic arguments    -------- help: remove the unnecessary generic argument
[INFO] [stdout]      |
[INFO] [stdout] note: struct defined here, with at most 3 generic parameters: `E`, `I`, `L`
[INFO] [stdout]     --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/config.rs:36:12
[INFO] [stdout]      |
[INFO] [stdout] 36   | pub struct Configuration<E = LittleEndian, I = Varint, L = NoLimit> {
[INFO] [stdout]      |            ^^^^^^^^^^^^^ ----------------  ----------  -----------
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0107]: struct takes at most 3 generic arguments but 4 generic arguments were supplied
[INFO] [stdout]     --> src/uniform.rs:1157:32
[INFO] [stdout]      |
[INFO] [stdout] 1157 | pub const STD_BINCODE_CONFIG : Configuration<LittleEndian,Fixint,SkipFixedArrayLength,NoLimit>
[INFO] [stdout]      |                                ^^^^^^^^^^^^^ expected at most 3 generic arguments    -------- help: remove the unnecessary generic argument
[INFO] [stdout]      |
[INFO] [stdout] note: struct defined here, with at most 3 generic parameters: `E`, `I`, `L`
[INFO] [stdout]     --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/config.rs:36:12
[INFO] [stdout]      |
[INFO] [stdout] 36   | pub struct Configuration<E = LittleEndian, I = Varint, L = NoLimit> {
[INFO] [stdout]      |            ^^^^^^^^^^^^^ ----------------  ----------  -----------
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0599]: no method named `skip_fixed_array_length` found for struct `bincode::config::Configuration` in the current scope
[INFO] [stdout]     --> src/uniform.rs:1161:6
[INFO] [stdout]      |
[INFO] [stdout] 1158 |       = bincode::config::standard()
[INFO] [stdout]      |  _______-
[INFO] [stdout] 1159 | |     .with_little_endian()
[INFO] [stdout] 1160 | |     .with_fixed_int_encoding()
[INFO] [stdout] 1161 | |     .skip_fixed_array_length();
[INFO] [stdout]      | |     -^^^^^^^^^^^^^^^^^^^^^^^ method not found in `Configuration<LittleEndian, Fixint>`
[INFO] [stdout]      | |_____|
[INFO] [stdout]      |
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0599]: no method named `skip_fixed_array_length` found for struct `bincode::config::Configuration` in the current scope
[INFO] [stdout]     --> src/uniform.rs:1161:6
[INFO] [stdout]      |
[INFO] [stdout] 1158 |       = bincode::config::standard()
[INFO] [stdout]      |  _______-
[INFO] [stdout] 1159 | |     .with_little_endian()
[INFO] [stdout] 1160 | |     .with_fixed_int_encoding()
[INFO] [stdout] 1161 | |     .skip_fixed_array_length();
[INFO] [stdout]      | |     -^^^^^^^^^^^^^^^^^^^^^^^ method not found in `Configuration<LittleEndian, Fixint>`
[INFO] [stdout]      | |_____|
[INFO] [stdout]      |
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0026]: variant `bincode::error::EncodeError::Io` does not have a field named `error`
[INFO] [stdout]    --> src/uniform.rs:407:34
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                                  ^^^^^
[INFO] [stdout]     |                                  |
[INFO] [stdout]     |                                  variant `bincode::error::EncodeError::Io` does not have this field
[INFO] [stdout]     |                                  help: `bincode::error::EncodeError::Io` has a field named `inner`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0027]: pattern does not mention field `inner`
[INFO] [stdout]    --> src/uniform.rs:407:17
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ missing field `inner`
[INFO] [stdout]     |
[INFO] [stdout] help: include the missing field in the pattern
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s, inner } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~
[INFO] [stdout] help: if you don't care about this missing field, you can explicitly ignore it
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s, inner: _ } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~~~~
[INFO] [stdout] help: or always ignore missing fields here
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s, .. } => e,
[INFO] [stdout]     |                                                   ~~~~~~
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0277]: the trait bound `MapCore<'_, H>: Decode` is not satisfied
[INFO] [stdout]    --> src/uniform.rs:420:15
[INFO] [stdout]     |
[INFO] [stdout] 420 |             = bincode::decode_from_slice(&buf, STD_BINCODE_CONFIG)
[INFO] [stdout]     |               ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Decode` is not implemented for `MapCore<'_, H>`
[INFO] [stdout]     |
[INFO] [stdout]     = help: the following other types implement trait `Decode`:
[INFO] [stdout]               ()
[INFO] [stdout]               (A, B)
[INFO] [stdout]               (A, B, C)
[INFO] [stdout]               (A, B, C, D)
[INFO] [stdout]               (A, B, C, D, E)
[INFO] [stdout]               (A, B, C, D, E, F)
[INFO] [stdout]               (A, B, C, D, E, F, G)
[INFO] [stdout]               (A, B, C, D, E, F, G, H)
[INFO] [stdout]             and 86 others
[INFO] [stdout] note: required by a bound in `decode_from_slice`
[INFO] [stdout]    --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/lib.rs:140:29
[INFO] [stdout]     |
[INFO] [stdout] 140 | pub fn decode_from_slice<D: de::Decode, C: Config>(
[INFO] [stdout]     |                             ^^^^^^^^^^ required by this bound in `decode_from_slice`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0026]: variant `bincode::error::EncodeError::Io` does not have a field named `error`
[INFO] [stdout]    --> src/uniform.rs:407:34
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                                  ^^^^^
[INFO] [stdout]     |                                  |
[INFO] [stdout]     |                                  variant `bincode::error::EncodeError::Io` does not have this field
[INFO] [stdout]     |                                  help: `bincode::error::EncodeError::Io` has a field named `inner`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0027]: pattern does not mention field `inner`
[INFO] [stdout]    --> src/uniform.rs:407:17
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ missing field `inner`
[INFO] [stdout]     |
[INFO] [stdout] help: include the missing field in the pattern
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s, inner } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~
[INFO] [stdout] help: if you don't care about this missing field, you can explicitly ignore it
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s, inner: _ } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~~~~
[INFO] [stdout] help: or always ignore missing fields here
[INFO] [stdout]     |
[INFO] [stdout] 407 |                 EncodeError::Io{ error:e, index:_s, .. } => e,
[INFO] [stdout]     |                                                   ~~~~~~
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0277]: the trait bound `MapCore<'_, H>: Decode` is not satisfied
[INFO] [stdout]    --> src/uniform.rs:420:15
[INFO] [stdout]     |
[INFO] [stdout] 420 |             = bincode::decode_from_slice(&buf, STD_BINCODE_CONFIG)
[INFO] [stdout]     |               ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Decode` is not implemented for `MapCore<'_, H>`
[INFO] [stdout]     |
[INFO] [stdout]     = help: the following other types implement trait `Decode`:
[INFO] [stdout]               ()
[INFO] [stdout]               (A, B)
[INFO] [stdout]               (A, B, C)
[INFO] [stdout]               (A, B, C, D)
[INFO] [stdout]               (A, B, C, D, E)
[INFO] [stdout]               (A, B, C, D, E, F)
[INFO] [stdout]               (A, B, C, D, E, F, G)
[INFO] [stdout]               (A, B, C, D, E, F, G, H)
[INFO] [stdout]             and 86 others
[INFO] [stdout] note: required by a bound in `decode_from_slice`
[INFO] [stdout]    --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/lib.rs:140:29
[INFO] [stdout]     |
[INFO] [stdout] 140 | pub fn decode_from_slice<D: de::Decode, C: Config>(
[INFO] [stdout]     |                             ^^^^^^^^^^ required by this bound in `decode_from_slice`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0026]: variant `bincode::error::EncodeError::Io` does not have a field named `error`
[INFO] [stdout]    --> src/nonuniform.rs:455:34
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                                  ^^^^^
[INFO] [stdout]     |                                  |
[INFO] [stdout]     |                                  variant `bincode::error::EncodeError::Io` does not have this field
[INFO] [stdout]     |                                  help: `bincode::error::EncodeError::Io` has a field named `inner`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0027]: pattern does not mention field `inner`
[INFO] [stdout]    --> src/nonuniform.rs:455:17
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ missing field `inner`
[INFO] [stdout]     |
[INFO] [stdout] help: include the missing field in the pattern
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s, inner } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~
[INFO] [stdout] help: if you don't care about this missing field, you can explicitly ignore it
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s, inner: _ } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~~~~
[INFO] [stdout] help: or always ignore missing fields here
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s, .. } => e,
[INFO] [stdout]     |                                                   ~~~~~~
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0277]: the trait bound `CompressedMap<'_, K, V, H>: Decode` is not satisfied
[INFO] [stdout]    --> src/nonuniform.rs:475:15
[INFO] [stdout]     |
[INFO] [stdout] 475 |             = bincode::decode_from_slice(&buf, STD_BINCODE_CONFIG)
[INFO] [stdout]     |               ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Decode` is not implemented for `CompressedMap<'_, K, V, H>`
[INFO] [stdout]     |
[INFO] [stdout]     = help: the following other types implement trait `Decode`:
[INFO] [stdout]               ()
[INFO] [stdout]               (A, B)
[INFO] [stdout]               (A, B, C)
[INFO] [stdout]               (A, B, C, D)
[INFO] [stdout]               (A, B, C, D, E)
[INFO] [stdout]               (A, B, C, D, E, F)
[INFO] [stdout]               (A, B, C, D, E, F, G)
[INFO] [stdout]               (A, B, C, D, E, F, G, H)
[INFO] [stdout]             and 86 others
[INFO] [stdout] note: required by a bound in `decode_from_slice`
[INFO] [stdout]    --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/lib.rs:140:29
[INFO] [stdout]     |
[INFO] [stdout] 140 | pub fn decode_from_slice<D: de::Decode, C: Config>(
[INFO] [stdout]     |                             ^^^^^^^^^^ required by this bound in `decode_from_slice`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0277]: the trait bound `CompressedRandomMap<'_, u64, u8>: Decode` is not satisfied
[INFO] [stdout]     --> src/uniform.rs:1193:25
[INFO] [stdout]      |
[INFO] [stdout] 1193 |             let deser = decode_from_slice(&ser, STD_BINCODE_CONFIG);
[INFO] [stdout]      |                         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Decode` is not implemented for `CompressedRandomMap<'_, u64, u8>`
[INFO] [stdout]      |
[INFO] [stdout]      = help: the following other types implement trait `Decode`:
[INFO] [stdout]                ()
[INFO] [stdout]                (A, B)
[INFO] [stdout]                (A, B, C)
[INFO] [stdout]                (A, B, C, D)
[INFO] [stdout]                (A, B, C, D, E)
[INFO] [stdout]                (A, B, C, D, E, F)
[INFO] [stdout]                (A, B, C, D, E, F, G)
[INFO] [stdout]                (A, B, C, D, E, F, G, H)
[INFO] [stdout]              and 86 others
[INFO] [stdout] note: required by a bound in `decode_from_slice`
[INFO] [stdout]     --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/lib.rs:140:29
[INFO] [stdout]      |
[INFO] [stdout] 140  | pub fn decode_from_slice<D: de::Decode, C: Config>(
[INFO] [stdout]      |                             ^^^^^^^^^^ required by this bound in `decode_from_slice`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0277]: the trait bound `ApproxSet<'_, u64>: Decode` is not satisfied
[INFO] [stdout]     --> src/uniform.rs:1226:25
[INFO] [stdout]      |
[INFO] [stdout] 1226 |             let deser = decode_from_slice(&ser, STD_BINCODE_CONFIG);
[INFO] [stdout]      |                         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Decode` is not implemented for `ApproxSet<'_, u64>`
[INFO] [stdout]      |
[INFO] [stdout]      = help: the following other types implement trait `Decode`:
[INFO] [stdout]                ()
[INFO] [stdout]                (A, B)
[INFO] [stdout]                (A, B, C)
[INFO] [stdout]                (A, B, C, D)
[INFO] [stdout]                (A, B, C, D, E)
[INFO] [stdout]                (A, B, C, D, E, F)
[INFO] [stdout]                (A, B, C, D, E, F, G)
[INFO] [stdout]                (A, B, C, D, E, F, G, H)
[INFO] [stdout]              and 86 others
[INFO] [stdout] note: required by a bound in `decode_from_slice`
[INFO] [stdout]     --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/lib.rs:140:29
[INFO] [stdout]      |
[INFO] [stdout] 140  | pub fn decode_from_slice<D: de::Decode, C: Config>(
[INFO] [stdout]      |                             ^^^^^^^^^^ required by this bound in `decode_from_slice`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0026]: variant `bincode::error::EncodeError::Io` does not have a field named `error`
[INFO] [stdout]    --> src/nonuniform.rs:455:34
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                                  ^^^^^
[INFO] [stdout]     |                                  |
[INFO] [stdout]     |                                  variant `bincode::error::EncodeError::Io` does not have this field
[INFO] [stdout]     |                                  help: `bincode::error::EncodeError::Io` has a field named `inner`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0027]: pattern does not mention field `inner`
[INFO] [stdout]    --> src/nonuniform.rs:455:17
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s } => e,
[INFO] [stdout]     |                 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ missing field `inner`
[INFO] [stdout]     |
[INFO] [stdout] help: include the missing field in the pattern
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s, inner } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~
[INFO] [stdout] help: if you don't care about this missing field, you can explicitly ignore it
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s, inner: _ } => e,
[INFO] [stdout]     |                                                   ~~~~~~~~~~~~
[INFO] [stdout] help: or always ignore missing fields here
[INFO] [stdout]     |
[INFO] [stdout] 455 |                 EncodeError::Io{ error:e, index:_s, .. } => e,
[INFO] [stdout]     |                                                   ~~~~~~
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0277]: the trait bound `CompressedMap<'_, K, V, H>: Decode` is not satisfied
[INFO] [stdout]    --> src/nonuniform.rs:475:15
[INFO] [stdout]     |
[INFO] [stdout] 475 |             = bincode::decode_from_slice(&buf, STD_BINCODE_CONFIG)
[INFO] [stdout]     |               ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Decode` is not implemented for `CompressedMap<'_, K, V, H>`
[INFO] [stdout]     |
[INFO] [stdout]     = help: the following other types implement trait `Decode`:
[INFO] [stdout]               ()
[INFO] [stdout]               (A, B)
[INFO] [stdout]               (A, B, C)
[INFO] [stdout]               (A, B, C, D)
[INFO] [stdout]               (A, B, C, D, E)
[INFO] [stdout]               (A, B, C, D, E, F)
[INFO] [stdout]               (A, B, C, D, E, F, G)
[INFO] [stdout]               (A, B, C, D, E, F, G, H)
[INFO] [stdout]             and 86 others
[INFO] [stdout] note: required by a bound in `decode_from_slice`
[INFO] [stdout]    --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/lib.rs:140:29
[INFO] [stdout]     |
[INFO] [stdout] 140 | pub fn decode_from_slice<D: de::Decode, C: Config>(
[INFO] [stdout]     |                             ^^^^^^^^^^ required by this bound in `decode_from_slice`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0277]: the trait bound `CompressedMap<'_, u32, u32>: Decode` is not satisfied
[INFO] [stdout]    --> src/nonuniform.rs:702:25
[INFO] [stdout]     |
[INFO] [stdout] 702 |             let deser = decode_from_slice(&ser, STD_BINCODE_CONFIG);
[INFO] [stdout]     |                         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Decode` is not implemented for `CompressedMap<'_, u32, u32>`
[INFO] [stdout]     |
[INFO] [stdout]     = help: the following other types implement trait `Decode`:
[INFO] [stdout]               ()
[INFO] [stdout]               (A, B)
[INFO] [stdout]               (A, B, C)
[INFO] [stdout]               (A, B, C, D)
[INFO] [stdout]               (A, B, C, D, E)
[INFO] [stdout]               (A, B, C, D, E, F)
[INFO] [stdout]               (A, B, C, D, E, F, G)
[INFO] [stdout]               (A, B, C, D, E, F, G, H)
[INFO] [stdout]             and 86 others
[INFO] [stdout] note: required by a bound in `decode_from_slice`
[INFO] [stdout]    --> /opt/rustwide/cargo-home/registry/src/index.crates.io-6f17d22bba15001f/bincode-2.0.0-rc.3/src/lib.rs:140:29
[INFO] [stdout]     |
[INFO] [stdout] 140 | pub fn decode_from_slice<D: de::Decode, C: Config>(
[INFO] [stdout]     |                             ^^^^^^^^^^ required by this bound in `decode_from_slice`
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] Some errors have detailed explanations: E0026, E0027, E0107, E0277, E0412, E0599.
[INFO] [stdout] 
[INFO] [stdout] For more information about an error, try `rustc --explain E0026`.
[INFO] [stdout] 
[INFO] [stderr] error: could not compile `compressed_map` (lib) due to 9 previous errors; 48 warnings emitted
[INFO] [stderr] warning: build failed, waiting for other jobs to finish...
[INFO] [stdout] Some errors have detailed explanations: E0026, E0027, E0107, E0277, E0412, E0599.
[INFO] [stdout] 
[INFO] [stdout] For more information about an error, try `rustc --explain E0026`.
[INFO] [stdout] 
[INFO] [stderr] error: could not compile `compressed_map` (lib test) due to 12 previous errors; 48 warnings emitted
[INFO] running `Command { std: "docker" "inspect" "d42a08cc6e9815ea369b473477aa0172f1c410f0f339d7866a6e501abf2840f7", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "d42a08cc6e9815ea369b473477aa0172f1c410f0f339d7866a6e501abf2840f7", kill_on_drop: false }`
[INFO] [stdout] d42a08cc6e9815ea369b473477aa0172f1c410f0f339d7866a6e501abf2840f7
