[INFO] fetching crate gba 0.11.3...
[INFO] checking gba-0.11.3 against master#c2f2db79ca3024f68d22b45aa22b570775c2c4ad for pr-124157
[INFO] extracting crate gba 0.11.3 into /workspace/builds/worker-7-tc1/source
[INFO] validating manifest of crates.io crate gba 0.11.3 on toolchain c2f2db79ca3024f68d22b45aa22b570775c2c4ad
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+c2f2db79ca3024f68d22b45aa22b570775c2c4ad" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }`
[INFO] removed /workspace/builds/worker-7-tc1/source/.cargo/config.toml
[INFO] started tweaking crates.io crate gba 0.11.3
[INFO] finished tweaking crates.io crate gba 0.11.3
[INFO] tweaked toml for crates.io crate gba 0.11.3 written to /workspace/builds/worker-7-tc1/source/Cargo.toml
[INFO] crate crates.io crate gba 0.11.3 already has a lockfile, it will not be regenerated
[INFO] running `Command { std: CARGO_HOME="/workspace/cargo-home" RUSTUP_HOME="/workspace/rustup-home" "/workspace/cargo-home/bin/cargo" "+c2f2db79ca3024f68d22b45aa22b570775c2c4ad" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }`
[INFO] [stderr]     Updating crates.io index
[INFO] [stderr]  Downloading crates ...
[INFO] [stderr]   Downloaded voladdress v1.3.0
[INFO] [stderr]   Downloaded bitfrob v1.0.0
[INFO] [stderr]   Downloaded bracer v0.1.2
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:99613afd962a8cfa530ec1899472a458bd015a1ab0af876cf7eb06f6006d81ea" "/opt/rustwide/cargo-home/bin/cargo" "+c2f2db79ca3024f68d22b45aa22b570775c2c4ad" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }`
[INFO] [stdout] 9a8a72a1339f6916ec9bb68973e254a080d0590d6fa5298c8ac673d1b759a24f
[INFO] running `Command { std: "docker" "start" "-a" "9a8a72a1339f6916ec9bb68973e254a080d0590d6fa5298c8ac673d1b759a24f", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "inspect" "9a8a72a1339f6916ec9bb68973e254a080d0590d6fa5298c8ac673d1b759a24f", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "9a8a72a1339f6916ec9bb68973e254a080d0590d6fa5298c8ac673d1b759a24f", kill_on_drop: false }`
[INFO] [stdout] 9a8a72a1339f6916ec9bb68973e254a080d0590d6fa5298c8ac673d1b759a24f
[INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-7-tc1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=forbid" "-e" "RUSTDOCFLAGS=--cap-lints=forbid" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:99613afd962a8cfa530ec1899472a458bd015a1ab0af876cf7eb06f6006d81ea" "/opt/rustwide/cargo-home/bin/cargo" "+c2f2db79ca3024f68d22b45aa22b570775c2c4ad" "check" "--frozen" "--all" "--all-targets" "--message-format=json", kill_on_drop: false }`
[INFO] [stdout] 9b991c947dff81b88174e7c3c3620836996eda0e873bf809f1be2005bc56cae1
[INFO] running `Command { std: "docker" "start" "-a" "9b991c947dff81b88174e7c3c3620836996eda0e873bf809f1be2005bc56cae1", kill_on_drop: false }`
[INFO] [stderr]     Checking bitfrob v1.0.0
[INFO] [stderr]     Checking bracer v0.1.2
[INFO] [stderr]     Checking voladdress v1.3.0
[INFO] [stderr]     Checking gba v0.11.3 (/opt/rustwide/workdir)
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]   --> src/bios.rs:63:7
[INFO] [stdout]    |
[INFO] [stdout] 63 |       inout("r0") ignore_existing as u32 => _,
[INFO] [stdout]    |       ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]   --> src/bios.rs:63:7
[INFO] [stdout]    |
[INFO] [stdout] 63 |       inout("r0") ignore_existing as u32 => _,
[INFO] [stdout]    |       ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]   --> src/bios.rs:64:7
[INFO] [stdout]    |
[INFO] [stdout] 64 |       inout("r1") target_irqs.to_u16() => _,
[INFO] [stdout]    |       ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]   --> src/bios.rs:65:7
[INFO] [stdout]    |
[INFO] [stdout] 65 |       out("r3") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]   --> src/bios.rs:78:7
[INFO] [stdout]    |
[INFO] [stdout] 78 |       out("r0") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]   --> src/bios.rs:64:7
[INFO] [stdout]    |
[INFO] [stdout] 64 |       inout("r1") target_irqs.to_u16() => _,
[INFO] [stdout]    |       ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]   --> src/bios.rs:79:7
[INFO] [stdout]    |
[INFO] [stdout] 79 |       out("r1") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]   --> src/bios.rs:80:7
[INFO] [stdout]    |
[INFO] [stdout] 80 |       out("r3") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]   --> src/bios.rs:65:7
[INFO] [stdout]    |
[INFO] [stdout] 65 |       out("r3") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]   --> src/bios.rs:97:7
[INFO] [stdout]    |
[INFO] [stdout] 97 |       inout("r0") i,
[INFO] [stdout]    |       ^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]   --> src/bios.rs:98:7
[INFO] [stdout]    |
[INFO] [stdout] 98 |       out("r1") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]   --> src/bios.rs:78:7
[INFO] [stdout]    |
[INFO] [stdout] 78 |       out("r0") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]   --> src/bios.rs:99:7
[INFO] [stdout]    |
[INFO] [stdout] 99 |       out("r3") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]   --> src/bios.rs:79:7
[INFO] [stdout]    |
[INFO] [stdout] 79 |       out("r1") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:121:7
[INFO] [stdout]     |
[INFO] [stdout] 121 |       inout("r0") x => output,
[INFO] [stdout]     |       ^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]   --> src/bios.rs:80:7
[INFO] [stdout]    |
[INFO] [stdout] 80 |       out("r3") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:122:7
[INFO] [stdout]     |
[INFO] [stdout] 122 |       inout("r1") y => _,
[INFO] [stdout]     |       ^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]   --> src/bios.rs:97:7
[INFO] [stdout]    |
[INFO] [stdout] 97 |       inout("r0") i,
[INFO] [stdout]    |       ^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]   --> src/bios.rs:98:7
[INFO] [stdout]    |
[INFO] [stdout] 98 |       out("r1") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:123:7
[INFO] [stdout]     |
[INFO] [stdout] 123 |       out("r3") _,
[INFO] [stdout]     |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]   --> src/bios.rs:99:7
[INFO] [stdout]    |
[INFO] [stdout] 99 |       out("r3") _,
[INFO] [stdout]    |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:121:7
[INFO] [stdout]     |
[INFO] [stdout] 121 |       inout("r0") x => output,
[INFO] [stdout]     |       ^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:122:7
[INFO] [stdout]     |
[INFO] [stdout] 122 |       inout("r1") y => _,
[INFO] [stdout]     |       ^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:123:7
[INFO] [stdout]     |
[INFO] [stdout] 123 |       out("r3") _,
[INFO] [stdout]     |       ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:177:5
[INFO] [stdout]     |
[INFO] [stdout] 177 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:178:5
[INFO] [stdout]     |
[INFO] [stdout] 178 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r2`: unknown register
[INFO] [stdout]    --> src/bios.rs:179:5
[INFO] [stdout]     |
[INFO] [stdout] 179 |     inout("r2") info => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:177:5
[INFO] [stdout]     |
[INFO] [stdout] 177 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:180:5
[INFO] [stdout]     |
[INFO] [stdout] 180 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:212:5
[INFO] [stdout]     |
[INFO] [stdout] 212 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:213:5
[INFO] [stdout]     |
[INFO] [stdout] 213 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:214:5
[INFO] [stdout]     |
[INFO] [stdout] 214 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:231:5
[INFO] [stdout]     |
[INFO] [stdout] 231 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:232:5
[INFO] [stdout]     |
[INFO] [stdout] 232 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:233:5
[INFO] [stdout]     |
[INFO] [stdout] 233 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:268:5
[INFO] [stdout]     |
[INFO] [stdout] 268 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:269:5
[INFO] [stdout]     |
[INFO] [stdout] 269 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:270:5
[INFO] [stdout]     |
[INFO] [stdout] 270 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:294:5
[INFO] [stdout]     |
[INFO] [stdout] 294 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:295:5
[INFO] [stdout]     |
[INFO] [stdout] 295 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:178:5
[INFO] [stdout]     |
[INFO] [stdout] 178 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:296:5
[INFO] [stdout]     |
[INFO] [stdout] 296 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r2`: unknown register
[INFO] [stdout]    --> src/bios.rs:179:5
[INFO] [stdout]     |
[INFO] [stdout] 179 |     inout("r2") info => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:313:5
[INFO] [stdout]     |
[INFO] [stdout] 313 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:180:5
[INFO] [stdout]     |
[INFO] [stdout] 180 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:314:5
[INFO] [stdout]     |
[INFO] [stdout] 314 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:315:5
[INFO] [stdout]     |
[INFO] [stdout] 315 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:212:5
[INFO] [stdout]     |
[INFO] [stdout] 212 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/dma.rs:158:5
[INFO] [stdout]     |
[INFO] [stdout] 158 |     in("r0") dma_addr,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:213:5
[INFO] [stdout]     |
[INFO] [stdout] 213 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/dma.rs:159:5
[INFO] [stdout]     |
[INFO] [stdout] 159 |     in("r1") src,
[INFO] [stdout]     |     ^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r2`: unknown register
[INFO] [stdout]    --> src/dma.rs:160:5
[INFO] [stdout]     |
[INFO] [stdout] 160 |     in("r2") dest,
[INFO] [stdout]     |     ^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/dma.rs:161:5
[INFO] [stdout]     |
[INFO] [stdout] 161 |     in("r3") count_ctrl,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:214:5
[INFO] [stdout]     |
[INFO] [stdout] 214 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:231:5
[INFO] [stdout]     |
[INFO] [stdout] 231 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:232:5
[INFO] [stdout]     |
[INFO] [stdout] 232 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:233:5
[INFO] [stdout]     |
[INFO] [stdout] 233 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:268:5
[INFO] [stdout]     |
[INFO] [stdout] 268 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:269:5
[INFO] [stdout]     |
[INFO] [stdout] 269 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:270:5
[INFO] [stdout]     |
[INFO] [stdout] 270 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:294:5
[INFO] [stdout]     |
[INFO] [stdout] 294 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:295:5
[INFO] [stdout]     |
[INFO] [stdout] 295 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:296:5
[INFO] [stdout]     |
[INFO] [stdout] 296 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/bios.rs:313:5
[INFO] [stdout]     |
[INFO] [stdout] 313 |     inout("r0") src => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/bios.rs:314:5
[INFO] [stdout]     |
[INFO] [stdout] 314 |     inout("r1") dest => _,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/bios.rs:315:5
[INFO] [stdout]     |
[INFO] [stdout] 315 |     out("r3") _,
[INFO] [stdout]     |     ^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r0`: unknown register
[INFO] [stdout]    --> src/dma.rs:158:5
[INFO] [stdout]     |
[INFO] [stdout] 158 |     in("r0") dma_addr,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r1`: unknown register
[INFO] [stdout]    --> src/dma.rs:159:5
[INFO] [stdout]     |
[INFO] [stdout] 159 |     in("r1") src,
[INFO] [stdout]     |     ^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r2`: unknown register
[INFO] [stdout]    --> src/dma.rs:160:5
[INFO] [stdout]     |
[INFO] [stdout] 160 |     in("r2") dest,
[INFO] [stdout]     |     ^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: invalid register `r3`: unknown register
[INFO] [stdout]    --> src/dma.rs:161:5
[INFO] [stdout]     |
[INFO] [stdout] 161 |     in("r3") count_ctrl,
[INFO] [stdout]     |     ^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/asm_runtime.rs:32:1
[INFO] [stdout]    |
[INFO] [stdout] 32 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:109:1
[INFO] [stdout]     |
[INFO] [stdout] 109 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:174:1
[INFO] [stdout]     |
[INFO] [stdout] 174 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:199:1
[INFO] [stdout]     |
[INFO] [stdout] 199 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:244:1
[INFO] [stdout]     |
[INFO] [stdout] 244 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:283:1
[INFO] [stdout]     |
[INFO] [stdout] 283 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:320:1
[INFO] [stdout]     |
[INFO] [stdout] 320 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:27:1
[INFO] [stdout]    |
[INFO] [stdout] 27 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:58:1
[INFO] [stdout]    |
[INFO] [stdout] 58 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:73:1
[INFO] [stdout]    |
[INFO] [stdout] 73 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:91:1
[INFO] [stdout]    |
[INFO] [stdout] 91 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:113:1
[INFO] [stdout]     |
[INFO] [stdout] 113 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/asm_runtime.rs:32:1
[INFO] [stdout]    |
[INFO] [stdout] 32 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:109:1
[INFO] [stdout]     |
[INFO] [stdout] 109 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:174:1
[INFO] [stdout]     |
[INFO] [stdout] 174 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:199:1
[INFO] [stdout]     |
[INFO] [stdout] 199 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:244:1
[INFO] [stdout]     |
[INFO] [stdout] 244 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:283:1
[INFO] [stdout]     |
[INFO] [stdout] 283 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/asm_runtime.rs:320:1
[INFO] [stdout]     |
[INFO] [stdout] 320 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:27:1
[INFO] [stdout]    |
[INFO] [stdout] 27 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:58:1
[INFO] [stdout]    |
[INFO] [stdout] 58 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:73:1
[INFO] [stdout]    |
[INFO] [stdout] 73 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/bios.rs:91:1
[INFO] [stdout]    |
[INFO] [stdout] 91 | #[instruction_set(arm::t32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:113:1
[INFO] [stdout]     |
[INFO] [stdout] 113 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:173:1
[INFO] [stdout]     |
[INFO] [stdout] 173 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:208:1
[INFO] [stdout]     |
[INFO] [stdout] 208 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:227:1
[INFO] [stdout]     |
[INFO] [stdout] 227 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:264:1
[INFO] [stdout]     |
[INFO] [stdout] 264 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:290:1
[INFO] [stdout]     |
[INFO] [stdout] 290 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:309:1
[INFO] [stdout]     |
[INFO] [stdout] 309 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:173:1
[INFO] [stdout]     |
[INFO] [stdout] 173 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:208:1
[INFO] [stdout]     |
[INFO] [stdout] 208 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:227:1
[INFO] [stdout]     |
[INFO] [stdout] 227 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:264:1
[INFO] [stdout]     |
[INFO] [stdout] 264 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:290:1
[INFO] [stdout]     |
[INFO] [stdout] 290 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/bios.rs:309:1
[INFO] [stdout]     |
[INFO] [stdout] 309 | #[instruction_set(arm::t32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/mem_fns.rs:14:1
[INFO] [stdout]    |
[INFO] [stdout] 14 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/mem_fns.rs:39:1
[INFO] [stdout]    |
[INFO] [stdout] 39 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/mem_fns.rs:70:1
[INFO] [stdout]    |
[INFO] [stdout] 70 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:122:1
[INFO] [stdout]     |
[INFO] [stdout] 122 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:137:1
[INFO] [stdout]     |
[INFO] [stdout] 137 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:187:1
[INFO] [stdout]     |
[INFO] [stdout] 187 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:206:1
[INFO] [stdout]     |
[INFO] [stdout] 206 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:227:1
[INFO] [stdout]     |
[INFO] [stdout] 227 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:253:1
[INFO] [stdout]     |
[INFO] [stdout] 253 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/mem_fns.rs:14:1
[INFO] [stdout]    |
[INFO] [stdout] 14 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:304:1
[INFO] [stdout]     |
[INFO] [stdout] 304 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/mem_fns.rs:39:1
[INFO] [stdout]    |
[INFO] [stdout] 39 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:318:1
[INFO] [stdout]     |
[INFO] [stdout] 318 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:332:1
[INFO] [stdout]     |
[INFO] [stdout] 332 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:386:1
[INFO] [stdout]     |
[INFO] [stdout] 386 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:409:1
[INFO] [stdout]     |
[INFO] [stdout] 409 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:423:1
[INFO] [stdout]     |
[INFO] [stdout] 423 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:437:1
[INFO] [stdout]     |
[INFO] [stdout] 437 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]   --> src/mem_fns.rs:70:1
[INFO] [stdout]    |
[INFO] [stdout] 70 | #[instruction_set(arm::a32)]
[INFO] [stdout]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:511:1
[INFO] [stdout]     |
[INFO] [stdout] 511 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:122:1
[INFO] [stdout]     |
[INFO] [stdout] 122 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:537:1
[INFO] [stdout]     |
[INFO] [stdout] 537 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:137:1
[INFO] [stdout]     |
[INFO] [stdout] 137 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:549:1
[INFO] [stdout]     |
[INFO] [stdout] 549 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:187:1
[INFO] [stdout]     |
[INFO] [stdout] 187 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:561:1
[INFO] [stdout]     |
[INFO] [stdout] 561 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:574:1
[INFO] [stdout]     |
[INFO] [stdout] 574 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:206:1
[INFO] [stdout]     |
[INFO] [stdout] 206 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:598:1
[INFO] [stdout]     |
[INFO] [stdout] 598 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:227:1
[INFO] [stdout]     |
[INFO] [stdout] 227 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:621:1
[INFO] [stdout]     |
[INFO] [stdout] 621 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:253:1
[INFO] [stdout]     |
[INFO] [stdout] 253 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:645:1
[INFO] [stdout]     |
[INFO] [stdout] 645 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:304:1
[INFO] [stdout]     |
[INFO] [stdout] 304 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:318:1
[INFO] [stdout]     |
[INFO] [stdout] 318 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:332:1
[INFO] [stdout]     |
[INFO] [stdout] 332 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:386:1
[INFO] [stdout]     |
[INFO] [stdout] 386 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:409:1
[INFO] [stdout]     |
[INFO] [stdout] 409 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:423:1
[INFO] [stdout]     |
[INFO] [stdout] 423 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:437:1
[INFO] [stdout]     |
[INFO] [stdout] 437 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:511:1
[INFO] [stdout]     |
[INFO] [stdout] 511 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:537:1
[INFO] [stdout]     |
[INFO] [stdout] 537 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:549:1
[INFO] [stdout]     |
[INFO] [stdout] 549 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:561:1
[INFO] [stdout]     |
[INFO] [stdout] 561 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:574:1
[INFO] [stdout]     |
[INFO] [stdout] 574 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:598:1
[INFO] [stdout]     |
[INFO] [stdout] 598 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:621:1
[INFO] [stdout]     |
[INFO] [stdout] 621 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error[E0779]: target does not support `#[instruction_set]`
[INFO] [stdout]    --> src/mem_fns.rs:645:1
[INFO] [stdout]     |
[INFO] [stdout] 645 | #[instruction_set(arm::a32)]
[INFO] [stdout]     | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:104:16
[INFO] [stdout]     |
[INFO] [stdout] 104 |           "ldr {r}, [{addr}]",
[INFO] [stdout]     |                ^^^
[INFO] [stdout] 105 |           r = lateout(reg) val,
[INFO] [stdout]     |                            --- for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout]     = note: `#[warn(asm_sub_register)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:114:17
[INFO] [stdout]     |
[INFO] [stdout] 114 |           "ldrh {r}, [{addr}]",
[INFO] [stdout]     |                 ^^^
[INFO] [stdout] 115 |           r = lateout(reg) val,
[INFO] [stdout]     |                            --- for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:x}` to have the register formatted as `ax` (for 16-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: type `u8` cannot be used with this register class
[INFO] [stdout]    --> src/gba_cell.rs:125:28
[INFO] [stdout]     |
[INFO] [stdout] 125 |           r = lateout(reg) val,
[INFO] [stdout]     |                            ^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: register class `reg` supports these types: i16, i32, i64, f32, f64
[INFO] [stdout]     = help: consider using the `reg_byte` register class instead
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:144:16
[INFO] [stdout]     |
[INFO] [stdout] 144 |           "str {val}, [{addr}]",
[INFO] [stdout]     |                ^^^^^
[INFO] [stdout] 145 |           val = in(reg) u,
[INFO] [stdout]     |                         - for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:104:16
[INFO] [stdout]     |
[INFO] [stdout] 104 |           "ldr {r}, [{addr}]",
[INFO] [stdout]     |                ^^^
[INFO] [stdout] 105 |           r = lateout(reg) val,
[INFO] [stdout]     |                            --- for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout]     = note: `#[warn(asm_sub_register)]` on by default
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:114:17
[INFO] [stdout]     |
[INFO] [stdout] 114 |           "ldrh {r}, [{addr}]",
[INFO] [stdout]     |                 ^^^
[INFO] [stdout] 115 |           r = lateout(reg) val,
[INFO] [stdout]     |                            --- for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:x}` to have the register formatted as `ax` (for 16-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:153:17
[INFO] [stdout]     |
[INFO] [stdout] 153 |           "strh {val}, [{addr}]",
[INFO] [stdout]     |                 ^^^^^
[INFO] [stdout] 154 |           val = in(reg) u,
[INFO] [stdout]     |                         - for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:x}` to have the register formatted as `ax` (for 16-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: type `u8` cannot be used with this register class
[INFO] [stdout]    --> src/gba_cell.rs:125:28
[INFO] [stdout]     |
[INFO] [stdout] 125 |           r = lateout(reg) val,
[INFO] [stdout]     |                            ^^^
[INFO] [stdout]     |
[INFO] [stdout]     = note: register class `reg` supports these types: i16, i32, i64, f32, f64
[INFO] [stdout]     = help: consider using the `reg_byte` register class instead
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: type `u8` cannot be used with this register class
[INFO] [stdout]    --> src/gba_cell.rs:163:25
[INFO] [stdout]     |
[INFO] [stdout] 163 |           val = in(reg) u,
[INFO] [stdout]     |                         ^
[INFO] [stdout]     |
[INFO] [stdout]     = note: register class `reg` supports these types: i16, i32, i64, f32, f64
[INFO] [stdout]     = help: consider using the `reg_byte` register class instead
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:144:16
[INFO] [stdout]     |
[INFO] [stdout] 144 |           "str {val}, [{addr}]",
[INFO] [stdout]     |                ^^^^^
[INFO] [stdout] 145 |           val = in(reg) u,
[INFO] [stdout]     |                         - for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:e}` to have the register formatted as `eax` (for 32-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] warning: formatting may not be suitable for sub-register argument
[INFO] [stdout]    --> src/gba_cell.rs:153:17
[INFO] [stdout]     |
[INFO] [stdout] 153 |           "strh {val}, [{addr}]",
[INFO] [stdout]     |                 ^^^^^
[INFO] [stdout] 154 |           val = in(reg) u,
[INFO] [stdout]     |                         - for this argument
[INFO] [stdout]     |
[INFO] [stdout]     = help: use `{0:x}` to have the register formatted as `ax` (for 16-bit values)
[INFO] [stdout]     = help: or use `{0:r}` to keep the default formatting of `rax` (for 64-bit values)
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: type `u8` cannot be used with this register class
[INFO] [stdout]    --> src/gba_cell.rs:163:25
[INFO] [stdout]     |
[INFO] [stdout] 163 |           val = in(reg) u,
[INFO] [stdout]     |                         ^
[INFO] [stdout]     |
[INFO] [stdout]     = note: register class `reg` supports these types: i16, i32, i64, f32, f64
[INFO] [stdout]     = help: consider using the `reg_byte` register class instead
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] error: aborting due to 79 previous errors; 4 warnings emitted
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] For more information about this error, try `rustc --explain E0779`.
[INFO] [stdout] 
[INFO] [stdout] error: aborting due to 79 previous errors; 4 warnings emitted
[INFO] [stdout] 
[INFO] [stdout] 
[INFO] [stdout] For more information about this error, try `rustc --explain E0779`.
[INFO] [stdout] 
[INFO] [stderr] error: could not compile `gba` (lib) due to 80 previous errors; 4 warnings emitted
[INFO] [stderr] warning: build failed, waiting for other jobs to finish...
[INFO] [stderr] error: could not compile `gba` (lib test) due to 80 previous errors; 4 warnings emitted
[INFO] running `Command { std: "docker" "inspect" "9b991c947dff81b88174e7c3c3620836996eda0e873bf809f1be2005bc56cae1", kill_on_drop: false }`
[INFO] running `Command { std: "docker" "rm" "-f" "9b991c947dff81b88174e7c3c3620836996eda0e873bf809f1be2005bc56cae1", kill_on_drop: false }`
[INFO] [stdout] 9b991c947dff81b88174e7c3c3620836996eda0e873bf809f1be2005bc56cae1
