[INFO] cloning repository https://github.com/iasakura/Geometry-of-synthesis [INFO] running `Command { std: "git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "clone" "--bare" "https://github.com/iasakura/Geometry-of-synthesis" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fiasakura%2FGeometry-of-synthesis", kill_on_drop: false }` [INFO] [stderr] Cloning into bare repository '/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fiasakura%2FGeometry-of-synthesis'... [INFO] running `Command { std: "git" "rev-parse" "HEAD", kill_on_drop: false }` [INFO] [stdout] c4ff53ed2f22b76031aa142379b754c864670f4a [INFO] testing iasakura/Geometry-of-synthesis against beta-2022-04-10 for beta-1.61-1 [INFO] running `Command { std: "git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Fiasakura%2FGeometry-of-synthesis" "/workspace/builds/worker-21/source", kill_on_drop: false }` [INFO] [stderr] Cloning into '/workspace/builds/worker-21/source'... [INFO] [stderr] done. [INFO] validating manifest of git repo https://github.com/iasakura/Geometry-of-synthesis on toolchain beta-2022-04-10 [INFO] running `Command { std: "/workspace/cargo-home/bin/cargo" "+beta-2022-04-10" "metadata" "--manifest-path" "Cargo.toml" "--no-deps", kill_on_drop: false }` [INFO] started tweaking git repo https://github.com/iasakura/Geometry-of-synthesis [INFO] finished tweaking git repo https://github.com/iasakura/Geometry-of-synthesis [INFO] tweaked toml for git repo https://github.com/iasakura/Geometry-of-synthesis written to /workspace/builds/worker-21/source/Cargo.toml [INFO] crate git repo https://github.com/iasakura/Geometry-of-synthesis already has a lockfile, it will not be regenerated [INFO] running `Command { std: "/workspace/cargo-home/bin/cargo" "+beta-2022-04-10" "fetch" "--manifest-path" "Cargo.toml", kill_on_drop: false }` [INFO] [stderr] Blocking waiting for file lock on package cache [INFO] [stderr] Blocking waiting for file lock on package cache [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:b0c94ce3c1162fcb8e57cac5b65ec2f72eabb1eebea4fcc35e269e823f681646" "/opt/rustwide/cargo-home/bin/cargo" "+beta-2022-04-10" "metadata" "--no-deps" "--format-version=1", kill_on_drop: false }` [INFO] [stdout] e9c7be9a4861dae38cc0d791d27395bda758a2ee37b090804db5528444887dd6 [INFO] running `Command { std: "docker" "start" "-a" "e9c7be9a4861dae38cc0d791d27395bda758a2ee37b090804db5528444887dd6", kill_on_drop: false }` [INFO] running `Command { std: "docker" "inspect" "e9c7be9a4861dae38cc0d791d27395bda758a2ee37b090804db5528444887dd6", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "e9c7be9a4861dae38cc0d791d27395bda758a2ee37b090804db5528444887dd6", kill_on_drop: false }` [INFO] [stdout] e9c7be9a4861dae38cc0d791d27395bda758a2ee37b090804db5528444887dd6 [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:b0c94ce3c1162fcb8e57cac5b65ec2f72eabb1eebea4fcc35e269e823f681646" "/opt/rustwide/cargo-home/bin/cargo" "+beta-2022-04-10" "build" "--frozen" "--message-format=json", kill_on_drop: false }` [INFO] [stdout] 2c213b5bfa965d6908f9c54134609ab490098f0d62a4fb41ef24d486e7ef3a3c [INFO] running `Command { std: "docker" "start" "-a" "2c213b5bfa965d6908f9c54134609ab490098f0d62a4fb41ef24d486e7ef3a3c", kill_on_drop: false }` [INFO] [stderr] Blocking waiting for file lock on package cache [INFO] [stderr] Compiling proc-macro2 v1.0.30 [INFO] [stderr] Compiling syn v1.0.80 [INFO] [stderr] Compiling unindent v0.1.7 [INFO] [stderr] Compiling hashbrown v0.11.2 [INFO] [stderr] Compiling indexmap v1.7.0 [INFO] [stderr] Compiling indoc v1.0.3 [INFO] [stderr] Compiling quote v1.0.10 [INFO] [stderr] Compiling derive-new v0.5.9 [INFO] [stderr] Compiling gos v0.1.0 (/opt/rustwide/workdir) [INFO] [stdout] warning: unused import: `super::*` [INFO] [stdout] --> src/verilog_ir.rs:237:9 [INFO] [stdout] | [INFO] [stdout] 237 | use super::*; [INFO] [stdout] | ^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(unused_imports)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `Input` [INFO] [stdout] --> src/verilog_ir.rs:8:5 [INFO] [stdout] | [INFO] [stdout] 8 | Input, [INFO] [stdout] | ^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(dead_code)]` on by default [INFO] [stdout] note: `Polarity` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:6:10 [INFO] [stdout] | [INFO] [stdout] 6 | #[derive(Clone, PartialEq)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `Output` [INFO] [stdout] --> src/verilog_ir.rs:9:5 [INFO] [stdout] | [INFO] [stdout] 9 | Output, [INFO] [stdout] | ^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `Polarity` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:6:10 [INFO] [stdout] | [INFO] [stdout] 6 | #[derive(Clone, PartialEq)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `polarity` [INFO] [stdout] --> src/verilog_ir.rs:14:5 [INFO] [stdout] | [INFO] [stdout] 14 | polarity: Polarity, [INFO] [stdout] | ^^^^^^^^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VPort` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:12:15 [INFO] [stdout] | [INFO] [stdout] 12 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `bits` [INFO] [stdout] --> src/verilog_ir.rs:15:5 [INFO] [stdout] | [INFO] [stdout] 15 | bits: usize, [INFO] [stdout] | ^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VPort` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:12:15 [INFO] [stdout] | [INFO] [stdout] 12 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `src` [INFO] [stdout] --> src/verilog_ir.rs:27:5 [INFO] [stdout] | [INFO] [stdout] 27 | src: VPortLoc, [INFO] [stdout] | ^^^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:25:15 [INFO] [stdout] | [INFO] [stdout] 25 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `dst` [INFO] [stdout] --> src/verilog_ir.rs:28:5 [INFO] [stdout] | [INFO] [stdout] 28 | dst: VPortLoc, [INFO] [stdout] | ^^^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:25:15 [INFO] [stdout] | [INFO] [stdout] 25 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `bits` [INFO] [stdout] --> src/verilog_ir.rs:29:5 [INFO] [stdout] | [INFO] [stdout] 29 | bits: usize, [INFO] [stdout] | ^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:25:15 [INFO] [stdout] | [INFO] [stdout] 25 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `External` [INFO] [stdout] --> src/verilog_ir.rs:34:5 [INFO] [stdout] | [INFO] [stdout] 34 | / External { [INFO] [stdout] 35 | | name: String, [INFO] [stdout] 36 | | // bitwidth (TODO: support more generic parameters) [INFO] [stdout] 37 | | param: usize, [INFO] [stdout] 38 | | interfaces: IndexMap, [INFO] [stdout] 39 | | }, [INFO] [stdout] | |_____^ [INFO] [stdout] | [INFO] [stdout] note: `VModule` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:32:10 [INFO] [stdout] | [INFO] [stdout] 32 | #[derive(Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `Internal` [INFO] [stdout] --> src/verilog_ir.rs:40:5 [INFO] [stdout] | [INFO] [stdout] 40 | / Internal { [INFO] [stdout] 41 | | name: String, [INFO] [stdout] 42 | | interfaces: IndexMap, [INFO] [stdout] 43 | | internals: IndexMap, [INFO] [stdout] 44 | | connections: Vec, [INFO] [stdout] 45 | | }, [INFO] [stdout] | |_____^ [INFO] [stdout] | [INFO] [stdout] note: `VModule` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:32:10 [INFO] [stdout] | [INFO] [stdout] 32 | #[derive(Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: associated function is never used: `get_name` [INFO] [stdout] --> src/verilog_ir.rs:49:8 [INFO] [stdout] | [INFO] [stdout] 49 | fn get_name(&self) -> &str { [INFO] [stdout] | ^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: associated function is never used: `get_interfaces` [INFO] [stdout] --> src/verilog_ir.rs:56:8 [INFO] [stdout] | [INFO] [stdout] 56 | fn get_interfaces(&self) -> &IndexMap { [INFO] [stdout] | ^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: function is never used: `generate_wire_name` [INFO] [stdout] --> src/verilog_ir.rs:64:4 [INFO] [stdout] | [INFO] [stdout] 64 | fn generate_wire_name(input: &VPortLoc, output: &VPortLoc) -> String { [INFO] [stdout] | ^^^^^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: function is never used: `generate_module_decl` [INFO] [stdout] --> src/verilog_ir.rs:83:8 [INFO] [stdout] | [INFO] [stdout] 83 | pub fn generate_module_decl(vmod: &VModule, defs: &mut T) { [INFO] [stdout] | ^^^^^^^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: function is never used: `s` [INFO] [stdout] --> src/verilog_ir.rs:239:8 [INFO] [stdout] | [INFO] [stdout] 239 | fn s(s: T) -> String { [INFO] [stdout] | ^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: 15 warnings emitted [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] Finished dev [unoptimized + debuginfo] target(s) in 20.63s [INFO] running `Command { std: "docker" "inspect" "2c213b5bfa965d6908f9c54134609ab490098f0d62a4fb41ef24d486e7ef3a3c", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "2c213b5bfa965d6908f9c54134609ab490098f0d62a4fb41ef24d486e7ef3a3c", kill_on_drop: false }` [INFO] [stdout] 2c213b5bfa965d6908f9c54134609ab490098f0d62a4fb41ef24d486e7ef3a3c [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:b0c94ce3c1162fcb8e57cac5b65ec2f72eabb1eebea4fcc35e269e823f681646" "/opt/rustwide/cargo-home/bin/cargo" "+beta-2022-04-10" "test" "--frozen" "--no-run" "--message-format=json", kill_on_drop: false }` [INFO] [stdout] 132ff4bfd89b016aec0ad54a7fbc275a48383ce9d5a7867a9c6c6b6e7048d646 [INFO] running `Command { std: "docker" "start" "-a" "132ff4bfd89b016aec0ad54a7fbc275a48383ce9d5a7867a9c6c6b6e7048d646", kill_on_drop: false }` [INFO] [stderr] Blocking waiting for file lock on package cache [INFO] [stderr] Compiling gos v0.1.0 (/opt/rustwide/workdir) [INFO] [stdout] warning: unused import: `super::*` [INFO] [stdout] --> src/verilog_ir.rs:237:9 [INFO] [stdout] | [INFO] [stdout] 237 | use super::*; [INFO] [stdout] | ^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(unused_imports)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `Input` [INFO] [stdout] --> src/verilog_ir.rs:8:5 [INFO] [stdout] | [INFO] [stdout] 8 | Input, [INFO] [stdout] | ^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(dead_code)]` on by default [INFO] [stdout] note: `Polarity` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:6:10 [INFO] [stdout] | [INFO] [stdout] 6 | #[derive(Clone, PartialEq)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `Output` [INFO] [stdout] --> src/verilog_ir.rs:9:5 [INFO] [stdout] | [INFO] [stdout] 9 | Output, [INFO] [stdout] | ^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `Polarity` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:6:10 [INFO] [stdout] | [INFO] [stdout] 6 | #[derive(Clone, PartialEq)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `polarity` [INFO] [stdout] --> src/verilog_ir.rs:14:5 [INFO] [stdout] | [INFO] [stdout] 14 | polarity: Polarity, [INFO] [stdout] | ^^^^^^^^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VPort` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:12:15 [INFO] [stdout] | [INFO] [stdout] 12 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `bits` [INFO] [stdout] --> src/verilog_ir.rs:15:5 [INFO] [stdout] | [INFO] [stdout] 15 | bits: usize, [INFO] [stdout] | ^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VPort` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:12:15 [INFO] [stdout] | [INFO] [stdout] 12 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `src` [INFO] [stdout] --> src/verilog_ir.rs:27:5 [INFO] [stdout] | [INFO] [stdout] 27 | src: VPortLoc, [INFO] [stdout] | ^^^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:25:15 [INFO] [stdout] | [INFO] [stdout] 25 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `dst` [INFO] [stdout] --> src/verilog_ir.rs:28:5 [INFO] [stdout] | [INFO] [stdout] 28 | dst: VPortLoc, [INFO] [stdout] | ^^^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:25:15 [INFO] [stdout] | [INFO] [stdout] 25 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: field is never read: `bits` [INFO] [stdout] --> src/verilog_ir.rs:29:5 [INFO] [stdout] | [INFO] [stdout] 29 | bits: usize, [INFO] [stdout] | ^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:25:15 [INFO] [stdout] | [INFO] [stdout] 25 | #[derive(new, Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `External` [INFO] [stdout] --> src/verilog_ir.rs:34:5 [INFO] [stdout] | [INFO] [stdout] 34 | / External { [INFO] [stdout] 35 | | name: String, [INFO] [stdout] 36 | | // bitwidth (TODO: support more generic parameters) [INFO] [stdout] 37 | | param: usize, [INFO] [stdout] 38 | | interfaces: IndexMap, [INFO] [stdout] 39 | | }, [INFO] [stdout] | |_____^ [INFO] [stdout] | [INFO] [stdout] note: `VModule` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:32:10 [INFO] [stdout] | [INFO] [stdout] 32 | #[derive(Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: variant is never constructed: `Internal` [INFO] [stdout] --> src/verilog_ir.rs:40:5 [INFO] [stdout] | [INFO] [stdout] 40 | / Internal { [INFO] [stdout] 41 | | name: String, [INFO] [stdout] 42 | | interfaces: IndexMap, [INFO] [stdout] 43 | | internals: IndexMap, [INFO] [stdout] 44 | | connections: Vec, [INFO] [stdout] 45 | | }, [INFO] [stdout] | |_____^ [INFO] [stdout] | [INFO] [stdout] note: `VModule` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stdout] --> src/verilog_ir.rs:32:10 [INFO] [stdout] | [INFO] [stdout] 32 | #[derive(Clone)] [INFO] [stdout] | ^^^^^ [INFO] [stdout] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: associated function is never used: `get_name` [INFO] [stdout] --> src/verilog_ir.rs:49:8 [INFO] [stdout] | [INFO] [stdout] 49 | fn get_name(&self) -> &str { [INFO] [stdout] | ^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: associated function is never used: `get_interfaces` [INFO] [stdout] --> src/verilog_ir.rs:56:8 [INFO] [stdout] | [INFO] [stdout] 56 | fn get_interfaces(&self) -> &IndexMap { [INFO] [stdout] | ^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: function is never used: `generate_wire_name` [INFO] [stdout] --> src/verilog_ir.rs:64:4 [INFO] [stdout] | [INFO] [stdout] 64 | fn generate_wire_name(input: &VPortLoc, output: &VPortLoc) -> String { [INFO] [stdout] | ^^^^^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: function is never used: `generate_module_decl` [INFO] [stdout] --> src/verilog_ir.rs:83:8 [INFO] [stdout] | [INFO] [stdout] 83 | pub fn generate_module_decl(vmod: &VModule, defs: &mut T) { [INFO] [stdout] | ^^^^^^^^^^^^^^^^^^^^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: function is never used: `s` [INFO] [stdout] --> src/verilog_ir.rs:239:8 [INFO] [stdout] | [INFO] [stdout] 239 | fn s(s: T) -> String { [INFO] [stdout] | ^ [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: 15 warnings emitted [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: function is never used: `generate_wire_name` [INFO] [stdout] --> src/verilog_ir.rs:64:4 [INFO] [stdout] | [INFO] [stdout] 64 | fn generate_wire_name(input: &VPortLoc, output: &VPortLoc) -> String { [INFO] [stdout] | ^^^^^^^^^^^^^^^^^^ [INFO] [stdout] | [INFO] [stdout] = note: `#[warn(dead_code)]` on by default [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] warning: 1 warning emitted [INFO] [stdout] [INFO] [stdout] [INFO] [stderr] Finished test [unoptimized + debuginfo] target(s) in 2.73s [INFO] [stderr] Executable unittests src/lib.rs (/opt/rustwide/target/debug/deps/gos-12fa3056b19cfacc) [INFO] [stderr] Executable unittests src/main.rs (/opt/rustwide/target/debug/deps/gos-3a0a6e9ad509e00d) [INFO] running `Command { std: "docker" "inspect" "132ff4bfd89b016aec0ad54a7fbc275a48383ce9d5a7867a9c6c6b6e7048d646", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "132ff4bfd89b016aec0ad54a7fbc275a48383ce9d5a7867a9c6c6b6e7048d646", kill_on_drop: false }` [INFO] [stdout] 132ff4bfd89b016aec0ad54a7fbc275a48383ce9d5a7867a9c6c6b6e7048d646 [INFO] running `Command { std: "docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-21/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--user" "0:0" "--network" "none" "ghcr.io/rust-lang/crates-build-env/linux@sha256:b0c94ce3c1162fcb8e57cac5b65ec2f72eabb1eebea4fcc35e269e823f681646" "/opt/rustwide/cargo-home/bin/cargo" "+beta-2022-04-10" "test" "--frozen", kill_on_drop: false }` [INFO] [stdout] 33e45cd761931812e97c6aa1b08845fb5685c4285cfefa9ef6a06f66a0fc20bf [INFO] running `Command { std: "docker" "start" "-a" "33e45cd761931812e97c6aa1b08845fb5685c4285cfefa9ef6a06f66a0fc20bf", kill_on_drop: false }` [INFO] [stderr] warning: unused import: `super::*` [INFO] [stderr] --> src/verilog_ir.rs:237:9 [INFO] [stderr] | [INFO] [stderr] 237 | use super::*; [INFO] [stderr] | ^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_imports)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Input` [INFO] [stderr] --> src/verilog_ir.rs:8:5 [INFO] [stderr] | [INFO] [stderr] 8 | Input, [INFO] [stderr] | ^^^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(dead_code)]` on by default [INFO] [stderr] note: `Polarity` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:6:10 [INFO] [stderr] | [INFO] [stderr] 6 | #[derive(Clone, PartialEq)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Output` [INFO] [stderr] --> src/verilog_ir.rs:9:5 [INFO] [stderr] | [INFO] [stderr] 9 | Output, [INFO] [stderr] | ^^^^^^ [INFO] [stderr] | [INFO] [stderr] note: `Polarity` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:6:10 [INFO] [stderr] | [INFO] [stderr] 6 | #[derive(Clone, PartialEq)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: field is never read: `polarity` [INFO] [stderr] --> src/verilog_ir.rs:14:5 [INFO] [stderr] | [INFO] [stderr] 14 | polarity: Polarity, [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] note: `VPort` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:12:15 [INFO] [stderr] | [INFO] [stderr] 12 | #[derive(new, Clone)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: field is never read: `bits` [INFO] [stderr] --> src/verilog_ir.rs:15:5 [INFO] [stderr] | [INFO] [stderr] 15 | bits: usize, [INFO] [stderr] | ^^^^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] note: `VPort` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:12:15 [INFO] [stderr] | [INFO] [stderr] 12 | #[derive(new, Clone)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: field is never read: `src` [INFO] [stderr] --> src/verilog_ir.rs:27:5 [INFO] [stderr] | [INFO] [stderr] 27 | src: VPortLoc, [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:25:15 [INFO] [stderr] | [INFO] [stderr] 25 | #[derive(new, Clone)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: field is never read: `dst` [INFO] [stderr] --> src/verilog_ir.rs:28:5 [INFO] [stderr] | [INFO] [stderr] 28 | dst: VPortLoc, [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:25:15 [INFO] [stderr] | [INFO] [stderr] 25 | #[derive(new, Clone)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: field is never read: `bits` [INFO] [stderr] --> src/verilog_ir.rs:29:5 [INFO] [stderr] | [INFO] [stderr] 29 | bits: usize, [INFO] [stderr] | ^^^^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] note: `VConn` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:25:15 [INFO] [stderr] | [INFO] [stderr] 25 | #[derive(new, Clone)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `External` [INFO] [stderr] --> src/verilog_ir.rs:34:5 [INFO] [stderr] | [INFO] [stderr] 34 | / External { [INFO] [stderr] 35 | | name: String, [INFO] [stderr] 36 | | // bitwidth (TODO: support more generic parameters) [INFO] [stderr] 37 | | param: usize, [INFO] [stderr] 38 | | interfaces: IndexMap, [INFO] [stderr] 39 | | }, [INFO] [stderr] | |_____^ [INFO] [stderr] | [INFO] [stderr] note: `VModule` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:32:10 [INFO] [stderr] | [INFO] [stderr] 32 | #[derive(Clone)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Internal` [INFO] [stderr] --> src/verilog_ir.rs:40:5 [INFO] [stderr] | [INFO] [stderr] 40 | / Internal { [INFO] [stderr] 41 | | name: String, [INFO] [stderr] 42 | | interfaces: IndexMap, [INFO] [stderr] 43 | | internals: IndexMap, [INFO] [stderr] 44 | | connections: Vec, [INFO] [stderr] 45 | | }, [INFO] [stderr] | |_____^ [INFO] [stderr] | [INFO] [stderr] note: `VModule` has a derived impl for the trait `Clone`, but this is intentionally ignored during dead code analysis [INFO] [stderr] --> src/verilog_ir.rs:32:10 [INFO] [stderr] | [INFO] [stderr] 32 | #[derive(Clone)] [INFO] [stderr] | ^^^^^ [INFO] [stderr] = note: this warning originates in the derive macro `Clone` (in Nightly builds, run with -Z macro-backtrace for more info) [INFO] [stderr] [INFO] [stderr] warning: associated function is never used: `get_name` [INFO] [stderr] --> src/verilog_ir.rs:49:8 [INFO] [stderr] | [INFO] [stderr] 49 | fn get_name(&self) -> &str { [INFO] [stderr] | ^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: associated function is never used: `get_interfaces` [INFO] [stderr] --> src/verilog_ir.rs:56:8 [INFO] [stderr] | [INFO] [stderr] 56 | fn get_interfaces(&self) -> &IndexMap { [INFO] [stderr] | ^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `generate_wire_name` [INFO] [stderr] --> src/verilog_ir.rs:64:4 [INFO] [stderr] | [INFO] [stderr] 64 | fn generate_wire_name(input: &VPortLoc, output: &VPortLoc) -> String { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `generate_module_decl` [INFO] [stderr] --> src/verilog_ir.rs:83:8 [INFO] [stderr] | [INFO] [stderr] 83 | pub fn generate_module_decl(vmod: &VModule, defs: &mut T) { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `s` [INFO] [stderr] --> src/verilog_ir.rs:239:8 [INFO] [stderr] | [INFO] [stderr] 239 | fn s(s: T) -> String { [INFO] [stderr] | ^ [INFO] [stderr] [INFO] [stderr] warning: function is never used: `generate_wire_name` [INFO] [stderr] --> src/verilog_ir.rs:64:4 [INFO] [stderr] | [INFO] [stderr] 64 | fn generate_wire_name(input: &VPortLoc, output: &VPortLoc) -> String { [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(dead_code)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `gos` (lib) generated 15 warnings [INFO] [stderr] warning: `gos` (lib test) generated 1 warning [INFO] [stderr] Finished test [unoptimized + debuginfo] target(s) in 0.05s [INFO] [stderr] Running unittests src/lib.rs (/opt/rustwide/target/debug/deps/gos-12fa3056b19cfacc) [INFO] [stdout] [INFO] [stdout] running 1 test [INFO] [stdout] test verilog_ir::test_verilog_ir::test_seq ... ok [INFO] [stdout] [INFO] [stdout] test result: ok. 1 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.00s [INFO] [stdout] [INFO] [stderr] Running unittests src/main.rs (/opt/rustwide/target/debug/deps/gos-3a0a6e9ad509e00d) [INFO] [stdout] [INFO] [stderr] Doc-tests gos [INFO] [stdout] running 0 tests [INFO] [stdout] [INFO] [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.00s [INFO] [stdout] [INFO] [stdout] [INFO] [stdout] running 0 tests [INFO] [stdout] [INFO] [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.00s [INFO] [stdout] [INFO] running `Command { std: "docker" "inspect" "33e45cd761931812e97c6aa1b08845fb5685c4285cfefa9ef6a06f66a0fc20bf", kill_on_drop: false }` [INFO] running `Command { std: "docker" "rm" "-f" "33e45cd761931812e97c6aa1b08845fb5685c4285cfefa9ef6a06f66a0fc20bf", kill_on_drop: false }` [INFO] [stdout] 33e45cd761931812e97c6aa1b08845fb5685c4285cfefa9ef6a06f66a0fc20bf