[INFO] updating cached repository https://github.com/rkanati/sleeper [INFO] running `"git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "-c" "remote.origin.fetch=refs/heads/*:refs/heads/*" "fetch" "origin" "--force" "--prune"` [INFO] running `"git" "rev-parse" "HEAD"` [INFO] [stdout] 88d309c7c4d69b661b082b47e2d5ab8d1c9a8407 [INFO] testing rkanati/sleeper against beta-2020-06-03 for beta-1.45-1 [INFO] running `"git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2Frkanati%2Fsleeper" "/workspace/builds/worker-1/source"` [INFO] [stderr] Cloning into '/workspace/builds/worker-1/source'... [INFO] [stderr] done. [INFO] validating manifest of git repo https://github.com/rkanati/sleeper on toolchain beta-2020-06-03 [INFO] running `"/workspace/cargo-home/bin/cargo" "+beta-2020-06-03" "read-manifest" "--manifest-path" "Cargo.toml"` [INFO] started tweaking git repo https://github.com/rkanati/sleeper [INFO] finished tweaking git repo https://github.com/rkanati/sleeper [INFO] tweaked toml for git repo https://github.com/rkanati/sleeper written to /workspace/builds/worker-1/source/Cargo.toml [INFO] crate git repo https://github.com/rkanati/sleeper already has a lockfile, it will not be regenerated [INFO] running `"/workspace/cargo-home/bin/cargo" "+beta-2020-06-03" "fetch" "--locked" "--manifest-path" "Cargo.toml"` [INFO] running `"docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=0" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+beta-2020-06-03" "build" "--frozen"` [INFO] [stderr] WARNING: Your kernel does not support swap limit capabilities or the cgroup is not mounted. Memory limited without swap. [INFO] [stdout] e155299ce9492c4799dce5613ca166e6513162e0dba7e68b6348672513c8a3d4 [INFO] running `"docker" "start" "-a" "e155299ce9492c4799dce5613ca166e6513162e0dba7e68b6348672513c8a3d4"` [INFO] [stderr] sudo: setrlimit(RLIMIT_CORE): Operation not permitted [INFO] [stderr] Compiling sleeper v0.1.0 (/opt/rustwide/workdir) [INFO] [stderr] warning: unnecessary parentheses around assigned value [INFO] [stderr] --> src/assembler.rs:38:21 [INFO] [stderr] | [INFO] [stderr] 38 | let value = (abs - pc as i32); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_parens)]` on by default [INFO] [stderr] [INFO] [stderr] warning: unused import: `str` [INFO] [stderr] --> src/main.rs:12:9 [INFO] [stderr] | [INFO] [stderr] 12 | str, [INFO] [stderr] | ^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_imports)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `NOp` [INFO] [stderr] --> src/assembler.rs:73:5 [INFO] [stderr] | [INFO] [stderr] 73 | NOp, [INFO] [stderr] | ^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(dead_code)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `LdW` [INFO] [stderr] --> src/assembler.rs:76:5 [INFO] [stderr] | [INFO] [stderr] 76 | LdW(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `StW` [INFO] [stderr] --> src/assembler.rs:78:5 [INFO] [stderr] | [INFO] [stderr] 78 | StW(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Add` [INFO] [stderr] --> src/assembler.rs:81:5 [INFO] [stderr] | [INFO] [stderr] 81 | Add(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Sub` [INFO] [stderr] --> src/assembler.rs:82:5 [INFO] [stderr] | [INFO] [stderr] 82 | Sub(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `And` [INFO] [stderr] --> src/assembler.rs:83:5 [INFO] [stderr] | [INFO] [stderr] 83 | And(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Or` [INFO] [stderr] --> src/assembler.rs:84:6 [INFO] [stderr] | [INFO] [stderr] 84 | Or(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `XOr` [INFO] [stderr] --> src/assembler.rs:85:5 [INFO] [stderr] | [INFO] [stderr] 85 | XOr(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Not` [INFO] [stderr] --> src/assembler.rs:86:5 [INFO] [stderr] | [INFO] [stderr] 86 | Not(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Dec` [INFO] [stderr] --> src/assembler.rs:88:5 [INFO] [stderr] | [INFO] [stderr] 88 | Dec(Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SL` [INFO] [stderr] --> src/assembler.rs:89:6 [INFO] [stderr] | [INFO] [stderr] 89 | SL(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SR` [INFO] [stderr] --> src/assembler.rs:90:6 [INFO] [stderr] | [INFO] [stderr] 90 | SR(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SA` [INFO] [stderr] --> src/assembler.rs:91:6 [INFO] [stderr] | [INFO] [stderr] 91 | SA(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SLI` [INFO] [stderr] --> src/assembler.rs:92:5 [INFO] [stderr] | [INFO] [stderr] 92 | SLI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SRI` [INFO] [stderr] --> src/assembler.rs:93:5 [INFO] [stderr] | [INFO] [stderr] 93 | SRI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SAI` [INFO] [stderr] --> src/assembler.rs:94:5 [INFO] [stderr] | [INFO] [stderr] 94 | SAI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TNE` [INFO] [stderr] --> src/assembler.rs:96:5 [INFO] [stderr] | [INFO] [stderr] 96 | TNE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TGT` [INFO] [stderr] --> src/assembler.rs:97:5 [INFO] [stderr] | [INFO] [stderr] 97 | TGT(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TLT` [INFO] [stderr] --> src/assembler.rs:98:5 [INFO] [stderr] | [INFO] [stderr] 98 | TLT(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TGE` [INFO] [stderr] --> src/assembler.rs:99:5 [INFO] [stderr] | [INFO] [stderr] 99 | TGE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TLE` [INFO] [stderr] --> src/assembler.rs:100:5 [INFO] [stderr] | [INFO] [stderr] 100 | TLE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `J` [INFO] [stderr] --> src/assembler.rs:103:7 [INFO] [stderr] | [INFO] [stderr] 103 | J(Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `B` [INFO] [stderr] --> src/assembler.rs:104:7 [INFO] [stderr] | [INFO] [stderr] 104 | B(Reg, Reg, Imm) [INFO] [stderr] | ^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Reserve` [INFO] [stderr] --> src/assembler.rs:155:5 [INFO] [stderr] | [INFO] [stderr] 155 | Reserve(u32), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `DataWords` [INFO] [stderr] --> src/assembler.rs:157:5 [INFO] [stderr] | [INFO] [stderr] 157 | DataWords(&'static [u8]), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: 27 warnings emitted [INFO] [stderr] [INFO] [stderr] Finished dev [unoptimized + debuginfo] target(s) in 1.56s [INFO] running `"docker" "inspect" "e155299ce9492c4799dce5613ca166e6513162e0dba7e68b6348672513c8a3d4"` [INFO] running `"docker" "rm" "-f" "e155299ce9492c4799dce5613ca166e6513162e0dba7e68b6348672513c8a3d4"` [INFO] [stdout] e155299ce9492c4799dce5613ca166e6513162e0dba7e68b6348672513c8a3d4 [INFO] running `"docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=0" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+beta-2020-06-03" "test" "--frozen" "--no-run"` [INFO] [stderr] WARNING: Your kernel does not support swap limit capabilities or the cgroup is not mounted. Memory limited without swap. [INFO] [stdout] 9c8f0631dd9b622fed75c13dfcb5b0f3ce1cba2204f03b314b4e571e26f06dfc [INFO] running `"docker" "start" "-a" "9c8f0631dd9b622fed75c13dfcb5b0f3ce1cba2204f03b314b4e571e26f06dfc"` [INFO] [stderr] sudo: setrlimit(RLIMIT_CORE): Operation not permitted [INFO] [stderr] Compiling sleeper v0.1.0 (/opt/rustwide/workdir) [INFO] [stderr] warning: unnecessary parentheses around assigned value [INFO] [stderr] --> src/assembler.rs:38:21 [INFO] [stderr] | [INFO] [stderr] 38 | let value = (abs - pc as i32); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_parens)]` on by default [INFO] [stderr] [INFO] [stderr] warning: unused import: `str` [INFO] [stderr] --> src/main.rs:12:9 [INFO] [stderr] | [INFO] [stderr] 12 | str, [INFO] [stderr] | ^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_imports)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `NOp` [INFO] [stderr] --> src/assembler.rs:73:5 [INFO] [stderr] | [INFO] [stderr] 73 | NOp, [INFO] [stderr] | ^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(dead_code)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `LdW` [INFO] [stderr] --> src/assembler.rs:76:5 [INFO] [stderr] | [INFO] [stderr] 76 | LdW(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `StW` [INFO] [stderr] --> src/assembler.rs:78:5 [INFO] [stderr] | [INFO] [stderr] 78 | StW(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Add` [INFO] [stderr] --> src/assembler.rs:81:5 [INFO] [stderr] | [INFO] [stderr] 81 | Add(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Sub` [INFO] [stderr] --> src/assembler.rs:82:5 [INFO] [stderr] | [INFO] [stderr] 82 | Sub(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `And` [INFO] [stderr] --> src/assembler.rs:83:5 [INFO] [stderr] | [INFO] [stderr] 83 | And(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Or` [INFO] [stderr] --> src/assembler.rs:84:6 [INFO] [stderr] | [INFO] [stderr] 84 | Or(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `XOr` [INFO] [stderr] --> src/assembler.rs:85:5 [INFO] [stderr] | [INFO] [stderr] 85 | XOr(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Not` [INFO] [stderr] --> src/assembler.rs:86:5 [INFO] [stderr] | [INFO] [stderr] 86 | Not(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Dec` [INFO] [stderr] --> src/assembler.rs:88:5 [INFO] [stderr] | [INFO] [stderr] 88 | Dec(Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SL` [INFO] [stderr] --> src/assembler.rs:89:6 [INFO] [stderr] | [INFO] [stderr] 89 | SL(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SR` [INFO] [stderr] --> src/assembler.rs:90:6 [INFO] [stderr] | [INFO] [stderr] 90 | SR(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SA` [INFO] [stderr] --> src/assembler.rs:91:6 [INFO] [stderr] | [INFO] [stderr] 91 | SA(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SLI` [INFO] [stderr] --> src/assembler.rs:92:5 [INFO] [stderr] | [INFO] [stderr] 92 | SLI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SRI` [INFO] [stderr] --> src/assembler.rs:93:5 [INFO] [stderr] | [INFO] [stderr] 93 | SRI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SAI` [INFO] [stderr] --> src/assembler.rs:94:5 [INFO] [stderr] | [INFO] [stderr] 94 | SAI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TNE` [INFO] [stderr] --> src/assembler.rs:96:5 [INFO] [stderr] | [INFO] [stderr] 96 | TNE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TGT` [INFO] [stderr] --> src/assembler.rs:97:5 [INFO] [stderr] | [INFO] [stderr] 97 | TGT(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TLT` [INFO] [stderr] --> src/assembler.rs:98:5 [INFO] [stderr] | [INFO] [stderr] 98 | TLT(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TGE` [INFO] [stderr] --> src/assembler.rs:99:5 [INFO] [stderr] | [INFO] [stderr] 99 | TGE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TLE` [INFO] [stderr] --> src/assembler.rs:100:5 [INFO] [stderr] | [INFO] [stderr] 100 | TLE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `J` [INFO] [stderr] --> src/assembler.rs:103:7 [INFO] [stderr] | [INFO] [stderr] 103 | J(Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `B` [INFO] [stderr] --> src/assembler.rs:104:7 [INFO] [stderr] | [INFO] [stderr] 104 | B(Reg, Reg, Imm) [INFO] [stderr] | ^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Reserve` [INFO] [stderr] --> src/assembler.rs:155:5 [INFO] [stderr] | [INFO] [stderr] 155 | Reserve(u32), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `DataWords` [INFO] [stderr] --> src/assembler.rs:157:5 [INFO] [stderr] | [INFO] [stderr] 157 | DataWords(&'static [u8]), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: 27 warnings emitted [INFO] [stderr] [INFO] [stderr] Finished test [unoptimized + debuginfo] target(s) in 0.90s [INFO] running `"docker" "inspect" "9c8f0631dd9b622fed75c13dfcb5b0f3ce1cba2204f03b314b4e571e26f06dfc"` [INFO] running `"docker" "rm" "-f" "9c8f0631dd9b622fed75c13dfcb5b0f3ce1cba2204f03b314b4e571e26f06dfc"` [INFO] [stdout] 9c8f0631dd9b622fed75c13dfcb5b0f3ce1cba2204f03b314b4e571e26f06dfc [INFO] running `"docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=0" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+beta-2020-06-03" "test" "--frozen"` [INFO] [stderr] WARNING: Your kernel does not support swap limit capabilities or the cgroup is not mounted. Memory limited without swap. [INFO] [stdout] c4423a700a4e9d5ce03d20340dde156b23e3f686e5091bda641f78c7ba310460 [INFO] running `"docker" "start" "-a" "c4423a700a4e9d5ce03d20340dde156b23e3f686e5091bda641f78c7ba310460"` [INFO] [stderr] sudo: setrlimit(RLIMIT_CORE): Operation not permitted [INFO] [stderr] warning: unnecessary parentheses around assigned value [INFO] [stderr] --> src/assembler.rs:38:21 [INFO] [stderr] | [INFO] [stderr] 38 | let value = (abs - pc as i32); [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ help: remove these parentheses [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_parens)]` on by default [INFO] [stderr] [INFO] [stderr] warning: unused import: `str` [INFO] [stderr] --> src/main.rs:12:9 [INFO] [stderr] | [INFO] [stderr] 12 | str, [INFO] [stderr] | ^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_imports)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `NOp` [INFO] [stderr] --> src/assembler.rs:73:5 [INFO] [stderr] | [INFO] [stderr] 73 | NOp, [INFO] [stderr] | ^^^ [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(dead_code)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `LdW` [INFO] [stderr] --> src/assembler.rs:76:5 [INFO] [stderr] | [INFO] [stderr] 76 | LdW(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `StW` [INFO] [stderr] --> src/assembler.rs:78:5 [INFO] [stderr] | [INFO] [stderr] 78 | StW(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Add` [INFO] [stderr] --> src/assembler.rs:81:5 [INFO] [stderr] | [INFO] [stderr] 81 | Add(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Sub` [INFO] [stderr] --> src/assembler.rs:82:5 [INFO] [stderr] | [INFO] [stderr] 82 | Sub(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `And` [INFO] [stderr] --> src/assembler.rs:83:5 [INFO] [stderr] | [INFO] [stderr] 83 | And(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Or` [INFO] [stderr] --> src/assembler.rs:84:6 [INFO] [stderr] | [INFO] [stderr] 84 | Or(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `XOr` [INFO] [stderr] --> src/assembler.rs:85:5 [INFO] [stderr] | [INFO] [stderr] 85 | XOr(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Not` [INFO] [stderr] --> src/assembler.rs:86:5 [INFO] [stderr] | [INFO] [stderr] 86 | Not(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Dec` [INFO] [stderr] --> src/assembler.rs:88:5 [INFO] [stderr] | [INFO] [stderr] 88 | Dec(Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SL` [INFO] [stderr] --> src/assembler.rs:89:6 [INFO] [stderr] | [INFO] [stderr] 89 | SL(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SR` [INFO] [stderr] --> src/assembler.rs:90:6 [INFO] [stderr] | [INFO] [stderr] 90 | SR(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SA` [INFO] [stderr] --> src/assembler.rs:91:6 [INFO] [stderr] | [INFO] [stderr] 91 | SA(Reg, Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SLI` [INFO] [stderr] --> src/assembler.rs:92:5 [INFO] [stderr] | [INFO] [stderr] 92 | SLI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SRI` [INFO] [stderr] --> src/assembler.rs:93:5 [INFO] [stderr] | [INFO] [stderr] 93 | SRI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `SAI` [INFO] [stderr] --> src/assembler.rs:94:5 [INFO] [stderr] | [INFO] [stderr] 94 | SAI(Reg, Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TNE` [INFO] [stderr] --> src/assembler.rs:96:5 [INFO] [stderr] | [INFO] [stderr] 96 | TNE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TGT` [INFO] [stderr] --> src/assembler.rs:97:5 [INFO] [stderr] | [INFO] [stderr] 97 | TGT(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TLT` [INFO] [stderr] --> src/assembler.rs:98:5 [INFO] [stderr] | [INFO] [stderr] 98 | TLT(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TGE` [INFO] [stderr] --> src/assembler.rs:99:5 [INFO] [stderr] | [INFO] [stderr] 99 | TGE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `TLE` [INFO] [stderr] --> src/assembler.rs:100:5 [INFO] [stderr] | [INFO] [stderr] 100 | TLE(Reg, Reg), [INFO] [stderr] | ^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `J` [INFO] [stderr] --> src/assembler.rs:103:7 [INFO] [stderr] | [INFO] [stderr] 103 | J(Reg, Imm), [INFO] [stderr] | ^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `B` [INFO] [stderr] --> src/assembler.rs:104:7 [INFO] [stderr] | [INFO] [stderr] 104 | B(Reg, Reg, Imm) [INFO] [stderr] | ^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `Reserve` [INFO] [stderr] --> src/assembler.rs:155:5 [INFO] [stderr] | [INFO] [stderr] 155 | Reserve(u32), [INFO] [stderr] | ^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: variant is never constructed: `DataWords` [INFO] [stderr] --> src/assembler.rs:157:5 [INFO] [stderr] | [INFO] [stderr] 157 | DataWords(&'static [u8]), [INFO] [stderr] | ^^^^^^^^^^^^^^^^^^^^^^^^ [INFO] [stderr] [INFO] [stderr] warning: 27 warnings emitted [INFO] [stderr] [INFO] [stderr] Finished test [unoptimized + debuginfo] target(s) in 0.02s [INFO] [stdout] [INFO] [stdout] running 0 tests [INFO] [stdout] [INFO] [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out [INFO] [stdout] [INFO] [stderr] Running /opt/rustwide/target/debug/deps/sleeper-63663713aff0b8aa [INFO] running `"docker" "inspect" "c4423a700a4e9d5ce03d20340dde156b23e3f686e5091bda641f78c7ba310460"` [INFO] running `"docker" "rm" "-f" "c4423a700a4e9d5ce03d20340dde156b23e3f686e5091bda641f78c7ba310460"` [INFO] [stdout] c4423a700a4e9d5ce03d20340dde156b23e3f686e5091bda641f78c7ba310460