[INFO] updating cached repository https://github.com/HOddyPropsting/Gameboy-Emulator
[INFO] running `"git" "-c" "credential.helper=" "-c" "credential.helper=/workspace/cargo-home/bin/git-credential-null" "-c" "remote.origin.fetch=refs/heads/*:refs/heads/*" "fetch" "origin" "--force" "--prune"`
[INFO] running `"git" "rev-parse" "HEAD"`
[INFO] [stdout] 2a4212e1d2baf148900aa804c3752e261eadad81
[INFO] testing HOddyPropsting/Gameboy-Emulator against 1.44.0 for beta-1.45-1
[INFO] running `"git" "clone" "/workspace/cache/git-repos/https%3A%2F%2Fgithub.com%2FHOddyPropsting%2FGameboy-Emulator" "/workspace/builds/worker-4/source"`
[INFO] [stderr] Cloning into '/workspace/builds/worker-4/source'...
[INFO] [stderr] done.
[INFO] validating manifest of git repo https://github.com/HOddyPropsting/Gameboy-Emulator on toolchain 1.44.0
[INFO] running `"/workspace/cargo-home/bin/cargo" "+1.44.0" "read-manifest" "--manifest-path" "Cargo.toml"`
[INFO] started tweaking git repo https://github.com/HOddyPropsting/Gameboy-Emulator
[INFO] finished tweaking git repo https://github.com/HOddyPropsting/Gameboy-Emulator
[INFO] tweaked toml for git repo https://github.com/HOddyPropsting/Gameboy-Emulator written to /workspace/builds/worker-4/source/Cargo.toml
[INFO] crate git repo https://github.com/HOddyPropsting/Gameboy-Emulator already has a lockfile, it will not be regenerated
[INFO] running `"/workspace/cargo-home/bin/cargo" "+1.44.0" "fetch" "--locked" "--manifest-path" "Cargo.toml"`
[INFO] [stderr]     Updating crates.io index
[INFO] [stderr] error: the lock file /workspace/builds/worker-4/source/Cargo.lock needs to be updated but --locked was passed to prevent this
[INFO] [stderr] If you want to try to generate the lock file without accessing the network, use the --offline flag.
[INFO] the lockfile is outdated, regenerating it
[INFO] running `"/workspace/cargo-home/bin/cargo" "+1.44.0" "generate-lockfile" "--manifest-path" "Cargo.toml" "-Zno-index-update"`
[INFO] running `"/workspace/cargo-home/bin/cargo" "+1.44.0" "fetch" "--locked" "--manifest-path" "Cargo.toml"`
[INFO] running `"docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=0" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+1.44.0" "build" "--frozen"`
[INFO] [stderr] WARNING: Your kernel does not support swap limit capabilities or the cgroup is not mounted. Memory limited without swap.
[INFO] [stdout] ea025ef1526291d5e013a3e7ca048a5435735037dc78b9371a2138ed31521217
[INFO] running `"docker" "start" "-a" "ea025ef1526291d5e013a3e7ca048a5435735037dc78b9371a2138ed31521217"`
[INFO] [stderr] sudo: setrlimit(RLIMIT_CORE): Operation not permitted
[INFO] [stderr]    Compiling sdl2-sys v0.30.0
[INFO] [stderr]    Compiling gb v0.1.0 (/opt/rustwide/workdir)
[INFO] [stderr]    Compiling sdl2 v0.30.0
[INFO] [stderr] warning: unnecessary trailing semicolon
[INFO] [stderr]    --> src/cpu.rs:721:42
[INFO] [stderr]     |
[INFO] [stderr] 721 |       0x56 => { ld_8!(self,D,HL_address);;
[INFO] [stderr]     |                                          ^ help: remove this semicolon
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(redundant_semicolons)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1294:12
[INFO] [stderr]      |
[INFO] [stderr] 1294 |       0o000...0o007 => self.rlc(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr]      |
[INFO] [stderr]      = note: `#[warn(ellipsis_inclusive_range_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1295:12
[INFO] [stderr]      |
[INFO] [stderr] 1295 |       0o010...0o017 => self.rrc(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1296:12
[INFO] [stderr]      |
[INFO] [stderr] 1296 |       0o020...0o027 => self.rl(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1297:12
[INFO] [stderr]      |
[INFO] [stderr] 1297 |       0o030...0o037 => self.rr(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1298:12
[INFO] [stderr]      |
[INFO] [stderr] 1298 |       0o040...0o047 => self.sla(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1299:12
[INFO] [stderr]      |
[INFO] [stderr] 1299 |       0o050...0o057 => self.sra(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1300:12
[INFO] [stderr]      |
[INFO] [stderr] 1300 |       0o060...0o067 => self.swap(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1301:12
[INFO] [stderr]      |
[INFO] [stderr] 1301 |       0o070...0o077 => self.srl(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1302:12
[INFO] [stderr]      |
[INFO] [stderr] 1302 |       0o100...0o107 => self.bit(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1303:12
[INFO] [stderr]      |
[INFO] [stderr] 1303 |       0o110...0o117 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1304:12
[INFO] [stderr]      |
[INFO] [stderr] 1304 |       0o120...0o127 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1305:12
[INFO] [stderr]      |
[INFO] [stderr] 1305 |       0o130...0o137 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1306:12
[INFO] [stderr]      |
[INFO] [stderr] 1306 |       0o140...0o147 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1307:12
[INFO] [stderr]      |
[INFO] [stderr] 1307 |       0o150...0o157 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1308:12
[INFO] [stderr]      |
[INFO] [stderr] 1308 |       0o160...0o167 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1309:12
[INFO] [stderr]      |
[INFO] [stderr] 1309 |       0o170...0o177 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1310:12
[INFO] [stderr]      |
[INFO] [stderr] 1310 |       0o200...0o207 => self.res(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1311:12
[INFO] [stderr]      |
[INFO] [stderr] 1311 |       0o210...0o217 => self.res(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1312:12
[INFO] [stderr]      |
[INFO] [stderr] 1312 |       0o220...0o227 => self.res(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1313:12
[INFO] [stderr]      |
[INFO] [stderr] 1313 |       0o230...0o237 => self.res(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1314:12
[INFO] [stderr]      |
[INFO] [stderr] 1314 |       0o240...0o247 => self.res(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1315:12
[INFO] [stderr]      |
[INFO] [stderr] 1315 |       0o250...0o257 => self.res(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1316:12
[INFO] [stderr]      |
[INFO] [stderr] 1316 |       0o260...0o267 => self.res(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1317:12
[INFO] [stderr]      |
[INFO] [stderr] 1317 |       0o270...0o277 => self.res(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1318:12
[INFO] [stderr]      |
[INFO] [stderr] 1318 |       0o300...0o307 => self.set(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1319:12
[INFO] [stderr]      |
[INFO] [stderr] 1319 |       0o310...0o317 => self.set(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1320:12
[INFO] [stderr]      |
[INFO] [stderr] 1320 |       0o320...0o327 => self.set(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1321:12
[INFO] [stderr]      |
[INFO] [stderr] 1321 |       0o330...0o337 => self.set(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1322:12
[INFO] [stderr]      |
[INFO] [stderr] 1322 |       0o340...0o347 => self.set(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1323:12
[INFO] [stderr]      |
[INFO] [stderr] 1323 |       0o350...0o357 => self.set(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1324:12
[INFO] [stderr]      |
[INFO] [stderr] 1324 |       0o360...0o367 => self.set(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1325:12
[INFO] [stderr]      |
[INFO] [stderr] 1325 |       0o370...0o377 => self.set(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `sdl2::rect::Point`
[INFO] [stderr]  --> src/lcd.rs:3:5
[INFO] [stderr]   |
[INFO] [stderr] 3 | use sdl2::rect::Point;
[INFO] [stderr]   |     ^^^^^^^^^^^^^^^^^
[INFO] [stderr]   |
[INFO] [stderr]   = note: `#[warn(unused_imports)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `WindowContext`
[INFO] [stderr]  --> src/lcd.rs:4:27
[INFO] [stderr]   |
[INFO] [stderr] 4 | use sdl2::video::{Window, WindowContext};
[INFO] [stderr]   |                           ^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `sdl2::video::WindowSurfaceRef`
[INFO] [stderr]  --> src/lcd.rs:6:5
[INFO] [stderr]   |
[INFO] [stderr] 6 | use sdl2::video::WindowSurfaceRef;
[INFO] [stderr]   |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `Mmu`
[INFO] [stderr]  --> src/lcd.rs:9:11
[INFO] [stderr]   |
[INFO] [stderr] 9 | use mmu::{Mmu,Bit};
[INFO] [stderr]   |           ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unnecessary braces around assigned value
[INFO] [stderr]   --> src/lcd.rs:50:37
[INFO] [stderr]    |
[INFO] [stderr] 50 | const BG_COLOR_SHADES : [Color;4] = {[COLOR_WHITE, COLOR_L_GREY, COLOR_GREY, COLOR_BLACK]};
[INFO] [stderr]    |                                     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: remove these braces
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_braces)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `rand::Rng`
[INFO] [stderr]  --> src/main.rs:8:5
[INFO] [stderr]   |
[INFO] [stderr] 8 | use rand::Rng;
[INFO] [stderr]   |     ^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `mmu::Bit`
[INFO] [stderr]   --> src/main.rs:11:5
[INFO] [stderr]    |
[INFO] [stderr] 11 | use mmu::Bit;
[INFO] [stderr]    |     ^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable pattern
[INFO] [stderr]     --> src/cpu.rs:1326:7
[INFO] [stderr]      |
[INFO] [stderr] 1326 |       _ => panic!("invalid instruction given to prefix_cb"),
[INFO] [stderr]      |       ^
[INFO] [stderr]      |
[INFO] [stderr]      = note: `#[warn(unreachable_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rng`
[INFO] [stderr]   --> src/main.rs:41:7
[INFO] [stderr]    |
[INFO] [stderr] 41 |   let mut rng = rand::thread_rng();
[INFO] [stderr]    |       ^^^^^^^ help: if this is intentional, prefix it with an underscore: `_rng`
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_variables)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `dt`
[INFO] [stderr]   --> src/main.rs:56:9
[INFO] [stderr]    |
[INFO] [stderr] 56 |     let dt = prev.to(now);
[INFO] [stderr]    |         ^^ help: if this is intentional, prefix it with an underscore: `_dt`
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:18:7
[INFO] [stderr]    |
[INFO] [stderr] 18 |   let mut c = Cpu::default();
[INFO] [stderr]    |       ----^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_mut)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:30:7
[INFO] [stderr]    |
[INFO] [stderr] 30 |   let mut canvas = window
[INFO] [stderr]    |       ----^^^^^^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:41:7
[INFO] [stderr]    |
[INFO] [stderr] 41 |   let mut rng = rand::thread_rng();
[INFO] [stderr]    |       ----^^^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `set_bit`
[INFO] [stderr]   --> src/mmu.rs:77:3
[INFO] [stderr]    |
[INFO] [stderr] 77 |   pub fn set_bit(&mut self, loc : u16, bit : Bit) {
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(dead_code)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `F`
[INFO] [stderr]   --> src/cpu.rs:14:3
[INFO] [stderr]    |
[INFO] [stderr] 14 |   F,
[INFO] [stderr]    |   ^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `TIMER_OVERFLOW`
[INFO] [stderr]     --> src/cpu.rs:1344:5
[INFO] [stderr]      |
[INFO] [stderr] 1344 |     TIMER_OVERFLOW = 0x0050,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `SERIAL_TRANSFER`
[INFO] [stderr]     --> src/cpu.rs:1345:5
[INFO] [stderr]      |
[INFO] [stderr] 1345 |     SERIAL_TRANSFER = 0x0058,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `INPUT`
[INFO] [stderr]     --> src/cpu.rs:1346:5
[INFO] [stderr]      |
[INFO] [stderr] 1346 |     INPUT = 0x0060,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: constant item is never used: `BG_PALETTE`
[INFO] [stderr]   --> src/lcd.rs:20:1
[INFO] [stderr]    |
[INFO] [stderr] 20 | const BG_PALETTE: u16 = 0xFF47;
[INFO] [stderr]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Square`
[INFO] [stderr]   --> src/lcd.rs:61:3
[INFO] [stderr]    |
[INFO] [stderr] 61 |   Square,
[INFO] [stderr]    |   ^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Rect`
[INFO] [stderr]   --> src/lcd.rs:62:3
[INFO] [stderr]    |
[INFO] [stderr] 62 |   Rect,
[INFO] [stderr]    |   ^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_lcd_enabled`
[INFO] [stderr]   --> src/lcd.rs:67:3
[INFO] [stderr]    |
[INFO] [stderr] 67 |   fn get_lcd_enabled(&self) -> bool{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_window_tile_bank`
[INFO] [stderr]   --> src/lcd.rs:71:3
[INFO] [stderr]    |
[INFO] [stderr] 71 |   fn get_window_tile_bank(&self) -> u16{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_window_enabled`
[INFO] [stderr]   --> src/lcd.rs:79:3
[INFO] [stderr]    |
[INFO] [stderr] 79 |   fn get_window_enabled(&self) -> bool {
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_sprite_size`
[INFO] [stderr]   --> src/lcd.rs:99:3
[INFO] [stderr]    |
[INFO] [stderr] 99 |   fn get_sprite_size(&self) -> SpriteSize{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_sprite_enabled`
[INFO] [stderr]    --> src/lcd.rs:107:3
[INFO] [stderr]     |
[INFO] [stderr] 107 |   fn get_sprite_enabled(&self) -> bool{
[INFO] [stderr]     |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: 59 warnings emitted
[INFO] [stderr] 
[INFO] [stderr]     Finished dev [unoptimized + debuginfo] target(s) in 9.13s
[INFO] running `"docker" "inspect" "ea025ef1526291d5e013a3e7ca048a5435735037dc78b9371a2138ed31521217"`
[INFO] running `"docker" "rm" "-f" "ea025ef1526291d5e013a3e7ca048a5435735037dc78b9371a2138ed31521217"`
[INFO] [stdout] ea025ef1526291d5e013a3e7ca048a5435735037dc78b9371a2138ed31521217
[INFO] running `"docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=0" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+1.44.0" "test" "--frozen" "--no-run"`
[INFO] [stderr] WARNING: Your kernel does not support swap limit capabilities or the cgroup is not mounted. Memory limited without swap.
[INFO] [stdout] 63997932f02259fdd521445eec3998ff29a508f13b1ac347b9b02eb7f0fed057
[INFO] running `"docker" "start" "-a" "63997932f02259fdd521445eec3998ff29a508f13b1ac347b9b02eb7f0fed057"`
[INFO] [stderr] sudo: setrlimit(RLIMIT_CORE): Operation not permitted
[INFO] [stderr]     Blocking waiting for file lock on package cache
[INFO] [stderr]    Compiling gb v0.1.0 (/opt/rustwide/workdir)
[INFO] [stderr] warning: unnecessary trailing semicolon
[INFO] [stderr]    --> src/cpu.rs:721:42
[INFO] [stderr]     |
[INFO] [stderr] 721 |       0x56 => { ld_8!(self,D,HL_address);;
[INFO] [stderr]     |                                          ^ help: remove this semicolon
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(redundant_semicolons)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1294:12
[INFO] [stderr]      |
[INFO] [stderr] 1294 |       0o000...0o007 => self.rlc(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr]      |
[INFO] [stderr]      = note: `#[warn(ellipsis_inclusive_range_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1295:12
[INFO] [stderr]      |
[INFO] [stderr] 1295 |       0o010...0o017 => self.rrc(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1296:12
[INFO] [stderr]      |
[INFO] [stderr] 1296 |       0o020...0o027 => self.rl(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1297:12
[INFO] [stderr]      |
[INFO] [stderr] 1297 |       0o030...0o037 => self.rr(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1298:12
[INFO] [stderr]      |
[INFO] [stderr] 1298 |       0o040...0o047 => self.sla(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1299:12
[INFO] [stderr]      |
[INFO] [stderr] 1299 |       0o050...0o057 => self.sra(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1300:12
[INFO] [stderr]      |
[INFO] [stderr] 1300 |       0o060...0o067 => self.swap(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1301:12
[INFO] [stderr]      |
[INFO] [stderr] 1301 |       0o070...0o077 => self.srl(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1302:12
[INFO] [stderr]      |
[INFO] [stderr] 1302 |       0o100...0o107 => self.bit(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1303:12
[INFO] [stderr]      |
[INFO] [stderr] 1303 |       0o110...0o117 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1304:12
[INFO] [stderr]      |
[INFO] [stderr] 1304 |       0o120...0o127 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1305:12
[INFO] [stderr]      |
[INFO] [stderr] 1305 |       0o130...0o137 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1306:12
[INFO] [stderr]      |
[INFO] [stderr] 1306 |       0o140...0o147 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1307:12
[INFO] [stderr]      |
[INFO] [stderr] 1307 |       0o150...0o157 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1308:12
[INFO] [stderr]      |
[INFO] [stderr] 1308 |       0o160...0o167 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1309:12
[INFO] [stderr]      |
[INFO] [stderr] 1309 |       0o170...0o177 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1310:12
[INFO] [stderr]      |
[INFO] [stderr] 1310 |       0o200...0o207 => self.res(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1311:12
[INFO] [stderr]      |
[INFO] [stderr] 1311 |       0o210...0o217 => self.res(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1312:12
[INFO] [stderr]      |
[INFO] [stderr] 1312 |       0o220...0o227 => self.res(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1313:12
[INFO] [stderr]      |
[INFO] [stderr] 1313 |       0o230...0o237 => self.res(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1314:12
[INFO] [stderr]      |
[INFO] [stderr] 1314 |       0o240...0o247 => self.res(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1315:12
[INFO] [stderr]      |
[INFO] [stderr] 1315 |       0o250...0o257 => self.res(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1316:12
[INFO] [stderr]      |
[INFO] [stderr] 1316 |       0o260...0o267 => self.res(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1317:12
[INFO] [stderr]      |
[INFO] [stderr] 1317 |       0o270...0o277 => self.res(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1318:12
[INFO] [stderr]      |
[INFO] [stderr] 1318 |       0o300...0o307 => self.set(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1319:12
[INFO] [stderr]      |
[INFO] [stderr] 1319 |       0o310...0o317 => self.set(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1320:12
[INFO] [stderr]      |
[INFO] [stderr] 1320 |       0o320...0o327 => self.set(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1321:12
[INFO] [stderr]      |
[INFO] [stderr] 1321 |       0o330...0o337 => self.set(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1322:12
[INFO] [stderr]      |
[INFO] [stderr] 1322 |       0o340...0o347 => self.set(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1323:12
[INFO] [stderr]      |
[INFO] [stderr] 1323 |       0o350...0o357 => self.set(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1324:12
[INFO] [stderr]      |
[INFO] [stderr] 1324 |       0o360...0o367 => self.set(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1325:12
[INFO] [stderr]      |
[INFO] [stderr] 1325 |       0o370...0o377 => self.set(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `sdl2::rect::Point`
[INFO] [stderr]  --> src/lcd.rs:3:5
[INFO] [stderr]   |
[INFO] [stderr] 3 | use sdl2::rect::Point;
[INFO] [stderr]   |     ^^^^^^^^^^^^^^^^^
[INFO] [stderr]   |
[INFO] [stderr]   = note: `#[warn(unused_imports)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `WindowContext`
[INFO] [stderr]  --> src/lcd.rs:4:27
[INFO] [stderr]   |
[INFO] [stderr] 4 | use sdl2::video::{Window, WindowContext};
[INFO] [stderr]   |                           ^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `sdl2::video::WindowSurfaceRef`
[INFO] [stderr]  --> src/lcd.rs:6:5
[INFO] [stderr]   |
[INFO] [stderr] 6 | use sdl2::video::WindowSurfaceRef;
[INFO] [stderr]   |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `Mmu`
[INFO] [stderr]  --> src/lcd.rs:9:11
[INFO] [stderr]   |
[INFO] [stderr] 9 | use mmu::{Mmu,Bit};
[INFO] [stderr]   |           ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unnecessary braces around assigned value
[INFO] [stderr]   --> src/lcd.rs:50:37
[INFO] [stderr]    |
[INFO] [stderr] 50 | const BG_COLOR_SHADES : [Color;4] = {[COLOR_WHITE, COLOR_L_GREY, COLOR_GREY, COLOR_BLACK]};
[INFO] [stderr]    |                                     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: remove these braces
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_braces)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `rand::Rng`
[INFO] [stderr]  --> src/main.rs:8:5
[INFO] [stderr]   |
[INFO] [stderr] 8 | use rand::Rng;
[INFO] [stderr]   |     ^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `mmu::Bit`
[INFO] [stderr]   --> src/main.rs:11:5
[INFO] [stderr]    |
[INFO] [stderr] 11 | use mmu::Bit;
[INFO] [stderr]    |     ^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable pattern
[INFO] [stderr]     --> src/cpu.rs:1326:7
[INFO] [stderr]      |
[INFO] [stderr] 1326 |       _ => panic!("invalid instruction given to prefix_cb"),
[INFO] [stderr]      |       ^
[INFO] [stderr]      |
[INFO] [stderr]      = note: `#[warn(unreachable_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rng`
[INFO] [stderr]   --> src/main.rs:41:7
[INFO] [stderr]    |
[INFO] [stderr] 41 |   let mut rng = rand::thread_rng();
[INFO] [stderr]    |       ^^^^^^^ help: if this is intentional, prefix it with an underscore: `_rng`
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_variables)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `dt`
[INFO] [stderr]   --> src/main.rs:56:9
[INFO] [stderr]    |
[INFO] [stderr] 56 |     let dt = prev.to(now);
[INFO] [stderr]    |         ^^ help: if this is intentional, prefix it with an underscore: `_dt`
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:18:7
[INFO] [stderr]    |
[INFO] [stderr] 18 |   let mut c = Cpu::default();
[INFO] [stderr]    |       ----^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_mut)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:30:7
[INFO] [stderr]    |
[INFO] [stderr] 30 |   let mut canvas = window
[INFO] [stderr]    |       ----^^^^^^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:41:7
[INFO] [stderr]    |
[INFO] [stderr] 41 |   let mut rng = rand::thread_rng();
[INFO] [stderr]    |       ----^^^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `F`
[INFO] [stderr]   --> src/cpu.rs:14:3
[INFO] [stderr]    |
[INFO] [stderr] 14 |   F,
[INFO] [stderr]    |   ^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(dead_code)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `TIMER_OVERFLOW`
[INFO] [stderr]     --> src/cpu.rs:1344:5
[INFO] [stderr]      |
[INFO] [stderr] 1344 |     TIMER_OVERFLOW = 0x0050,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `SERIAL_TRANSFER`
[INFO] [stderr]     --> src/cpu.rs:1345:5
[INFO] [stderr]      |
[INFO] [stderr] 1345 |     SERIAL_TRANSFER = 0x0058,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `INPUT`
[INFO] [stderr]     --> src/cpu.rs:1346:5
[INFO] [stderr]      |
[INFO] [stderr] 1346 |     INPUT = 0x0060,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: constant item is never used: `BG_PALETTE`
[INFO] [stderr]   --> src/lcd.rs:20:1
[INFO] [stderr]    |
[INFO] [stderr] 20 | const BG_PALETTE: u16 = 0xFF47;
[INFO] [stderr]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Square`
[INFO] [stderr]   --> src/lcd.rs:61:3
[INFO] [stderr]    |
[INFO] [stderr] 61 |   Square,
[INFO] [stderr]    |   ^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Rect`
[INFO] [stderr]   --> src/lcd.rs:62:3
[INFO] [stderr]    |
[INFO] [stderr] 62 |   Rect,
[INFO] [stderr]    |   ^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_lcd_enabled`
[INFO] [stderr]   --> src/lcd.rs:67:3
[INFO] [stderr]    |
[INFO] [stderr] 67 |   fn get_lcd_enabled(&self) -> bool{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_window_tile_bank`
[INFO] [stderr]   --> src/lcd.rs:71:3
[INFO] [stderr]    |
[INFO] [stderr] 71 |   fn get_window_tile_bank(&self) -> u16{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_window_enabled`
[INFO] [stderr]   --> src/lcd.rs:79:3
[INFO] [stderr]    |
[INFO] [stderr] 79 |   fn get_window_enabled(&self) -> bool {
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_sprite_size`
[INFO] [stderr]   --> src/lcd.rs:99:3
[INFO] [stderr]    |
[INFO] [stderr] 99 |   fn get_sprite_size(&self) -> SpriteSize{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_sprite_enabled`
[INFO] [stderr]    --> src/lcd.rs:107:3
[INFO] [stderr]     |
[INFO] [stderr] 107 |   fn get_sprite_enabled(&self) -> bool{
[INFO] [stderr]     |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: 58 warnings emitted
[INFO] [stderr] 
[INFO] [stderr]     Finished test [unoptimized + debuginfo] target(s) in 1.62s
[INFO] running `"docker" "inspect" "63997932f02259fdd521445eec3998ff29a508f13b1ac347b9b02eb7f0fed057"`
[INFO] running `"docker" "rm" "-f" "63997932f02259fdd521445eec3998ff29a508f13b1ac347b9b02eb7f0fed057"`
[INFO] [stdout] 63997932f02259fdd521445eec3998ff29a508f13b1ac347b9b02eb7f0fed057
[INFO] running `"docker" "create" "-v" "/var/lib/crater-agent-workspace/builds/worker-4/target:/opt/rustwide/target:rw,Z" "-v" "/var/lib/crater-agent-workspace/builds/worker-4/source:/opt/rustwide/workdir:ro,Z" "-v" "/var/lib/crater-agent-workspace/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/var/lib/crater-agent-workspace/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=0" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+1.44.0" "test" "--frozen"`
[INFO] [stderr] WARNING: Your kernel does not support swap limit capabilities or the cgroup is not mounted. Memory limited without swap.
[INFO] [stdout] 1cec99735338399bd5a38c3e75ae2ce69744451fdb7172f7201e3092039ef32e
[INFO] running `"docker" "start" "-a" "1cec99735338399bd5a38c3e75ae2ce69744451fdb7172f7201e3092039ef32e"`
[INFO] [stderr] sudo: setrlimit(RLIMIT_CORE): Operation not permitted
[INFO] [stderr] warning: unnecessary trailing semicolon
[INFO] [stderr]    --> src/cpu.rs:721:42
[INFO] [stderr]     |
[INFO] [stderr] 721 |       0x56 => { ld_8!(self,D,HL_address);;
[INFO] [stderr]     |                                          ^ help: remove this semicolon
[INFO] [stderr]     |
[INFO] [stderr]     = note: `#[warn(redundant_semicolons)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1294:12
[INFO] [stderr]      |
[INFO] [stderr] 1294 |       0o000...0o007 => self.rlc(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr]      |
[INFO] [stderr]      = note: `#[warn(ellipsis_inclusive_range_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1295:12
[INFO] [stderr]      |
[INFO] [stderr] 1295 |       0o010...0o017 => self.rrc(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1296:12
[INFO] [stderr]      |
[INFO] [stderr] 1296 |       0o020...0o027 => self.rl(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1297:12
[INFO] [stderr]      |
[INFO] [stderr] 1297 |       0o030...0o037 => self.rr(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1298:12
[INFO] [stderr]      |
[INFO] [stderr] 1298 |       0o040...0o047 => self.sla(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1299:12
[INFO] [stderr]      |
[INFO] [stderr] 1299 |       0o050...0o057 => self.sra(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1300:12
[INFO] [stderr]      |
[INFO] [stderr] 1300 |       0o060...0o067 => self.swap(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1301:12
[INFO] [stderr]      |
[INFO] [stderr] 1301 |       0o070...0o077 => self.srl(reg_vec[(instruction % 8) as usize]),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1302:12
[INFO] [stderr]      |
[INFO] [stderr] 1302 |       0o100...0o107 => self.bit(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1303:12
[INFO] [stderr]      |
[INFO] [stderr] 1303 |       0o110...0o117 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1304:12
[INFO] [stderr]      |
[INFO] [stderr] 1304 |       0o120...0o127 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1305:12
[INFO] [stderr]      |
[INFO] [stderr] 1305 |       0o130...0o137 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1306:12
[INFO] [stderr]      |
[INFO] [stderr] 1306 |       0o140...0o147 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1307:12
[INFO] [stderr]      |
[INFO] [stderr] 1307 |       0o150...0o157 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1308:12
[INFO] [stderr]      |
[INFO] [stderr] 1308 |       0o160...0o167 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1309:12
[INFO] [stderr]      |
[INFO] [stderr] 1309 |       0o170...0o177 => self.bit(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1310:12
[INFO] [stderr]      |
[INFO] [stderr] 1310 |       0o200...0o207 => self.res(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1311:12
[INFO] [stderr]      |
[INFO] [stderr] 1311 |       0o210...0o217 => self.res(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1312:12
[INFO] [stderr]      |
[INFO] [stderr] 1312 |       0o220...0o227 => self.res(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1313:12
[INFO] [stderr]      |
[INFO] [stderr] 1313 |       0o230...0o237 => self.res(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1314:12
[INFO] [stderr]      |
[INFO] [stderr] 1314 |       0o240...0o247 => self.res(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1315:12
[INFO] [stderr]      |
[INFO] [stderr] 1315 |       0o250...0o257 => self.res(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1316:12
[INFO] [stderr]      |
[INFO] [stderr] 1316 |       0o260...0o267 => self.res(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1317:12
[INFO] [stderr]      |
[INFO] [stderr] 1317 |       0o270...0o277 => self.res(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1318:12
[INFO] [stderr]      |
[INFO] [stderr] 1318 |       0o300...0o307 => self.set(reg_vec[(instruction % 8) as usize], Bit::One),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1319:12
[INFO] [stderr]      |
[INFO] [stderr] 1319 |       0o310...0o317 => self.set(reg_vec[(instruction % 8) as usize], Bit::Two),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1320:12
[INFO] [stderr]      |
[INFO] [stderr] 1320 |       0o320...0o327 => self.set(reg_vec[(instruction % 8) as usize], Bit::Three),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1321:12
[INFO] [stderr]      |
[INFO] [stderr] 1321 |       0o330...0o337 => self.set(reg_vec[(instruction % 8) as usize], Bit::Four),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1322:12
[INFO] [stderr]      |
[INFO] [stderr] 1322 |       0o340...0o347 => self.set(reg_vec[(instruction % 8) as usize], Bit::Five),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1323:12
[INFO] [stderr]      |
[INFO] [stderr] 1323 |       0o350...0o357 => self.set(reg_vec[(instruction % 8) as usize], Bit::Six),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1324:12
[INFO] [stderr]      |
[INFO] [stderr] 1324 |       0o360...0o367 => self.set(reg_vec[(instruction % 8) as usize], Bit::Seven),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: `...` range patterns are deprecated
[INFO] [stderr]     --> src/cpu.rs:1325:12
[INFO] [stderr]      |
[INFO] [stderr] 1325 |       0o370...0o377 => self.set(reg_vec[(instruction % 8) as usize], Bit::Eight),
[INFO] [stderr]      |            ^^^ help: use `..=` for an inclusive range
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `sdl2::rect::Point`
[INFO] [stderr]  --> src/lcd.rs:3:5
[INFO] [stderr]   |
[INFO] [stderr] 3 | use sdl2::rect::Point;
[INFO] [stderr]   |     ^^^^^^^^^^^^^^^^^
[INFO] [stderr]   |
[INFO] [stderr]   = note: `#[warn(unused_imports)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `WindowContext`
[INFO] [stderr]  --> src/lcd.rs:4:27
[INFO] [stderr]   |
[INFO] [stderr] 4 | use sdl2::video::{Window, WindowContext};
[INFO] [stderr]   |                           ^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `sdl2::video::WindowSurfaceRef`
[INFO] [stderr]  --> src/lcd.rs:6:5
[INFO] [stderr]   |
[INFO] [stderr] 6 | use sdl2::video::WindowSurfaceRef;
[INFO] [stderr]   |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `Mmu`
[INFO] [stderr]  --> src/lcd.rs:9:11
[INFO] [stderr]   |
[INFO] [stderr] 9 | use mmu::{Mmu,Bit};
[INFO] [stderr]   |           ^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unnecessary braces around assigned value
[INFO] [stderr]   --> src/lcd.rs:50:37
[INFO] [stderr]    |
[INFO] [stderr] 50 | const BG_COLOR_SHADES : [Color;4] = {[COLOR_WHITE, COLOR_L_GREY, COLOR_GREY, COLOR_BLACK]};
[INFO] [stderr]    |                                     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: remove these braces
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_braces)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `rand::Rng`
[INFO] [stderr]  --> src/main.rs:8:5
[INFO] [stderr]   |
[INFO] [stderr] 8 | use rand::Rng;
[INFO] [stderr]   |     ^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unused import: `mmu::Bit`
[INFO] [stderr]   --> src/main.rs:11:5
[INFO] [stderr]    |
[INFO] [stderr] 11 | use mmu::Bit;
[INFO] [stderr]    |     ^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: unreachable pattern
[INFO] [stderr]     --> src/cpu.rs:1326:7
[INFO] [stderr]      |
[INFO] [stderr] 1326 |       _ => panic!("invalid instruction given to prefix_cb"),
[INFO] [stderr]      |       ^
[INFO] [stderr]      |
[INFO] [stderr]      = note: `#[warn(unreachable_patterns)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `rng`
[INFO] [stderr]   --> src/main.rs:41:7
[INFO] [stderr]    |
[INFO] [stderr] 41 |   let mut rng = rand::thread_rng();
[INFO] [stderr]    |       ^^^^^^^ help: if this is intentional, prefix it with an underscore: `_rng`
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_variables)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: unused variable: `dt`
[INFO] [stderr]   --> src/main.rs:56:9
[INFO] [stderr]    |
[INFO] [stderr] 56 |     let dt = prev.to(now);
[INFO] [stderr]    |         ^^ help: if this is intentional, prefix it with an underscore: `_dt`
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:18:7
[INFO] [stderr]    |
[INFO] [stderr] 18 |   let mut c = Cpu::default();
[INFO] [stderr]    |       ----^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(unused_mut)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:30:7
[INFO] [stderr]    |
[INFO] [stderr] 30 |   let mut canvas = window
[INFO] [stderr]    |       ----^^^^^^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr] 
[INFO] [stderr] warning: variable does not need to be mutable
[INFO] [stderr]   --> src/main.rs:41:7
[INFO] [stderr]    |
[INFO] [stderr] 41 |   let mut rng = rand::thread_rng();
[INFO] [stderr]    |       ----^^^
[INFO] [stderr]    |       |
[INFO] [stderr]    |       help: remove this `mut`
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `F`
[INFO] [stderr]   --> src/cpu.rs:14:3
[INFO] [stderr]    |
[INFO] [stderr] 14 |   F,
[INFO] [stderr]    |   ^
[INFO] [stderr]    |
[INFO] [stderr]    = note: `#[warn(dead_code)]` on by default
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `TIMER_OVERFLOW`
[INFO] [stderr]     --> src/cpu.rs:1344:5
[INFO] [stderr]      |
[INFO] [stderr] 1344 |     TIMER_OVERFLOW = 0x0050,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `SERIAL_TRANSFER`
[INFO] [stderr]     --> src/cpu.rs:1345:5
[INFO] [stderr]      |
[INFO] [stderr] 1345 |     SERIAL_TRANSFER = 0x0058,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `INPUT`
[INFO] [stderr]     --> src/cpu.rs:1346:5
[INFO] [stderr]      |
[INFO] [stderr] 1346 |     INPUT = 0x0060,
[INFO] [stderr]      |     ^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: constant item is never used: `BG_PALETTE`
[INFO] [stderr]   --> src/lcd.rs:20:1
[INFO] [stderr]    |
[INFO] [stderr] 20 | const BG_PALETTE: u16 = 0xFF47;
[INFO] [stderr]    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Square`
[INFO] [stderr]   --> src/lcd.rs:61:3
[INFO] [stderr]    |
[INFO] [stderr] 61 |   Square,
[INFO] [stderr]    |   ^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: variant is never constructed: `Rect`
[INFO] [stderr]   --> src/lcd.rs:62:3
[INFO] [stderr]    |
[INFO] [stderr] 62 |   Rect,
[INFO] [stderr]    |   ^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_lcd_enabled`
[INFO] [stderr]   --> src/lcd.rs:67:3
[INFO] [stderr]    |
[INFO] [stderr] 67 |   fn get_lcd_enabled(&self) -> bool{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_window_tile_bank`
[INFO] [stderr]   --> src/lcd.rs:71:3
[INFO] [stderr]    |
[INFO] [stderr] 71 |   fn get_window_tile_bank(&self) -> u16{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_window_enabled`
[INFO] [stderr]   --> src/lcd.rs:79:3
[INFO] [stderr]    |
[INFO] [stderr] 79 |   fn get_window_enabled(&self) -> bool {
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_sprite_size`
[INFO] [stderr]   --> src/lcd.rs:99:3
[INFO] [stderr]    |
[INFO] [stderr] 99 |   fn get_sprite_size(&self) -> SpriteSize{
[INFO] [stderr]    |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: method is never used: `get_sprite_enabled`
[INFO] [stderr]    --> src/lcd.rs:107:3
[INFO] [stderr]     |
[INFO] [stderr] 107 |   fn get_sprite_enabled(&self) -> bool{
[INFO] [stderr]     |   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
[INFO] [stderr] 
[INFO] [stderr] warning: 58 warnings emitted
[INFO] [stderr] 
[INFO] [stderr]     Finished test [unoptimized + debuginfo] target(s) in 0.19s
[INFO] [stderr]      Running /opt/rustwide/target/debug/deps/gb-16d03206e2c3c5be
[INFO] [stdout] 
[INFO] [stdout] running 5 tests
[INFO] [stdout] test mmu::tests::fetch_returns_boot_rom_if_flag_set ... ok
[INFO] [stdout] test mmu::tests::mirror_addresses ... ok
[INFO] [stdout] test mmu::tests::unwriteable_address_ranges_0x100 ... ok
[INFO] [stdout] test mmu::tests::touching_boot_rom_lockout_locks_boot ... ok
[INFO] [stdout] test mmu::tests::set_bit ... ok
[INFO] [stdout] 
[INFO] [stdout] test result: ok. 5 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out
[INFO] [stdout] 
[INFO] running `"docker" "inspect" "1cec99735338399bd5a38c3e75ae2ce69744451fdb7172f7201e3092039ef32e"`
[INFO] running `"docker" "rm" "-f" "1cec99735338399bd5a38c3e75ae2ce69744451fdb7172f7201e3092039ef32e"`
[INFO] [stdout] 1cec99735338399bd5a38c3e75ae2ce69744451fdb7172f7201e3092039ef32e