[INFO] updating cached repository https://github.com/Tsallanmaa/chit8 [INFO] running `"git" "-c" "credential.helper=" "-c" "credential.helper=/big/crater/work/cargo-home/bin/git-credential-null" "-c" "remote.origin.fetch=refs/heads/*:refs/heads/*" "fetch" "origin" "--force" "--prune"` [INFO] running `"git" "rev-parse" "HEAD"` [INFO] [stdout] 5d7a5fc660ae95b8a883a11f7d6c0eb432aaa38b [INFO] testing Tsallanmaa/chit8 against 1.38.0 for beta-1.39-1 [INFO] running `"git" "clone" "work/cache/git-repos/https%3A%2F%2Fgithub.com%2FTsallanmaa%2Fchit8" "work/builds/worker-1/source"` [INFO] [stderr] Cloning into 'work/builds/worker-1/source'... [INFO] [stderr] done. [INFO] validating manifest of git repo https://github.com/Tsallanmaa/chit8 on toolchain 1.38.0 [INFO] running `"/big/crater/work/cargo-home/bin/cargo" "+1.38.0" "read-manifest" "--manifest-path" "Cargo.toml"` [INFO] started tweaking git repo https://github.com/Tsallanmaa/chit8 [INFO] finished tweaking git repo https://github.com/Tsallanmaa/chit8 [INFO] tweaked toml for git repo https://github.com/Tsallanmaa/chit8 written to work/builds/worker-1/source/Cargo.toml [INFO] crate git repo https://github.com/Tsallanmaa/chit8 already has a lockfile, it will not be regenerated [INFO] running `"/big/crater/work/cargo-home/bin/cargo" "+1.38.0" "fetch" "--locked" "--manifest-path" "Cargo.toml"` [INFO] [stderr] error: the lock file /big/crater/work/builds/worker-1/source/Cargo.lock needs to be updated but --locked was passed to prevent this [INFO] the lockfile is outdated, regenerating it [INFO] running `"/big/crater/work/cargo-home/bin/cargo" "+1.38.0" "generate-lockfile" "--manifest-path" "Cargo.toml" "-Zno-index-update"` [INFO] running `"/big/crater/work/cargo-home/bin/cargo" "+1.38.0" "fetch" "--locked" "--manifest-path" "Cargo.toml"` [INFO] running `"docker" "create" "-v" "/big/crater/work/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/big/crater/work/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/big/crater/work/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/big/crater/work/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=1000" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+1.38.0" "build" "--frozen"` [INFO] [stdout] 82197241964d042b3d537bb947bcd1f88dbf5bad5a14a69e987b262487916fe2 [INFO] running `"docker" "start" "-a" "82197241964d042b3d537bb947bcd1f88dbf5bad5a14a69e987b262487916fe2"` [INFO] [stderr] Compiling chit8 v0.1.0 (/opt/rustwide/workdir) [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/disassembler.rs:63:19 [INFO] [stderr] | [INFO] [stderr] 63 | pub ram: &'a mut Memory [INFO] [stderr] | ^^^^^^ help: use `dyn`: `dyn Memory` [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(bare_trait_objects)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:18:16 [INFO] [stderr] | [INFO] [stderr] 18 | op @ 0x0000 ... 0x0FFF => { $this.sys(op & 0xFFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(ellipsis_inclusive_range_patterns)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:19:16 [INFO] [stderr] | [INFO] [stderr] 19 | op @ 0x1000 ... 0x1FFF => { $this.jp(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:20:16 [INFO] [stderr] | [INFO] [stderr] 20 | op @ 0x2000 ... 0x2FFF => { $this.call(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:21:16 [INFO] [stderr] | [INFO] [stderr] 21 | op @ 0x3000 ... 0x3FFF => { $this.se(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:22:16 [INFO] [stderr] | [INFO] [stderr] 22 | op @ 0x4000 ... 0x4FFF => { $this.sne(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:23:16 [INFO] [stderr] | [INFO] [stderr] 23 | op @ 0x5000 ... 0x5FFF => { $this.se_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:24:16 [INFO] [stderr] | [INFO] [stderr] 24 | op @ 0x6000 ... 0x6FFF => { $this.ldx(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:25:16 [INFO] [stderr] | [INFO] [stderr] 25 | op @ 0x7000 ... 0x7FFF => { $this.add_byte(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:26:16 [INFO] [stderr] | [INFO] [stderr] 26 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x0 => { $this.ld(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:27:16 [INFO] [stderr] | [INFO] [stderr] 27 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x1 => { $this.or(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:28:16 [INFO] [stderr] | [INFO] [stderr] 28 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x2 => { $this.and(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:29:16 [INFO] [stderr] | [INFO] [stderr] 29 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x3 => { $this.xor(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:30:16 [INFO] [stderr] | [INFO] [stderr] 30 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x4 => { $this.add_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:31:16 [INFO] [stderr] | [INFO] [stderr] 31 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x5 => { $this.sub(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:32:16 [INFO] [stderr] | [INFO] [stderr] 32 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x6 => { $this.shr(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:33:16 [INFO] [stderr] | [INFO] [stderr] 33 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x7 => { $this.subn(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:34:16 [INFO] [stderr] | [INFO] [stderr] 34 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0xE => { $this.shl(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:35:16 [INFO] [stderr] | [INFO] [stderr] 35 | op @ 0x9000 ... 0x9FFF if (op & 0x000F) == 0x0 => { $this.sne_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:36:16 [INFO] [stderr] | [INFO] [stderr] 36 | op @ 0xA000 ... 0xAFFF => { $this.ldi(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:37:16 [INFO] [stderr] | [INFO] [stderr] 37 | op @ 0xB000 ... 0xBFFF => { $this.jp_v0(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:38:16 [INFO] [stderr] | [INFO] [stderr] 38 | op @ 0xC000 ... 0xCFFF => { $this.rnd(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:39:16 [INFO] [stderr] | [INFO] [stderr] 39 | op @ 0xD000 ... 0xDFFF => { $this.drw(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8, (op & 0x000F) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:40:16 [INFO] [stderr] | [INFO] [stderr] 40 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0x9E => { $this.skp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:41:16 [INFO] [stderr] | [INFO] [stderr] 41 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0xA1 => { $this.sknp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:42:16 [INFO] [stderr] | [INFO] [stderr] 42 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x07 => { $this.ld_dt_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:43:16 [INFO] [stderr] | [INFO] [stderr] 43 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x0A => { $this.ld_k_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:44:16 [INFO] [stderr] | [INFO] [stderr] 44 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x15 => { $this.ld_vx_into_dt(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:45:16 [INFO] [stderr] | [INFO] [stderr] 45 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x18 => { $this.ld_vx_into_st(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:46:16 [INFO] [stderr] | [INFO] [stderr] 46 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x1E => { $this.add_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:47:16 [INFO] [stderr] | [INFO] [stderr] 47 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x29 => { $this.ld_vx_digit_into_f(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:48:16 [INFO] [stderr] | [INFO] [stderr] 48 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x33 => { $this.ld_vx_into_bcd(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:49:16 [INFO] [stderr] | [INFO] [stderr] 49 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x55 => { $this.ld_v0_to_vx_into_i(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:50:16 [INFO] [stderr] | [INFO] [stderr] 50 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x65 => { $this.ld_i_into_v0_to_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/rom.rs:22:28 [INFO] [stderr] | [INFO] [stderr] 22 | pub fn new(readable: &mut Read, filename: String) -> Result [INFO] [stderr] | ^^^^ help: use `dyn`: `dyn Read` [INFO] [stderr] [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/cpu.rs:12:15 [INFO] [stderr] | [INFO] [stderr] 12 | ram: &'a mut Memory, [INFO] [stderr] | ^^^^^^ help: use `dyn`: `dyn Memory` [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:18:16 [INFO] [stderr] | [INFO] [stderr] 18 | op @ 0x0000 ... 0x0FFF => { $this.sys(op & 0xFFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:19:16 [INFO] [stderr] | [INFO] [stderr] 19 | op @ 0x1000 ... 0x1FFF => { $this.jp(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:20:16 [INFO] [stderr] | [INFO] [stderr] 20 | op @ 0x2000 ... 0x2FFF => { $this.call(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:21:16 [INFO] [stderr] | [INFO] [stderr] 21 | op @ 0x3000 ... 0x3FFF => { $this.se(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:22:16 [INFO] [stderr] | [INFO] [stderr] 22 | op @ 0x4000 ... 0x4FFF => { $this.sne(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:23:16 [INFO] [stderr] | [INFO] [stderr] 23 | op @ 0x5000 ... 0x5FFF => { $this.se_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:24:16 [INFO] [stderr] | [INFO] [stderr] 24 | op @ 0x6000 ... 0x6FFF => { $this.ldx(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:25:16 [INFO] [stderr] | [INFO] [stderr] 25 | op @ 0x7000 ... 0x7FFF => { $this.add_byte(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:26:16 [INFO] [stderr] | [INFO] [stderr] 26 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x0 => { $this.ld(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:27:16 [INFO] [stderr] | [INFO] [stderr] 27 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x1 => { $this.or(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:28:16 [INFO] [stderr] | [INFO] [stderr] 28 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x2 => { $this.and(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:29:16 [INFO] [stderr] | [INFO] [stderr] 29 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x3 => { $this.xor(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:30:16 [INFO] [stderr] | [INFO] [stderr] 30 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x4 => { $this.add_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:31:16 [INFO] [stderr] | [INFO] [stderr] 31 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x5 => { $this.sub(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:32:16 [INFO] [stderr] | [INFO] [stderr] 32 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x6 => { $this.shr(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:33:16 [INFO] [stderr] | [INFO] [stderr] 33 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x7 => { $this.subn(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:34:16 [INFO] [stderr] | [INFO] [stderr] 34 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0xE => { $this.shl(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:35:16 [INFO] [stderr] | [INFO] [stderr] 35 | op @ 0x9000 ... 0x9FFF if (op & 0x000F) == 0x0 => { $this.sne_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:36:16 [INFO] [stderr] | [INFO] [stderr] 36 | op @ 0xA000 ... 0xAFFF => { $this.ldi(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:37:16 [INFO] [stderr] | [INFO] [stderr] 37 | op @ 0xB000 ... 0xBFFF => { $this.jp_v0(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:38:16 [INFO] [stderr] | [INFO] [stderr] 38 | op @ 0xC000 ... 0xCFFF => { $this.rnd(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:39:16 [INFO] [stderr] | [INFO] [stderr] 39 | op @ 0xD000 ... 0xDFFF => { $this.drw(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8, (op & 0x000F) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:40:16 [INFO] [stderr] | [INFO] [stderr] 40 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0x9E => { $this.skp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:41:16 [INFO] [stderr] | [INFO] [stderr] 41 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0xA1 => { $this.sknp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:42:16 [INFO] [stderr] | [INFO] [stderr] 42 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x07 => { $this.ld_dt_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:43:16 [INFO] [stderr] | [INFO] [stderr] 43 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x0A => { $this.ld_k_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:44:16 [INFO] [stderr] | [INFO] [stderr] 44 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x15 => { $this.ld_vx_into_dt(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:45:16 [INFO] [stderr] | [INFO] [stderr] 45 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x18 => { $this.ld_vx_into_st(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:46:16 [INFO] [stderr] | [INFO] [stderr] 46 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x1E => { $this.add_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:47:16 [INFO] [stderr] | [INFO] [stderr] 47 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x29 => { $this.ld_vx_digit_into_f(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:48:16 [INFO] [stderr] | [INFO] [stderr] 48 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x33 => { $this.ld_vx_into_bcd(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:49:16 [INFO] [stderr] | [INFO] [stderr] 49 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x55 => { $this.ld_v0_to_vx_into_i(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:50:16 [INFO] [stderr] | [INFO] [stderr] 50 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x65 => { $this.ld_i_into_v0_to_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/cpu.rs:407:30 [INFO] [stderr] | [INFO] [stderr] 407 | pub fn new<'b>(ram: &'b mut Memory, input: &'b I) -> Cpu<'b, I> [INFO] [stderr] | ^^^^^^ help: use `dyn`: `dyn Memory` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/lib.rs:30:6 [INFO] [stderr] | [INFO] [stderr] 30 | let mut ram = &mut Ram::new_from_rom(&rom); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_mut)]` on by default [INFO] [stderr] [INFO] [stderr] Finished dev [unoptimized + debuginfo] target(s) in 1.02s [INFO] running `"docker" "inspect" "82197241964d042b3d537bb947bcd1f88dbf5bad5a14a69e987b262487916fe2"` [INFO] running `"docker" "rm" "-f" "82197241964d042b3d537bb947bcd1f88dbf5bad5a14a69e987b262487916fe2"` [INFO] [stdout] 82197241964d042b3d537bb947bcd1f88dbf5bad5a14a69e987b262487916fe2 [INFO] running `"docker" "create" "-v" "/big/crater/work/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/big/crater/work/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/big/crater/work/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/big/crater/work/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=1000" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+1.38.0" "test" "--frozen" "--no-run"` [INFO] [stdout] f446f5ece534c89fcc7c4f39e51f46936a9e3f41c74762ec1440401b1a265f33 [INFO] running `"docker" "start" "-a" "f446f5ece534c89fcc7c4f39e51f46936a9e3f41c74762ec1440401b1a265f33"` [INFO] [stderr] Compiling chit8 v0.1.0 (/opt/rustwide/workdir) [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/disassembler.rs:63:19 [INFO] [stderr] | [INFO] [stderr] 63 | pub ram: &'a mut Memory [INFO] [stderr] | ^^^^^^ help: use `dyn`: `dyn Memory` [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(bare_trait_objects)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:18:16 [INFO] [stderr] | [INFO] [stderr] 18 | op @ 0x0000 ... 0x0FFF => { $this.sys(op & 0xFFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(ellipsis_inclusive_range_patterns)]` on by default [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:19:16 [INFO] [stderr] | [INFO] [stderr] 19 | op @ 0x1000 ... 0x1FFF => { $this.jp(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:20:16 [INFO] [stderr] | [INFO] [stderr] 20 | op @ 0x2000 ... 0x2FFF => { $this.call(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:21:16 [INFO] [stderr] | [INFO] [stderr] 21 | op @ 0x3000 ... 0x3FFF => { $this.se(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:22:16 [INFO] [stderr] | [INFO] [stderr] 22 | op @ 0x4000 ... 0x4FFF => { $this.sne(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:23:16 [INFO] [stderr] | [INFO] [stderr] 23 | op @ 0x5000 ... 0x5FFF => { $this.se_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:24:16 [INFO] [stderr] | [INFO] [stderr] 24 | op @ 0x6000 ... 0x6FFF => { $this.ldx(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:25:16 [INFO] [stderr] | [INFO] [stderr] 25 | op @ 0x7000 ... 0x7FFF => { $this.add_byte(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:26:16 [INFO] [stderr] | [INFO] [stderr] 26 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x0 => { $this.ld(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:27:16 [INFO] [stderr] | [INFO] [stderr] 27 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x1 => { $this.or(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:28:16 [INFO] [stderr] | [INFO] [stderr] 28 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x2 => { $this.and(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:29:16 [INFO] [stderr] | [INFO] [stderr] 29 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x3 => { $this.xor(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:30:16 [INFO] [stderr] | [INFO] [stderr] 30 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x4 => { $this.add_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:31:16 [INFO] [stderr] | [INFO] [stderr] 31 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x5 => { $this.sub(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:32:16 [INFO] [stderr] | [INFO] [stderr] 32 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x6 => { $this.shr(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:33:16 [INFO] [stderr] | [INFO] [stderr] 33 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x7 => { $this.subn(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:34:16 [INFO] [stderr] | [INFO] [stderr] 34 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0xE => { $this.shl(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:35:16 [INFO] [stderr] | [INFO] [stderr] 35 | op @ 0x9000 ... 0x9FFF if (op & 0x000F) == 0x0 => { $this.sne_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:36:16 [INFO] [stderr] | [INFO] [stderr] 36 | op @ 0xA000 ... 0xAFFF => { $this.ldi(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:37:16 [INFO] [stderr] | [INFO] [stderr] 37 | op @ 0xB000 ... 0xBFFF => { $this.jp_v0(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:38:16 [INFO] [stderr] | [INFO] [stderr] 38 | op @ 0xC000 ... 0xCFFF => { $this.rnd(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:39:16 [INFO] [stderr] | [INFO] [stderr] 39 | op @ 0xD000 ... 0xDFFF => { $this.drw(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8, (op & 0x000F) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:40:16 [INFO] [stderr] | [INFO] [stderr] 40 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0x9E => { $this.skp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:41:16 [INFO] [stderr] | [INFO] [stderr] 41 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0xA1 => { $this.sknp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:42:16 [INFO] [stderr] | [INFO] [stderr] 42 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x07 => { $this.ld_dt_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:43:16 [INFO] [stderr] | [INFO] [stderr] 43 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x0A => { $this.ld_k_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:44:16 [INFO] [stderr] | [INFO] [stderr] 44 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x15 => { $this.ld_vx_into_dt(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:45:16 [INFO] [stderr] | [INFO] [stderr] 45 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x18 => { $this.ld_vx_into_st(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:46:16 [INFO] [stderr] | [INFO] [stderr] 46 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x1E => { $this.add_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:47:16 [INFO] [stderr] | [INFO] [stderr] 47 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x29 => { $this.ld_vx_digit_into_f(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:48:16 [INFO] [stderr] | [INFO] [stderr] 48 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x33 => { $this.ld_vx_into_bcd(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:49:16 [INFO] [stderr] | [INFO] [stderr] 49 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x55 => { $this.ld_v0_to_vx_into_i(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:50:16 [INFO] [stderr] | [INFO] [stderr] 50 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x65 => { $this.ld_i_into_v0_to_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] ... [INFO] [stderr] 317 | println!("{:#X}: (0x{:0>4X}) {}", op.0, op.1, decode_opcode!(op.1, self)); [INFO] [stderr] | -------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/rom.rs:22:28 [INFO] [stderr] | [INFO] [stderr] 22 | pub fn new(readable: &mut Read, filename: String) -> Result [INFO] [stderr] | ^^^^ help: use `dyn`: `dyn Read` [INFO] [stderr] [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/cpu.rs:12:15 [INFO] [stderr] | [INFO] [stderr] 12 | ram: &'a mut Memory, [INFO] [stderr] | ^^^^^^ help: use `dyn`: `dyn Memory` [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:18:16 [INFO] [stderr] | [INFO] [stderr] 18 | op @ 0x0000 ... 0x0FFF => { $this.sys(op & 0xFFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:19:16 [INFO] [stderr] | [INFO] [stderr] 19 | op @ 0x1000 ... 0x1FFF => { $this.jp(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:20:16 [INFO] [stderr] | [INFO] [stderr] 20 | op @ 0x2000 ... 0x2FFF => { $this.call(op & 0x0FFF) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:21:16 [INFO] [stderr] | [INFO] [stderr] 21 | op @ 0x3000 ... 0x3FFF => { $this.se(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:22:16 [INFO] [stderr] | [INFO] [stderr] 22 | op @ 0x4000 ... 0x4FFF => { $this.sne(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:23:16 [INFO] [stderr] | [INFO] [stderr] 23 | op @ 0x5000 ... 0x5FFF => { $this.se_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:24:16 [INFO] [stderr] | [INFO] [stderr] 24 | op @ 0x6000 ... 0x6FFF => { $this.ldx(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:25:16 [INFO] [stderr] | [INFO] [stderr] 25 | op @ 0x7000 ... 0x7FFF => { $this.add_byte(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:26:16 [INFO] [stderr] | [INFO] [stderr] 26 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x0 => { $this.ld(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:27:16 [INFO] [stderr] | [INFO] [stderr] 27 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x1 => { $this.or(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:28:16 [INFO] [stderr] | [INFO] [stderr] 28 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x2 => { $this.and(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:29:16 [INFO] [stderr] | [INFO] [stderr] 29 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x3 => { $this.xor(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:30:16 [INFO] [stderr] | [INFO] [stderr] 30 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x4 => { $this.add_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:31:16 [INFO] [stderr] | [INFO] [stderr] 31 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x5 => { $this.sub(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:32:16 [INFO] [stderr] | [INFO] [stderr] 32 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x6 => { $this.shr(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:33:16 [INFO] [stderr] | [INFO] [stderr] 33 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0x7 => { $this.subn(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:34:16 [INFO] [stderr] | [INFO] [stderr] 34 | op @ 0x8000 ... 0x8FFF if (op & 0x000F) == 0xE => { $this.shl(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:35:16 [INFO] [stderr] | [INFO] [stderr] 35 | op @ 0x9000 ... 0x9FFF if (op & 0x000F) == 0x0 => { $this.sne_reg(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:36:16 [INFO] [stderr] | [INFO] [stderr] 36 | op @ 0xA000 ... 0xAFFF => { $this.ldi(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:37:16 [INFO] [stderr] | [INFO] [stderr] 37 | op @ 0xB000 ... 0xBFFF => { $this.jp_v0(op & 0x0FFF)}, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:38:16 [INFO] [stderr] | [INFO] [stderr] 38 | op @ 0xC000 ... 0xCFFF => { $this.rnd(((op & 0x0F00) >> 8) as u8, (op & 0x00FF) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:39:16 [INFO] [stderr] | [INFO] [stderr] 39 | op @ 0xD000 ... 0xDFFF => { $this.drw(((op & 0x0F00) >> 8) as u8, ((op & 0x00F0) >> 4) as u8, (op & 0x000F) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:40:16 [INFO] [stderr] | [INFO] [stderr] 40 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0x9E => { $this.skp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:41:16 [INFO] [stderr] | [INFO] [stderr] 41 | op @ 0xE000 ... 0xEFFF if (op & 0x00FF) == 0xA1 => { $this.sknp(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:42:16 [INFO] [stderr] | [INFO] [stderr] 42 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x07 => { $this.ld_dt_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:43:16 [INFO] [stderr] | [INFO] [stderr] 43 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x0A => { $this.ld_k_into_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:44:16 [INFO] [stderr] | [INFO] [stderr] 44 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x15 => { $this.ld_vx_into_dt(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:45:16 [INFO] [stderr] | [INFO] [stderr] 45 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x18 => { $this.ld_vx_into_st(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:46:16 [INFO] [stderr] | [INFO] [stderr] 46 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x1E => { $this.add_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:47:16 [INFO] [stderr] | [INFO] [stderr] 47 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x29 => { $this.ld_vx_digit_into_f(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:48:16 [INFO] [stderr] | [INFO] [stderr] 48 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x33 => { $this.ld_vx_into_bcd(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:49:16 [INFO] [stderr] | [INFO] [stderr] 49 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x55 => { $this.ld_v0_to_vx_into_i(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: `...` range patterns are deprecated [INFO] [stderr] --> src/disassembler.rs:50:16 [INFO] [stderr] | [INFO] [stderr] 50 | op @ 0xF000 ... 0xFFFF if (op & 0x00FF) == 0x65 => { $this.ld_i_into_v0_to_vx(((op & 0x0F00) >> 8) as u8) }, [INFO] [stderr] | ^^^ help: use `..=` for an inclusive range [INFO] [stderr] | [INFO] [stderr] ::: src/cpu.rs:403:9 [INFO] [stderr] | [INFO] [stderr] 403 | decode_opcode!(op, self); [INFO] [stderr] | ------------------------- in this macro invocation [INFO] [stderr] [INFO] [stderr] warning: trait objects without an explicit `dyn` are deprecated [INFO] [stderr] --> src/cpu.rs:407:30 [INFO] [stderr] | [INFO] [stderr] 407 | pub fn new<'b>(ram: &'b mut Memory, input: &'b I) -> Cpu<'b, I> [INFO] [stderr] | ^^^^^^ help: use `dyn`: `dyn Memory` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/lib.rs:30:6 [INFO] [stderr] | [INFO] [stderr] 30 | let mut ram = &mut Ram::new_from_rom(&rom); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] | [INFO] [stderr] = note: `#[warn(unused_mut)]` on by default [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:460:6 [INFO] [stderr] | [INFO] [stderr] 460 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:488:6 [INFO] [stderr] | [INFO] [stderr] 488 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:499:6 [INFO] [stderr] | [INFO] [stderr] 499 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:515:6 [INFO] [stderr] | [INFO] [stderr] 515 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:544:6 [INFO] [stderr] | [INFO] [stderr] 544 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:557:6 [INFO] [stderr] | [INFO] [stderr] 557 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:574:6 [INFO] [stderr] | [INFO] [stderr] 574 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:591:6 [INFO] [stderr] | [INFO] [stderr] 591 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:614:6 [INFO] [stderr] | [INFO] [stderr] 614 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:633:6 [INFO] [stderr] | [INFO] [stderr] 633 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:646:6 [INFO] [stderr] | [INFO] [stderr] 646 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:666:6 [INFO] [stderr] | [INFO] [stderr] 666 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:681:6 [INFO] [stderr] | [INFO] [stderr] 681 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:696:6 [INFO] [stderr] | [INFO] [stderr] 696 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:711:6 [INFO] [stderr] | [INFO] [stderr] 711 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:728:6 [INFO] [stderr] | [INFO] [stderr] 728 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:745:6 [INFO] [stderr] | [INFO] [stderr] 745 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:762:6 [INFO] [stderr] | [INFO] [stderr] 762 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:779:6 [INFO] [stderr] | [INFO] [stderr] 779 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:806:6 [INFO] [stderr] | [INFO] [stderr] 806 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:823:6 [INFO] [stderr] | [INFO] [stderr] 823 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:840:6 [INFO] [stderr] | [INFO] [stderr] 840 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:867:6 [INFO] [stderr] | [INFO] [stderr] 867 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:890:6 [INFO] [stderr] | [INFO] [stderr] 890 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:905:6 [INFO] [stderr] | [INFO] [stderr] 905 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:918:6 [INFO] [stderr] | [INFO] [stderr] 918 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:940:6 [INFO] [stderr] | [INFO] [stderr] 940 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:966:6 [INFO] [stderr] | [INFO] [stderr] 966 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:992:6 [INFO] [stderr] | [INFO] [stderr] 992 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1011:6 [INFO] [stderr] | [INFO] [stderr] 1011 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1026:6 [INFO] [stderr] | [INFO] [stderr] 1026 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1045:6 [INFO] [stderr] | [INFO] [stderr] 1045 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1064:6 [INFO] [stderr] | [INFO] [stderr] 1064 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1084:6 [INFO] [stderr] | [INFO] [stderr] 1084 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1105:6 [INFO] [stderr] | [INFO] [stderr] 1105 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1124:6 [INFO] [stderr] | [INFO] [stderr] 1124 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1148:6 [INFO] [stderr] | [INFO] [stderr] 1148 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1168:6 [INFO] [stderr] | [INFO] [stderr] 1168 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1188:6 [INFO] [stderr] | [INFO] [stderr] 1188 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] warning: variable does not need to be mutable [INFO] [stderr] --> src/cpu.rs:1209:6 [INFO] [stderr] | [INFO] [stderr] 1209 | let mut ram = &mut Ram::new(); [INFO] [stderr] | ----^^^ [INFO] [stderr] | | [INFO] [stderr] | help: remove this `mut` [INFO] [stderr] [INFO] [stderr] Finished dev [unoptimized + debuginfo] target(s) in 0.76s [INFO] running `"docker" "inspect" "f446f5ece534c89fcc7c4f39e51f46936a9e3f41c74762ec1440401b1a265f33"` [INFO] running `"docker" "rm" "-f" "f446f5ece534c89fcc7c4f39e51f46936a9e3f41c74762ec1440401b1a265f33"` [INFO] [stdout] f446f5ece534c89fcc7c4f39e51f46936a9e3f41c74762ec1440401b1a265f33 [INFO] running `"docker" "create" "-v" "/big/crater/work/builds/worker-1/target:/opt/rustwide/target:rw,Z" "-v" "/big/crater/work/builds/worker-1/source:/opt/rustwide/workdir:ro,Z" "-v" "/big/crater/work/cargo-home:/opt/rustwide/cargo-home:ro,Z" "-v" "/big/crater/work/rustup-home:/opt/rustwide/rustup-home:ro,Z" "-e" "SOURCE_DIR=/opt/rustwide/workdir" "-e" "MAP_USER_ID=1000" "-e" "CARGO_TARGET_DIR=/opt/rustwide/target" "-e" "CARGO_INCREMENTAL=0" "-e" "RUST_BACKTRACE=full" "-e" "RUSTFLAGS=--cap-lints=warn" "-e" "CARGO_HOME=/opt/rustwide/cargo-home" "-e" "RUSTUP_HOME=/opt/rustwide/rustup-home" "-w" "/opt/rustwide/workdir" "-m" "1610612736" "--network" "none" "rustops/crates-build-env" "/opt/rustwide/cargo-home/bin/cargo" "+1.38.0" "test" "--frozen"` [INFO] [stdout] 785d16ed262946bf5f34190ec7b05c0e7462bff763792bb45610cba6765ded12 [INFO] running `"docker" "start" "-a" "785d16ed262946bf5f34190ec7b05c0e7462bff763792bb45610cba6765ded12"` [INFO] [stderr] Finished dev [unoptimized + debuginfo] target(s) in 0.01s [INFO] [stderr] Running /opt/rustwide/target/debug/deps/chip8-3581d45e400f4585 [INFO] [stdout] [INFO] [stdout] running 40 tests [INFO] [stdout] test cpu::test_add_byte ... ok [INFO] [stdout] test cpu::test_add_reg_overflows ... ok [INFO] [stdout] test cpu::test_add_reg ... ok [INFO] [stdout] test cpu::test_call ... ok [INFO] [stdout] test cpu::test_add_vx ... ok [INFO] [stdout] test cpu::test_and ... ok [INFO] [stdout] test cpu::test_jp ... ok [INFO] [stdout] test cpu::test_jp_v0 ... ok [INFO] [stdout] test cpu::test_dt_into_vx ... ok [INFO] [stdout] test cpu::test_ld_i_into_v0_to_vx ... ok [INFO] [stdout] test cpu::test_ld_i_into_v0_to_vx_terminates_properly ... ok [INFO] [stdout] test cpu::test_ld_k_into_vx ... ok [INFO] [stdout] test cpu::test_ld ... ok [INFO] [stdout] test cpu::test_ld_vx_digit_into_f ... ok [INFO] [stdout] test cpu::test_ld_v0_to_vx_into_i_terminates_properly ... ok [INFO] [stdout] test cpu::test_ld_vx_into_bc_with_smaller_numbers ... ok [INFO] [stdout] test cpu::test_ld_vx_into_dt ... ok [INFO] [stdout] test cpu::test_ld_vx_into_st ... ok [INFO] [stdout] test cpu::test_ld_v0_to_vx_into_i ... ok [INFO] [stdout] test cpu::test_or ... ok [INFO] [stdout] test cpu::test_rnd ... ok [INFO] [stdout] test cpu::test_ld_vx_into_bcd ... ok [INFO] [stdout] test cpu::test_ldi ... ok [INFO] [stdout] test cpu::test_ldx ... ok [INFO] [stdout] test cpu::test_se ... ok [INFO] [stdout] test cpu::test_ret ... ok [INFO] [stdout] test cpu::test_shr ... ok [INFO] [stdout] test cpu::test_sne ... ok [INFO] [stdout] test cpu::test_skp ... ok [INFO] [stdout] test cpu::test_se_reg ... ok [INFO] [stdout] test cpu::test_sub ... ok [INFO] [stdout] test cpu::test_sub_borrow ... ok [INFO] [stdout] test cpu::test_shl ... ok [INFO] [stdout] test cpu::test_sne_reg ... ok [INFO] [stdout] test cpu::test_subn ... ok [INFO] [stdout] test cpu::test_xor ... ok [INFO] [stdout] test cpu::test_sknp ... ok [INFO] [stdout] test cpu::test_subn_borrow ... ok [INFO] [stdout] test cpu::test_call_overflows ... ok [INFO] [stdout] test cpu::test_ret_panics_with_empty_stack ... ok [INFO] [stdout] [INFO] [stdout] test result: ok. 40 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out [INFO] [stdout] [INFO] [stderr] Running /opt/rustwide/target/debug/deps/chit8-5b341a129c44dbb9 [INFO] [stdout] [INFO] [stdout] running 0 tests [INFO] [stdout] [INFO] [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out [INFO] [stdout] [INFO] [stderr] Doc-tests chip8 [INFO] [stdout] [INFO] [stdout] running 0 tests [INFO] [stdout] [INFO] [stdout] test result: ok. 0 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out [INFO] [stdout] [INFO] running `"docker" "inspect" "785d16ed262946bf5f34190ec7b05c0e7462bff763792bb45610cba6765ded12"` [INFO] running `"docker" "rm" "-f" "785d16ed262946bf5f34190ec7b05c0e7462bff763792bb45610cba6765ded12"` [INFO] [stdout] 785d16ed262946bf5f34190ec7b05c0e7462bff763792bb45610cba6765ded12